Request of timing model (.v) for LPPDR4 simulation using Hyperlynx. Hi, I am simulating the LPDDR4-interface and Hyperlynx request a timing model file (*.v). Can you please provide me with this file? The device I am using is MIMX8ML4CVNKZAB and the ibis-model is imx8mp_15x15_v2.ibs. Thank you in advance! Br // PuiYee Re: Request of timing model (.v) for LPPDR4 simulation using Hyperlynx. Hi @puiyee_poon ， I give the update to you in the case, please check it. Wish you have a nice day Best Regards Rita Re: Request of timing model (.v) for LPPDR4 simulation using Hyperlynx. Hi @puiyee_poon , I am confirming it for you, please wait. Wish you have a nice day Best Regards Rita Re: Request of timing model (.v) for LPPDR4 simulation using Hyperlynx. Hi, The tool that you recommend is of use when we have the board in reality. But I'm in a phase that we have just routed the layout and need to do simulations between the LPDDR4 and i.MX8MPlus-processor to make sure that the signal quality is good before producing the PCBA. So please provide me with the Verilog Design File-file (*.v) for MIMX8ML4CVNKZAB as requested so I can implement the file in the Hyperlynx-tool to do my simulations. Thank you in advance! Br // PuiYee Re: Request of timing model (.v) for LPPDR4 simulation using Hyperlynx. You can use the MSCALE DDR Tool provided by NXP: i.MX 8M Family DDR Tool Release - NXP Community Any questions contact me freely Wish you have a nice day Best Regards Rita

How to use iseled library at s32k116 Hello, I use s32 design studio for ARM ver. 2018.r1 and processor is fs32k116lit0vfmt. I changed MCU package 48pin(default at s32k116 pjt) to 32pin. But how to use iseled library. it's version is indicated as s32k144_sdk01. I choose SDK_S32K1xx_15/timing_pal when it added. so can't choose data & clk pin match on s32k116_32. What can I do for using correct iseled library version at s32k116_32? Re: How to use iseled library at s32k116 Hi @kimmk, It is necessary to install corresponding S32K1xx SDK before installing ISELED SDK. There is description about how to match version between S32K1xx SDK and ISELED SDK in the “S32K1_ISELED_RTM_x.x.x_ReleaseNotes.pdf”, which is included in ISELED SDK package. Best regards, Julián

Using the QN9090's PWM function to ring the buzzer Hello. I want to use the QN9090's PWM function to make a buzzer sound. I believe the PWM frequency can be set from "pwm_setup_t" in "fsl_pwm.h". However, I don't know how "prescaler_val", "period_val", and "comp_val" affect the PWM. Please let me know if there is a formula for calculating the PWM frequency from these three values. Kind regards. Re: Using the QN9090's PWM function to ring the buzzer Hi, @Jose7  Hope below information is helpful for you: 18.6.1 Prescaler There are eleven 10-bit prescalers. The frequency of the scaled clock enable is calculated as follows. Fscaled = Fclk / (pscl +1) Where Fclk is the frequency of the AHB clock, pscl is the prescaler setting for the PWM channel. And also we have QN9090's User Manual in below link, you can find more details in Chapter 18: Pulse Width Modulation (PWM). QN9090(T)/QN9030(T) User Manual Please let me know whether you have any other concerns on this thread. If no, please do not hesitate to mark this reply as a solution. Best regards, Christine. Re: Using the QN9090's PWM function to ring the buzzer Hi, @Jose7  Sorry, forgot to ask your SDK example. Which example did you import to your workspace? I have downloaded QN9090's SDK, and trying to check your issue now. Best regards, Christine. Re: Using the QN9090's PWM function to ring the buzzer Hi, @Jose7  Thanks for your feedback. I will check it and reply to you soon. At the same time, would you mind to checkout to our latest release: SDK_ 2.6.14_ QN9090DK6? Best regards, Christine. Re: Using the QN9090's PWM function to ring the buzzer Hello. Thank you for your reply. I will state the version of the SDK and IDE I am using. SDK :    SDK_2_6_4_QN9090DK6 IDE :    MCUXpresso IDE v11.8.0 Kind regard. Re: Using the QN9090's PWM function to ring the buzzer Hi, @Jose7  Thanks for creating case to us. May I ask what is your SDK version and what IDE version are you using? Are you using MCUXpresso? or other IDE? Let's sync these basic information so that I can check the source code on my side for you. Best regards, Christine.

If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. I am using GoldVIP-S32G2-v1.6.0 on S32G2 due to some circumstances and I am having a problem. I referred to the User Manual.pdf file of GoldVIP-S32G2 v1.6.0 and proceeded as follows. 1. I installed Goldvip- S32G2 v1.6.0 and EBTresos ACG8.8.7, S32DS 3.4. 2. Follow the steps in Figure 13.4 Building the M7 Application below.   2-1. Generated the default configuration information using EBTresos.   2-2. I built using Util of GoldVIP-S32G2-v1.6.0 and created an Elf file.   2-3. create goldvip-gateway.bin file using objcopy in S32DS Build_tools folder. 3. create an SDcard using fsl-image-goldvip-s32g274ardb2.sdcard and replace only the goldvip-gateway.bin file in the SDcard to write to the board. 4. I checked using Trace32 Debug and found that it booted well and LLCE_CAN0 and LLCE_CAN1 were set to use. 5. The problem was that even though I sent LLCE_CAN0 and LLCE_CAN1 using CANoe, CAN Interrupt did not work, so I could not check the can data coming in. I used GoldVIP-S32G2-v1.0.0 two years ago and experienced that the CanIf_RxIndication function shown in the screen below is called when CANoe successfully sends CAN data in the same way as above. Currently, I confirmed that the CanIf_RxIndication function is not called in the same way, and after debugging, I realized that receiving CAN data does not cause an interrupt. I would be grateful if you could let me know if I missed something and what else I can do and if you need more information to answer. S32G-VNP-RDB2 AUTOSAR GOLDVIP 1.6 Re: If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. Thank you for your continued response. I'm resolved.  When I disable CanMultiplexedTransmission and change both Filter and Mask to 0, I get an interrupt. It looks like filter and mask were preventing the data from coming in. Re: If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. Hi, We might be misunderstanding the overall inquiry. If so we do apologize. For the following comment: "After writing, a CAN data is sent via CANoe, but CANoe shows that the transmission was successful, but no RX interrupt occurs in Trace32." We understand that you are able to receive CAN frames under the S32G2, is this correct? This might seem to be related to Trace32 rather than S32G2 if you are able to receive CAN Frames. Can you replicate the examples available under the BSP User Manual?  Please, let us know. Re: If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. Hello Thank you for the reply. I was refer to GoldVIP-S32G2-1.6.0-User-Manual.pdf. I have attached the file. I didn't use anything related to the Linux BSP.  I used the fsl-image-goldvip-s32g274ardb2.sdcard file provided by NXP to create the SDcard. and then I created the goldvip-gateway.bin file for Firmware and then replaced the goldvip-gateway.bin on the SDcard as described in the question above. After writing, a CAN data is sent via CANoe, but CANoe shows that the transmission was successful, but no RX interrupt occurs in Trace32. For reference, when I installed and developed the RTD and LLCE Driver using S32DesignStudio, I found that CAN Rx interrupts were generated. Re: If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. Hi, We apologize for the delay. Can you help us share the respective logs of your system? Also, were you able to run the available examples for LLCE CAN under the BSP User Manual?  Overall, we have not seen any problems with LLCE CAN not receiving information, for which seems to be a configuration problem.  Please, let us know. Re: If develop something using GoldVIP-1.6.0, cannot use LLCE CAN. There is a typo in the above post. The version of GoldVIP I've been using is v1.1.0, not v1.0.0. I used GoldVIP-S32G2-v1.0.0 two years ago -> I used GoldVIP-S32G2-v1.1.0 two years ago

How to allocate can1 to core1 on S32K322 Hi NXP supporter, I am currently using the S32K322 with MCAL, and I would like to run CAN0 on Core0 and CAN1 on Core1. From what I understand, I should first enable the MultiCore support for both CAN and Platform in EB, and properly configure the EcucPartition-related modules. At runtime, in the Core1 main function, I call Platform_Init() and Can_43_FLEXCAN_Init(). Is this sufficient to have CAN1 running on Core1, or is there anything else I need to do to assign CAN1 to Core1 properly? Thank you! Best regards, Cooper24025 Re: How to allocate can1 to core1 on S32K322 Hello, At runtime, in the Core1 main function, I call Platform_Init() and Can_43_FLEXCAN_Init(). Is this sufficient to have CAN1 running on Core1, or is there anything else I need to do to assign CAN1 to Core1 properly? Should be. Not sure about the functions. But I can answer generally. Basically you need to perform configuration of CAN1 module - I expect that this is in Platform_Init() and Can_43_FLEXCAN_Init(). Once done, I assume you will call some CAN transmission function and that should be it. Looking at example for RTD: Best regards, Peter

使用QN9090的PWM功能来使蜂鸣器响 您好。 我想使用QN9090的PWM功能来发出蜂鸣器的声音。 我相信可以从“fsl_pwm.h”中的“pwm_setup_t”设置PWM频率。 但是，我不知道“prescaler_val”、“period_val”和“comp_val”如何影响PWM。请告诉我是否有一个公式可以根据这三个值计算 PWM 频率。 亲切的问候。

MCXA153 Hard Fault on GPIO_PinInit I'm trying to initialize a pin on the FRDM-MXCA153 as GPIO Output, but the GPIO_PinWrite throws a HardFault.  Here is code execution, paused at the write to the PSOR register for GPIO3.  The Hard Fault occurs immediately upon execution of the base->PSOR write. You can also see in the call stack () at 0xffffffb8.  There is no custom code here, just a call to the library code from fsl_gpio. I am using SDK_2.16.000 for the MXCA153. Minimum example project is also attached. MCXA Re: MCXA153 Hard Fault on GPIO_PinInit Thanks. It seems that routing a pin as GPIO (i.e. clicking the checkbox for the pin in the GPIO list in the "Peripheral Signals" tab), but leaving the Direction as "Not Specified" is not sufficient to generate the CLOCK_EnableClock(kCLOCK_GateGPIO3) call in pin_mux.c. The Direction must be specified too. Re: MCXA153 Hard Fault on GPIO_PinInit hi,aberger If pin P3_12 is used, kCLOCK_GatePORT3 should be enabled. If pin P3_12 is used as a common GPIO pin, kCLOCK_GateGPIO3 should be enabled. When the GPIO pin is initialized in the Config Tools tool, the code will be updated to enable kCLOCK_GateGPIO3. I hope this can help you. If you have any other questions, contact me again.  BR Xu Zhang Re: MCXA153 Hard Fault on GPIO_PinInit Hi @Joey_z , Thank you for the response. Can you explain the difference between kCLOCK_GatePORT3 and kCLOCK_GateGPIO3? You can see the the clock for PORT3 is enabled in my project inside BOARD_InitBootPins() (and this is auto-generated by Config Tools in the pin_mux.c file when I selected GPIO3, pin 12 to be routed). Why did Config Tools not enable the clock for GPIO3?  Re: MCXA153 Hard Fault on GPIO_PinInit hi,aberger Thank you for your interest in NXP products and opportunity to serve you,I will gladly help you with this. The clock has not been enabled in your code. After adding  CLOCK_EnableClock(kCLOCK_GateGPIO3)  to your demo, the error was successfully resolved. I hope this can help you. If you have any other questions, contact me again. The fixed code is also attached. BR Xu Zhang

S32K322 で can1 を core1 に割り当てる方法 こんにちはNXPサポーター、 現在、MCALでS32K322を使用していますが、Core0でCAN0を、Core1でCAN1を実行したいと考えています。 私が理解している限りでは、まず EB で CAN と Platform の両方の MultiCore サポートを有効にし、EcucPartition 関連のモジュールを適切に構成する必要があります。 実行時に、Core1 の main 関数で Platform_Init() と Can_43_FLEXCAN_Init() を呼び出します。 Core1 で CAN1 を実行するにはこれで十分ですか、それとも CAN1 を Core1 に適切に割り当てるために他に何かする必要がありますか? ありがとうございます！ よろしくお願いいたします クーパー24025

ImxRT 1176 LPSPI ブロッキング機能の問題 こんにちは、私はLPSPIを使用して作業しており、LPSPI_MasterTransferBlockingを使用しています。これはブロッキング機能なので、転送が完了するとLPSPIペリフェラルは空いていると予想しています。しかし、私は何か違うことを観察しました。 ブロッキング転送後、LPSPI_GetStatusFlagsを使ってSR(Status Register)を読み込み、返ってきた値は0x1001101でした。 何か提案はありますか？理想的には、ブロッキング転送の後、LPSPIはアイドル状態になっているはずです。参考までに、以下のコードスナップショットを共有します。 if((staus_flag & kLPSPI_ModuleBusyFlag) == kLPSPI_ModuleBusyFlag) { ret = STATUS_BUSY; PRINTF("SPI Busy, %x, %d\r\n", staus_flag, count); } else { masterXfer.txData = SpiTxData; masterXfer.rxData = SpiRxData; masterXfer.dataSize = spiTransferSize; masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous; status = LPSPI_MasterTransferBlocking(LPSPI1, &masterXfer); ret = STATUS_SUCCESS; staus_flag = LPSPI_GetStatusFlags(IMU_SPI_IF); PRINTF("staus_flag: %x\r\n", staus_flag); count++; //sw_asm_delay_us(2U); } Re:ImxRT 1176 LPSPIブロッキング機能の問題 ところで、LPSPI1とIMU_SPI_IFは同じです。

Comparing WFI-only vs VLSR transition approaches I'm working on a power-optimized bare-metal application using the S32K311. Our system runs a periodic task every 10ms, and remains idle the rest of the time. Currently, I'm evaluating two different strategies for reducing power consumption during idle periods:   Option 1 – WFI only: Let the MCU stay in RUN mode, and simply use __WFI() at the end of the main loop when there's nothing to do:   while (1) { if (task_ready) { DoSomething(); } __WFI(); // Sleep during idle }​ This approach keeps the PLL and high-speed clocks active, but gates the CPU core during idle time.   Option 2 – Dynamic VLSR/Run mode switching: Switch the MCU to VLSR mode (FIRC 3MHz) when idle, and back to RUN mode (PLL) when a task is ready:   while (1) { if (task_ready) { ChangeToRunMode(); DoSomething(); } else { ChangeToVLSRMode(); } } This reduces the clock domain frequency during idle, but introduces frequent MC_ME and clock domain switching.   My question: Is it practical and safe to switch between RUN and VLSR mode every few milliseconds? Could the overhead of frequent mode transitions outweigh the power saving benefit? Would NXP recommend one approach over the other for 10ms-periodic task scheduling? My primary goal is to achieve maximum power saving without causing system instability or excessive latency. I would really appreciate your technical opinion on this. Thanks in advance! Re: Comparing WFI-only vs VLSR transition approaches Hi @malove, You can look into the previous thread I shared, which shows various examples with RTD in low-level and high-level drivers. There is also the updated thread for RTD 4.0.0 & 5.0.0, since the original post is based in S32DS v3.4 + RTD 2.0.0. S32K3 Low Power Management AN and demos - NXP Community S32K3 Low Power Management AN and demos RTD 4.0.0 & 5.0.0 - NXP Community Specifically, you can look at the RTI_Cycl_Wkup example, which shows the usage of Normal and Fast cycle wake up by RTI Timeout, and you can change the standby time by changing the value of PIT_RTI_TIME in Wkup.h header. Best regards, Julián Re: Comparing WFI-only vs VLSR transition approaches Hello, I’d like to ask if there is any RTD support for transitioning between RUN mode and STANDBY mode. If such support exists, would it be possible to receive an example project or configuration demonstrating how to properly implement this transition using PIT? Thank you in advance for your help! Re: Comparing WFI-only vs VLSR transition approaches Hello @Julián_AragónM . Sorry for posting a duplicate thread. I must have accidentally submitted it twice. Please feel free to remove the previous one.   Thank you as always for your kind and helpful respo Re: Comparing WFI-only vs VLSR transition approaches Hi @malove, I can see you've also posted about a similar issue in this post: Inquiry about WFI + PIT Scheduler Use in Bare-metal on S32K311 - NXP Community. If this answer applies to that post as well, please let me know so I can close it instead. Actually, Option 2 is a recommended implementation if you need to cyclically monitor anything while trying to save power consumption. You can see in the S32K3xx Data Sheet, in chapter 6.9 (Cyclic wake-up current), a cyclic wake-up current example is presented. It shows data for an application that periodically (every 40ms) alternates between RUN mode, for approximately 200μs to scan several GPIO inputs (51 GPIOS), and spends the rest of the time in STANDBY mode. There are some recommendations in the S32K3 Low Power Management AN and demos document. One common issue for high current consumption is frequency of wake-up events is too high, which means that the MCU spends more time in Run or VLSR mode than in a low-power mode. The transition time from low-power mode to Run mode is quick. If the MCU only spends 9 ms in run and 1 ms in a low-power mode, the average current of the system will be considerably higher than if the MCU was running only 1 ms every 1 second.  Is it practical and safe to switch between RUN and VLSR mode every few milliseconds? Yes. Could the overhead of frequent mode transitions outweigh the power saving benefit? This is application dependent. As current consumption depends on various factors such as which modules are enabled, what frequency is feeding Core and other peripherals, temperature conditions, and so on. You can use the Power Estimation Tool (PET). Keep in mind the data provided in the tool are estimations only based on ideal conditions and should be used as reference. Would NXP recommend one approach over the other for 10ms-periodic task scheduling? Not really. You should measure consumption in both cases and evaluate which one is more beneficial for your specific application. Best regards, Julián

MCAL examples receiving SIGTRAP at startup on Hello all, I am using the S32K3X4EVB-T172, connected through USB - OpenSDA (J40) and with +12V power supply. I installed s32DS 3.6.0, Platform_Software_Integration_S32K3XX and SW32K3_S32M27x_RTD_R21-11_5.0.0. I tried examples from S32K3XX Autosar R21-11 RTD 5.0.0, in particular the example Port_Example_s32k344. After building and launching the code, the user led lights red (as coded in the example) but the program immediately suspends with the SIGTRAP, as seen in screenshot. I have the same SIGTRAP problem with the example Uart_Example_S32K344 which also uses MCAL . I don't have the problem when I try the example Siul2_Port_Ip_Example_S32K344 which does not use MCAL. I can run this example perfectly. Can you help me understand why this SIGTRAP appears in MCAL examples ? Thanks Pierre Re: MCAL examples receiving SIGTRAP at startup on hi Petr, the solution to my problem was to "source V15_MCU from ballast transistor using J31.2-3." When i do this I dont have the interrupt SIGTRAP I previously saw and can run the example perfectly. Thanks for the solution. Note: The first part doesnt work:   "set VDD_HV_A to 3.3V using J18.2-3". I can't program the evb and I ave the following message  Re: MCAL examples receiving SIGTRAP at startup on Hi, try to change jumper setting, one of below -set VDD_HV_A to 3.3V using J18.2-3. -source V15_MCU from ballast transistor using J31.2-3. BR, Petr Re: MCAL examples receiving SIGTRAP at startup on Hello Petr, Here is my example project. It has the sigtrap error when i compile and program on the eval board. Also here is a photo of my eval baord. As far as I can tell, the jumpers are still in their default position. BR, Pierre Re: MCAL examples receiving SIGTRAP at startup on Hi, can you share your full project with elf as well so I can test. Also share board picture to check jumper setting you have. BR, Petr Re: MCAL examples receiving SIGTRAP at startup on Hello, I add a screenshot with the live content of the register MC_RGM BR, Pierre Re: MCAL examples receiving SIGTRAP at startup on Hi Petr, No change with an infinite loop. The SIGTRAP interrupt happens after 1 or 2 or 3 blinks of the led. So the program end was not reached. Re: MCAL examples receiving SIGTRAP at startup on Hi, I tried that example and it worked fine with same SW/HW. Red LED blinks few time and main left finally and code stops at What if you modify main code to not leave it, let LED blinks forever. BR, Petr Re: MCAL examples receiving SIGTRAP at startup on Adding complementary info on my post: I use the unmodified example project "Port_Example_S32K344". I have this warning when I open example_Port.mex for the first time I didnt modify the debug pins set in "UnTouchedPortPin" in Peripherals menu. And when the SIGTRAP interrupt triggers, i have the following content inside the MC_RGM registers : I am stuck here, I can't run the MCAL example. Any help would be appreciated. Pierre

起動時にSIGTRAPを受信するMCALの例 皆さん、こんにちは。 私はS32K3X4EVB-T172を使用しており、USB-OpenSDA(J40)で接続され、+ 12V電源で接続されています。 s32DS 3.6.0をインストールしましたが、Platform_Software_Integration_S32K3XX と SW32K3_S32M27x_RTD_R21-11_5.0.0。 S32K3XX Autosar R21-11 RTD 5.0.0 の例、特に Port_Example_s32k344 の例を試しました。 コードをビルドして起動すると、ユーザーLEDが赤く点灯します(例でコード化されているように)が、スクリーンショットに示すように、プログラムはすぐにSIGTRAPで一時停止します。 MCALも使用している例Uart_Example_S32K344でも同じSIGTRAPの問題が発生しています。 MCALを使用しない例のSiul2_Port_Ip_Example_S32K344を試してみても問題はありません。この例は完璧に実行できます。 このSIGTRAPがMCALの例に表示される理由を理解するのを手伝ってもらえますか? 感謝 ピエール Re:起動時にSIGTRAPを受信するMCALの例 こんにちはペトル、 無限ループで変化はありません。 SIGTRAP割り込みは、LEDが1回、2回、または3回点滅した後に発生します。そのため、プログラムの終了には到達しませんでした。

比较仅 WFI 与 VLSR 过渡方法 我正在开发使用S32K311的功率优化裸机应用程序。 我们的系统每10ms运行一次周期性任务，其余时间保持空闲。 目前，我正在评估两种不同的减少空闲期间功耗的策略：   选项 1 – 仅限 WFI： 让 MCU 保持在运行模式，当没有什么可做时，只需在主循环结束时使用 __WFI()：   while (1) { if (task_ready) { DoSomething(); } __WFI(); // Sleep during idle }​ 这种方法使 PLL 和高速时钟保持活动状态，但在空闲时间对 CPU 内核进行门控。   选项 2 – 动态 VLSR/运行模式切换： 空闲时将 MCU 切换到VLSR 模式（FIRC 3MHz），任务就绪时切换回RUN 模式（PLL）：   while (1) { if (task_ready) { ChangeToRunMode(); DoSomething(); } else { ChangeToVLSRMode(); } } 这会降低空闲期间的时钟域频率，但会引入频繁的 MC_ME 和时钟域切换。   我的问题： 每隔几毫秒在 RUN 和 VLSR 模式之间切换是否实用且安全？ 频繁模式转换的开销是否会超过节能效益？ 对于 10ms 周期任务调度，NXP 是否会推荐一种方法？ 我的主要目标是实现最大程度的节能，同时不导致系统不稳定或过度延迟。 我非常感谢您对此的技术意见。 提前感谢！ 回复：比较仅 WFI 与 VLSR 转换方法 你好， 我想问一下是否有任何 RTD 支持在运行模式和待机模式之间转换。 如果存在这样的支持，是否可以收到一个示例项目或配置，演示如何使用 PIT 正确实施这种转变？ 提前感谢您的帮助！

JN5189 I was using OM15080-JN5189, and the firmware was the factory firmware. When conducting the zgwui test with the nxp tool, no matter what instructions were sent, there was no response. I performed the operation according to the ttug.pdf file.May I ask how I should configure it or what firmware to flash? 回复： JN5189 Hello. You can download JN-AN-1244 from here: https://www.nxp.com/webapp/sps/download/license.jsp?colCode=JN-AN-1244 BR, Mihai 回复： JN5189 Thank you for your reply. I can use it now, but I can't find the file JN-AN-1244. Could you please give me the relevant link? Re: JN5189 Hello, Hope you are doing well. Could you clarify what the "ttug.pdf" refers to? What is the process that you did to program the devices? Is there a specific guide or document you are following? I would recommend checking out the following documents: Zigbee 3.0 Getting Started DK6 Production Flash Programmer User Guide included in the SDK files under this path: SDK\docs\DK6-UG-3127-Production-Flash-Programmer Zigbee 3.0 IoT Control Bridge UserGuide under the path JN-AN-1247.zip\JN-AN-1247\Doc Best Regards, Ana Sofia.

ImxRT 1176 LPSPI blocking function issue Hello, I’m working with LPSPI and using LPSPI_MasterTransferBlocking. Since this is a blocking function, I expect the LPSPI peripheral to be free once the transfer is complete. However, I observed something different. After the blocking transfer, I read the SR (Status Register) using LPSPI_GetStatusFlags, and the returned value was 0x1001101. Do you have any suggestions? Ideally, after the blocking transfer, the LPSPI should be idle. I’m sharing a code snapshot below for reference.  if((staus_flag & kLPSPI_ModuleBusyFlag) == kLPSPI_ModuleBusyFlag) { ret = STATUS_BUSY; PRINTF("SPI Busy, %x, %d\r\n", staus_flag, count); } else { masterXfer.txData = SpiTxData; masterXfer.rxData = SpiRxData; masterXfer.dataSize = spiTransferSize; masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous; status = LPSPI_MasterTransferBlocking(LPSPI1, &masterXfer); ret = STATUS_SUCCESS; staus_flag = LPSPI_GetStatusFlags(IMU_SPI_IF); PRINTF("staus_flag: %x\r\n", staus_flag); count++; //sw_asm_delay_us(2U); } Re: ImxRT 1176 LPSPI blocking function issue Hi @chandan_uv , Thank you so much for your interest in our products and for using our community. Question:  After the blocking transfer, I read the SR (Status Register) using LPSPI_GetStatusFlags, and the returned value was 0x1001101. Answer: I check your LPSPI SR register value is 0x1001101, that is 0b0001 0000 0000 0001 0001 0000 0001, the TCF (Transfer Complete Flag) is 0,which means Transfer  Not complete. From IMXRT1170RM,  we can see the detail SR status TCF  description. In Master mode, indicates that all transfers have completed and that LPSPI has returned to Idle state and the transmit FIFO is empty. Question: Do you have any suggestions? Ideally, after the blocking transfer, the LPSPI should be idle. I’m sharing a code snapshot below for reference.  Answer: I suggest you can develop your project based on SDK demo. Please Verify the frame format configuration:  Make sure that the LPSPI settings (For example: Data Length, CPOL, CPHA) of the master device are exactly same to the slave device. Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu Re: ImxRT 1176 LPSPI blocking function issue BTW LPSPI1 and IMU_SPI_IF is same.

Wi-Fiのみの移行アプローチとVLSRの移行アプローチの比較 私は S32K311を使用して電力最適化ベアメタルアプリケーションに取り組んでいます。 私たちのシステムは 10ミリ秒ごとに定期的なタスクを実行し、残りの時間はアイドル状態のままです。 現在、アイドル時の電力消費量を削減するための2つの異なる戦略を検討しています。   オプション1 — WFIのみ： MCUをRUNモードのままにして 、何もすることがないときはメインループの最後に__WFI () を使用してください。   while (1) { if (task_ready) { DoSomething(); } __WFI(); // Sleep during idle }​ このアプローチでは、PLLと高速クロックはアクティブのままですが、アイドル時にはCPUコアをゲートします。   オプション 2 – ダイナミック VLSR/実行モードの切り替え: アイドル時には MCU を VLSR モード (FIRC 3MHz) に切り替え、タスクの準備ができたら RUN モード (PL) に戻します。   while (1) { if (task_ready) { ChangeToRunMode(); DoSomething(); } else { ChangeToVLSRMode(); } } これにより、アイドル時のクロック ドメイン周波数は低下しますが、MC_ME とクロック ドメイン スイッチングが頻繁に発生します。   私の質問: RUNモードとVLSRモードを数ミリ秒ごとに切り替えるのは実用的で安全ですか ？ 頻繁なモード遷移のオーバーヘッドが、省電力のメリットを上回る可能性はありますか？ NXPは、10ミリ秒の周期的なタスクスケジューリングでは、ある方法を他の方法よりも推奨しますか？ 私の主な目標は、システムが不安定になったり、待ち時間が長すぎたりすることなく、最大限の省電力を達成することです。 これについての技術的な意見をいただければ幸いです。 よろしくお願いいたします！ Re:WFIのみの移行アプローチとVLSRの移行アプローチの比較 こんにちは、RUNモードとSTANDBYモードの間の移行に関するRTDサポートがあるかどうか尋ねたいです。 そのようなサポートがあれば、PITを使用してこの移行を適切に実装する方法を示すサンプルプロジェクトまたは構成を受け取ることはできますか？ よろしくお願いします!

ImxRT 1176 LPSPI阻塞功能问题 您好，我正在使用 LPSPI 并使用 LPSPI_MasterTransferBlocking。由于这是一个阻塞功能，我希望一旦传输完成，LPSPI 外围设备就会空闲。然而，我观察到了一些不同的东西。 阻塞传输后，我使用LPSPI_GetStatusFlags读取SR（状态寄存器），返回值为0x1001101。 你有什么建议吗？理想情况下，阻塞传输之后，LPSPI 应该处于空闲状态。我在下面分享一个代码快照以供参考。 if((staus_flag & kLPSPI_ModuleBusyFlag) == kLPSPI_ModuleBusyFlag) { ret = STATUS_BUSY; PRINTF("SPI Busy, %x, %d\r\n", staus_flag, count); } else { masterXfer.txData = SpiTxData; masterXfer.rxData = SpiRxData; masterXfer.dataSize = spiTransferSize; masterXfer.configFlags = kLPSPI_MasterPcs0 | kLPSPI_MasterPcsContinuous; status = LPSPI_MasterTransferBlocking(LPSPI1, &masterXfer); ret = STATUS_SUCCESS; staus_flag = LPSPI_GetStatusFlags(IMU_SPI_IF); PRINTF("staus_flag: %x\r\n", staus_flag); count++; //sw_asm_delay_us(2U); } 回复：ImxRT 1176 LPSPI 阻塞功能问题 顺便说一下，LPSPI1 和 IMU_SPI_IF 是相同的。

ERR050481 on S32G platform Hi, I know that there implemented workaround for ERR050481 erratum in ATF and linux kernel, but I do not know where can get accessible file for this erratum to describe the detail of the issues like ERR050481. So would you please help to tell the erratum file for S32G platform? Thanks, Zhantao Re: ERR050481 on S32G platform Hi Depending on the S32G product you are using, you should be able to find the ERRATA documentation under the specific product page under the "Documentation" section similar to the one shown below: Please, let us know.

i.mx RT 1175 SDRAM J-Link 启动脚本 使用 SDRAM 将 J-Link 连接/接口到 i.MX RT 1175 M7 核心时出现问题。看到一篇有 M4 代码但没有 M7 的帖子。从 NXP 文档中看到的所有内容来看，M7 首先启动。使用 J-link 或 PE Micro 编程器时，在评估板上将 SDK 示例程序运行在 SDRAM 上会失败。然而，使用内置 LS 编程器时，同一程序在评估板上运行良好。如果是使用内部存储器运行的 SDK 示例程序，那么这三个编程器都可以正常工作。

S32K344 / MR-CANHUBK344 - Zephyr 支持 论坛上是否有人可以确认 MR-CANHUBK344 开发板仍在最新的 Zephyr 版本（v3.6.0 或 v3.7.0-rc3）下工作？ 当尝试通过 JLink（v7.98a）启动开发板时，我们遇到了许多虚假故障。 主板和调试器看起来都正常，它们将毫无问题地运行默认示例 S32DS 项目。据我们所知，这似乎与 S32K3 与 Zephyr 平台的集成更相关，更有可能处于早期内核初始化阶段。 在 v3.7.0-rc3 上使用带有 Zephyr Blinky 项目的 Ozone，我们在重置后几乎立即看到 BFAR 寄存器为 0x5AA55AC0 的 BusFaults。 希望这只是我们配置中的问题，或者如果有人有可行的解决方案，您正在使用 Zephyr 的哪个分支/标签？ 谢谢！