68LC302 and serial bootstrap feature Hi all. Hopefully there is still someone around in 2026 that has some knowledge tucked away in the back of their brains regarding the LC302. I've been working on a little project involving an LC302 and I am interested in using the serial bootstrap feature. I just cant seem to get it to work and I wondered if there is anything particularly special that needs to be done to make it work. I've tried everything I can think of, and I'm currently looking at replacing the LC302 that I currently have in case it is somehow faulty, but thought I'd ask the question before I go to that effort. FWIW the markings on the package are (with Motorola logo): MC68LC302PU25CT 2J29A QQDJ0316 I am powering it with 5V. Basically I cannot get it to echo back anything that I am sending to it. I came across the following post which seemed to describe the same problem, but I dont seem to have the same issue: https://community.nxp.com/t5/ColdFire-68K-Microcontrollers/We-have-been-using-the-68LC302-for-decades-without-major/m-p/612300 Things I've tried/I can observe with my scope/logic analyser: I've tried using both PLL mode and not. In PLL mode I used a 4MHz oscillator (4.192 is hard to come across). In this mode I used 9174 baud (4MHz*4, /109, /16). Without the PLL I used a 20MHz oscillator with baud 11467. I've used my signal generator to feed 4.192MHz in and used the baud rate quoted in the datasheet also to no avail. If I pull PA7 high to disable bootstrap mode, I can observe some brief activity on the AS pin, presumably as the CPU tries to read its reset vector from external memory. If I pull PA7 low to enable bootstrap mode I don't observe this activity any more, presumably as the CPU is held in reset. I did early on discover that PA7 seems to have some kind of current source on it, and was sourcing approx 3-4mA of current (measured with my multimeter in current mode), overpowering my external pull down resistor and resulting in a logic high. This feels like an extremely high amount of current to me, and does anyone have an explanation for that? It seems vaguely related to the above thread causing PA7 to be pulled too high unexpectedly. Maybe my part is faulty? Reset and HALT are being asserted simultaneously (I've got lots of 68k experience from hobby projects over the past several years). 🙂 I've double and triple checked all of my wiring including the polarity of the TX/RX signals, and even pulled the flow control inputs for SCC1 to their negated state just in case. I've measured with my oscilloscope that my USB-serial adapter does indeed generate the baud rate that I am requesting, and looping TX to RX allows me to echo back the characters that I send in putty, so I am fairly confident there is nothing odd going on there. I havent wired up any of the memory busses, because for now I am just interested to see if I can load some code in via serial and make an LED blink, but the BUSW pin has been strapped for 16-bit bus operation, if that matters? Does anyone have any other suggestions before I go desoldering stuff? Thanks! Re: 68LC302 and serial bootstrap feature Hi, thanks for the message. I have made sure that I am using SCC1 related pins. My setup is on a perfboard with wire wrap, so there are no other influences on any of the pins other than what I have wire wrapped. I've verified with a multimeter that reset and halt are asserted together and that they reach 0V, and that all strap pins are seeing the required voltage levels with no floating pins. Also, as mentioned in my post, I have also tried using 4.192MHz supplied by my signal generator and the baud rate quoted in the datasheet, but this didn't help. Apologies when I said I had tied CD1 to its negated state, I've just mixed up my terminology and it is indeed tied to ground (asserted), along with CTS1 for good measure. I'll try sending 576 bytes as a test in case it is just not echoing them back for some reason, but is still receiving them correctly. Thanks Re: 68LC302 and serial bootstrap feature Hello, The first thing I would check is CD1 . For the LC302 serial bootstrap echo path, the manual says the SCC hardware echoes received characters back on TXD1 , but CD1 must be asserted; on SCC1 the external CD1 pin must be tied low . If you pulled the SCC1 modem-control inputs to their “negated” state, that may be exactly why you see no echo. Other important points from the LC302 boot description: Serial bootstrap is enabled by sampling PA7 = 0 during hard reset , where hard reset means both RESET and HALT asserted . PA7 must not float; it must be deliberately pulled high or low during reset. The first 576 bytes received on SCC1 are stored in dual-port RAM, and each received character is echoed back out of TXD1 ; the device will not leave boot mode until all 576 bytes are received. For internal-clock bootstrap, the documented nominal clock assumptions are 4.192 MHz or 32.768 kHz , with the SCC programmed to approximately 9600 baud. In asynchronous UART mode, the bit rate is 1/16 of the TCLK1/RCLK1 clock rate when using the external clock option. So before replacing the part, I would try this exact minimal setup: Hold RESET and HALT low together . Strap PA7/BOOT low with a strong enough pulldown to overcome whatever is on your board. Select the intended clock mode with PA5 : PA5 = 0 : internal boot clock mode. PA5 = 1 : external clock on TCLK1/RCLK1 , 16× baud. Strap PA12/MODCLK0 consistently with the clock source; the manual samples it during hard reset to distinguish the nominal EXTAL frequency. Tie CD1 low . Keep RXD1 , TXD1 , RCLK1 , and TCLK1 wiring consistent with SCC1, not SCC2. The boot feature is for SCC1 in the LC302 description. Send a full 576-byte test stream, not just one character, although the echo should appear character-by-character once receive is working. The 3–4 mA sourced from PA7 is suspicious . The datasheet-level input leakage value retrieved is only 20 µA max , far below milliamps. Since PA7 is also a bidirectional multi-function pin, it is possible to get contention if something else is driving it or if the part has already left the reset-sampling state, but during reset-as-boot-strap it should not require sinking several mA just to read a low. I would check for a board-level pullup/driver/solder bridge on PA7 , verify the package pin orientation, and measure the current while both RESET and HALT are actively asserted. One more practical note: your 4 MHz internal-clock attempt is not equivalent to 4.192 MHz . It may be close enough for some UARTs if the other side is adjusted, but the documented internal bootstrap mode assumes the nominal LC302 clock values, so for eliminating variables I would use 4.192 MHz with the documented baud , or use the external-clock mode and provide clean TCLK1/RCLK1 = 16 × baud .   regards

From Simulation to Vehicle Control: Real-Time Decision Making on the S32N55 1 Table of Contents • Introduction • Overview • Context • References • Conclusion 2 Introduction Modern vehicle development increasingly relies on digital validation before physical prototypes are available. Simulation enables rapid testing and iteration, but engineering teams also need to demonstrate how virtual behavior maps to real hardware. In the Hello World demonstrator, this connection is handled by the Main Node application running on the NXP S32N55. The Main Node acts as the central execution point of the demonstrator, transforming vehicle information generated inside MATLAB ® and Simulink ® into decisions and actions that can be observed on physical hardware. By combining Model-Based Design, CAN communication, and centralized decision making, the system creates a bidirectional link between the virtual vehicle and the physical demonstrator. This article explains how the Main Node converts simulation inputs into coordinated vehicle behavior while maintaining synchronization between the digital and physical domains. 3 Overview As introduced in the previous article, the S32N55 functions as the communication hub of the demonstrator, aggregating information from distributed modules and distributing commands throughout the system. Beyond communication, however, the Main Node also serves as the decision-making layer responsible for interpreting vehicle state and translating it into actionable control signals. Developed using the NXP Model-Based Design Toolbox (MBDT), the application is entirely modeled in Simulink and deployed directly onto the target hardware. This workflow enables engineers to focus on vehicle functionality and system behavior while leveraging automated code generation and integrated CAN communication support. The Main Node receives data from simulated and physical sources, maintains a coherent vehicle-state view, runs vehicle-level control logic, and sends commands to the actuator nodes that make up the demonstrator. This centralized architecture reflects the direction of modern software-defined vehicle platforms, where coordination moves from isolated ECUs toward higher-level compute nodes. Figure 1. Main Node overview showing how the S32N55 coordinates simulation inputs, vehicle-state processing, and commands to distributed hardware modules. 4 Context The Main Node is positioned between the virtual vehicle environment and the physical hardware modules that form the demonstrator. Driver inputs generated through the Driver-in-the-Loop simulation environment are transmitted over CAN and received by the S32N55, where they are processed alongside feedback arriving from multiple distributed nodes. Commands such as vehicle speed, steering angle, gear selection, braking requests, and lighting controls enter the Main Node from the simulation environment. These inputs are then evaluated by the application and translated into CAN messages that drive the corresponding hardware modules. This architecture enables the physical demonstrator to mirror the behavior of the virtual vehicle. When the simulated vehicle accelerates, the speed command is interpreted by the Main Node and forwarded to the motor control subsystem. Steering-wheel movements are translated into steering-angle commands for the steering module, while lighting commands activate headlights, fog lights, hazard lights, and turn indicators on the physical hardware. Figure 2. System context illustrating the Main Node as the bridge between the virtual vehicle environment and the physical demonstrator hardware. The Main Node can be driven either by the Driver-in-the-Loop simulation or by the External Control model. In both cases, the command source publishes the same DBC-defined CAN frames, so the S32N55 receives speed, steering, brake, gear, and lighting commands through the same interface. This allows the same deployed application to be exercised from two sources without changing the Main Node software. This approach is especially useful during integration, demonstrations, and incremental validation. Engineers can exercise the Main Node and the downstream actuator modules even when the complete virtual environment is not active, while still preserving the exact communication contract used by the full system. As a result, the application can be validated against two different input sources without changing the deployed software on the board. Rather than acting as a simple gateway, the Main Node continuously evaluates received information and executes vehicle-level decisions. One example is the processing of motor feedback data, where information from multiple motors is combined to derive a representative vehicle speed used throughout the system. Centralizing this functionality simplifies system coordination while ensuring consistency across all connected modules. Gear selection is handled as part of this centralized decision layer. The incoming gear command is interpreted as a driving mode that affects how the requested speed is applied: Park and Neutral block motion commands, Reverse changes the sign of the velocity reference, and Drive or Sport propagate the requested speed as a forward-driving command. This keeps speed-control behavior aligned with the selected driving mode while preserving the same driver-input signal set. The target-speed command is computed from the requested speed reference, the selected gear mode, the reported vehicle speed, and the effective brake command. Motor feedback is fused into a representative reported speed, which provides the actual-speed reference used during braking decisions. Under normal driving conditions, the requested target speed passes through the gearbox-aware logic and is converted into the motor-speed command sent over CAN. When braking is active, the Main Node bases the outgoing command on the detected speed and brake value, reducing the command until the vehicle is considered stopped. The Main Node also hosts the demonstrator's automated emergency braking functionality. Parking sensor nodes continuously report obstacle distances over CAN. The application evaluates these measurements and determines whether an object has entered a predefined safety zone. When this condition is met, the braking command issued by the driver can be overridden and replaced with an emergency braking request generated by the system. Figure 3. Parking sensors in action detecting nearby obstacles and providing distance feedback used by the Main Node to support emergency braking decisions. An important aspect of this implementation is that the braking behavior is reflected across both domains. The physical hardware responds to the braking request, while the simulation environment can receive corresponding vehicle-state updates through the same CAN-based loop. This closed-loop behavior demonstrates bidirectional interaction between simulation and embedded execution, allowing safety-related functionality to be validated in a realistic environment before a full vehicle prototype is available. Figure 4. Closed-loop emergency braking flow showing how parking sensor feedback can trigger an automated braking request across both the physical and simulated domains. CAN communication is the key enabler of this architecture. Every subsystem communicates through DBC-defined interfaces, allowing functionality to be distributed across multiple independent nodes while preserving a consistent and scalable communication framework. The shared DBC approach ensures that signal definitions remain synchronized across all parts of the demonstrator. To support this workflow, MathWorks Vehicle Network Toolbox ™ provides direct integration between MATLAB ® , Simulink ® , and CAN communication interfaces. DBC files can be used directly throughout the development process, simplifying signal management and ensuring consistency across the virtual vehicle, the Main Node, and all peripheral modules. As the demonstrator grows to include additional functionality, the same network definition can be reused across all participating systems, reducing integration effort and helping accelerate development. Note: The combination of NXP Model-Based Design Toolbox and MathWorks Vehicle Network Toolbox creates a workflow in which vehicle behavior, communication interfaces, and deployed software remain aligned from modeling through system integration. Figure 5. CAN and DBC workflow showing how shared signal definitions keep the virtual vehicle, Main Node, and distributed hardware modules synchronized. 5 References NXP Model-Based Design Toolbox (MBDT) NXP S32N Vehicle Super-Integration Processors Vehicle Network Toolbox ™ NXP Model-Based Design Toolbox Community 6 Conclusion The Main Node demonstrates how a centralized compute platform can act as more than a communication gateway. Running on the NXP S32N55, it combines signal aggregation, decision making, and command distribution into a single application that coordinates the entire demonstrator. By transforming simulation-generated inputs into physical vehicle behavior and feeding real-world information back into the virtual environment, the Main Node creates a practical closed-loop development platform. Together, NXP Model-Based Design Toolbox, MathWorks Vehicle Network Toolbox, and CAN-based communication enable rapid iteration, simplified integration, and efficient validation of vehicle functionality across simulated and physical domains.

i.MX8MP_EVK: YOCTOコンパイルエラー do_package() (問題:tar & *at()) こんにちは、 これが私のヨクトビルドのパラメータです: リリース: imx-linux-walnascar BSPバージョン: imx-6.12.49-2.2.0 マシン: imx8mpevk ディストリビューション: fsl-imx-xwayland 私はこのビルド環境をここ数ヶ月間、問題なく使用しています。しかし、突然添付のエラーが発生するようになりました。 トラブルシューティングのため、ビルド環境を完全にクリーンアップし、リポジトリを再初期化（ repo init ）し、すべてを再度同期してから、新規ビルドを実行しました。しかし、残念ながら、依然として同じ問題が発生しています。 ご参考までに、添付のログファイルをご確認ください。根本原因の特定と解決策のご提案にご協力いただければ幸いです。 i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) bitbake imx-image-core Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) どの「bitbakeコマンド」を使用していますか？ 確認作業を行います。 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) ご返信ありがとうございます。 ビルド環境を確認したところ、既に推奨された構成と一致していました。 ホストOS: Ubuntu 22.04.5 LTS (Jammy) GNU tar バージョン: GNU tar 1.34 $ cat /etc/os-release PRETTY_NAME="Ubuntu 22.04.5 LTS" ... $ tar --version tar (GNU tar) 1.34 しかし、私は依然として同じ失敗に遭遇します Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) ホストOSがUbuntu 24.04でtarのバージョンが1.35の場合は、tarのバージョンを確認してください。 コンテナまたは仮想マシン内でビルドするには、以下を使用します。 Ubuntu 22.04 LTS GNU tar 1.34 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 下記にファイルがあります。 ここにエラーメッセージの一部を貼り付けます DEBUG:python関数の実行extend_recipe_sysroot 注意:直接依存関係は['/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/binutils/binutils-cross_2.44.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/gcc/gcc-cross_14.3.bb:do_populate_sysroot','/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.68.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kern-tools/kern-tools-native_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-core/coreutils/coreutils_9.6.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/flex/flex_2.6.4.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/rpm/rpm_4.20.0.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-extended/bc/bc_1.08.1.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kmod/kmod_34.1.bb:do_populate_sysroot'] 注意:sysrootにインストールされています: [] 注意:sysrootで既に存在しているようにスキップしています: ['gettext-minimal-native', 'binutils-cross-aarch64', 'cmake-native', 'gcc-cross-aarch64', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'kern-tools-native', 'linux-libc-headers', 'file-native', 'openssl-native', 'coreutils-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'zlib-native', 'bison-native', 'dwarfsrcfiles-native', 'elfutils-native', 'flex-native', 'git-native', 'gnu-config-native', 'json-c-native', 'libedit-native', 'lua-native', 'make-native', 'patch-native', 'perl-native', 'pkgconfig-native', 'pseudo-native', 'python3-native', 'rpm-native', 'bc-native', 'bzip2-native', 'libarchive-native', 'libidn2-native', 'lzlib-native', 'xz-native', 'zstd-native', 'kmod-native', 'acl-native', 'attr-native', 'curl-native', 'gdbm-native', 'gmp-native', 'gnutls-native', 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libmpc-native', 'libunistring-native', 'mpfr-native', 'nettle-native', 'p11-kit-native', 'popt-native', 'sqlite3-native'] DEBUG: Python関数extend_recipe_sysroot完了しました DEBUG:python関数の実行sstate_task_prefunc DEBUG: Python関数sstate_task_prefunc完了しました DEBUG:python関数の実行do_package DEBUG:python関数の実行package_setup_pkgv DEBUG:Python関数package_setup_pkgv 終わった DEBUG:python関数の実行package_convert_pr_autoinc DEBUG: Python関数package_convert_pr_autoinc完了しました DEBUG:python関数の実行package_prepare_pkgdata 注意:pkgdata-sysrootにインストールされています: [] DEBUG: Python関数package_prepare_pkgdata完成しました DEBUG:python関数の実行perform_packagecopy ERROR: exec_func_python()でPython関数を実行する際にエラーが生成されました: この例外/失敗を引き起こしたPython呼び出しのスタックトレースは以下の通りです: ファイル: 'exec_func_python() autogenerated', lineno: 2, function: 0001: 0002:perform_packagecopy(d) 0003: ファイル: '/home/vvdn/LWT_Build/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[パッケージ] = "${PKGD}" *** 0363: 0364:Python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = " ${D} " ファイル: '/usr/lib/python3.10/subprocess.py'、行番号: 421、関数: check_output 0417: それ以外の場合: 0418: 空 = b'' 0419: kwargs['input'] = 空 0420: *** 0421: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423: 0424: 0425:class CompletedProcess(object): ファイル: '/usr/lib/python3.10/subprocess.py'、行番号: 526、関数: 実行 0522: # process.wait() は呼び出しませんとして。 __exit__それは私たちのためにやってくれる。 0523: 上げる 0524: retcode = process.poll() 0525: チェックして戻りコードを取得する場合: *** 0526: raise CalledProcessError(retcode, process.args, 0527: 出力=標準出力、標準エラー=標準エラー) 0528: return CompletedProcess(process.args, retcode, stdout, stderr) 0529: 0530: 例外: subprocess.CalledProcessError: コマンド 'tar --exclude=./sysroot-only'-cf - -C /ホーム/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/Linux-imx/6.12.34+git/image -p -S .|tar -xf - -C /home/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/linux-imx/6.12.34+git/package' は非ゼロの退出ステータス2を返しました。 サブプロセスの出力: 不明なディレクトリ、fd 4 に対して *at() システムコールが呼び出されました fd 4 の不明なベースパス、パス lib 'lib' の絶対パスを割り当てられませんでした。 tar: ./usr/lib:Cannot mkdir: 悪いアドレス 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基底パス、パスライブラリ 「リベラル」に絶対的な道を割り当てることができませんでした。 未知ディレクトリの*at() syscallを取得、fd 4 FD 4の未知の基底パス、パスライブラリ 「リベラル」に絶対的な道を割り当てることができませんでした。 tar: ./usr/lib:Cannot mkdir: 悪いアドレス TAR: ./USR/lib/modules:Cannot mkdir:そのようなファイルやディレクトリは存在しません Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 添付ファイルをダウンロードする権限がないようです。 もう一度送っていただけますか？ Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) こんにちは@yipingwang  さらなるデバッグのサポートをお待ちしています。 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Ubuntu PCで、「sudo apt install tar=1.34+dfsg-1build3」コマンドを使用してください。

FS26 低压差线性稳压器(LDO) 关闭问题 Hello 我使用的是 FS26 和 S32K358。 我使用 FS26 的 VLDO2 作为 MCU 的电源，使用 FS26 的 VLDO1 作为 CAN 收发器的电源。 当 MCU 处于 CAN 通信状态时，FS26 的 VLDO 会关闭，从而切断 MCU 的电源。 （这种情况随机发生，大约每 1 至 8 小时发生一次。） 只有当 FS26 的电源被切断再恢复后，VLDO 才能恢复正常工作。 这个问题出现在所有电路板上，而不仅仅是单个电路板上，而且当 CAN 通信未进行时不会出现此问题。 问题发生时的状态如下： Vpre 6V O VDIG 1.6VO VBOS 5V O VLDO2 X VLDO1 X VCORE X DFS已通过OTP禁用。 我想了解 FS26 目前的状况以及导致这种情况发生的原因。 Re: FS26 LDO Off Issue 你好kjy106906 再会！ 监视程序是否已启用？ 以下各项的值是多少： FS_STATES FS_GRL_FLAGS FS_OVUV_REG_STATUS M_REG_FLG 故障发生后立即出现 M_STATUS 吗？ 你检查过FS26是否显示任何UV或OV标志吗？ 另外，能否分享一下您的 M_STATUS？ 希望这些信息对您有所帮助，如果您还需要其他帮助，请告诉我。 祝你今天过得愉快，一切顺利。 Re: FS26 LDO Off Issue @RafaR 感谢您的回复。 遗憾的是，MCU 已从 SBC 获得电源，但由于 VLDO 已关闭，因此无法进行通信。 必须切断并重新接通电路板电源，MCU才能正常工作。 监视窗口是无限的。

MCXW72のデバッグ認証応答 MCXW72のデバッグポートのロックを解除しようとしています。MCUXpressoのSecure Provisioning Toolでロック解除は正常に動作しますが、Debug Credential(DC)、DCK秘密鍵、デバイスから受け取ったDACに基づいて自分のアプリケーションを使ってポートのロック解除を試みています。 この分野のドキュメントは非常に不明瞭で(場合によっては誤りもあります)。 私の理解では、DARは以下の要素で構成されています。 DAR = DC + AB + UUID (DACより) + 署名 (リファレンス・マニュアルの図50ではUUIDとABフィールドの順序が誤っています。) OpenSSLを使って署名を計算したいのですが、どのデータを署名すべきか正確には判断できません。 a) DC + CV（DACから） b) DC + AB + CV (DACから) c) DC + AB + UUID (DACから) + CV (DACから) それとも全く別の何か？ ドキュメントには署名がDARをチャレンジベクトル(CV)に結合すると記載されていますが、ハッシュ化と署名すべき正確なバイトシーケンスは明確に指定されていません。DAR署名を生成するために使われる正確なデータを教えていただけますか? MCXA セキュリティ（EdgeLock | セキュアブート | OTP） Re: Debug authentication Response for MCXW72 こんにちは、 @Surdej Secure Provisioning ToolはSecure Provisioning SDKの上に構築されています。詳細は https://spsdk.readthedocs.io/en/latest/ これはオープンソースなので、そこで答えが見つかります。

[S32K3] [RTD 7.0.1]BCTUモジュールにおける3つの課題 RTDコードバージョンS32K3_RTD_7_0_1_D2602_ASR_REL_4_9_REV_0000_20260206のBCTUモジュールに3つの問題が見つかりました。詳細な問題点は以下のとおりです。   問題 1:ファイルAdc_TS_T40D34M70I1R0/src/Bctu_Ip.cの 1558 行目で、現在のコードではビットごとの OR 代入を使用しています: BctuBasePtr->FIFOERR |= FifoWatermarkMask;これを直接代入に変更する必要があります: BctuBasePtr->FIFOERR = FifoWatermarkMask;   問題2：ファイルAdc_TS_T40D34M70I1R0/src/Bctu_Ip.cの567行目と568行目に、既存のコードに誤ったビットシフト演算が含まれています。元のコードは以下のとおりです。 ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_OVR_ERR << (Index * 2u))) != 0U) ?(BCTU_FIFOERR_OVR_ERR_FIFO1_MASK << Index) : 0U; ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_UNDR_ERR << (Index * 2u))) != 0U) ?(BCTU_FIFOERR_UNDR_ERR_FIFO1_MASK << インデックス) : 0U; これらの2行は、以下のように正しいシフトロジックに修正する必要があります。 ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_OVR_ERR << Index)) != 0U) ?(BCTU_FIFOERR_OVR_ERR_FIFO1_MASK << (Index * 2u)) : 0U; ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_UNDR_ERR << Index)) != 0U) ?(BCTU_FIFOERR_UNDR_ERR_FIFO1_MASK << (インデックス * 2u)) : 0U;   問題3: MCAL/SDKコード生成ツールとBCTUモジュールの静的ソースコードの間に型の整合性の問題があります。MCAL で生成されたコード ( Adc_TS_T40D34M70I1R0/generate_PB/Adc_RegOperations.m 、2397行目）では、ヘッダーファイルとCファイルの両方で定義されている配列は、一律にuint32型を採用しています。SDK生成コードでは、ヘッダーファイルとCファイルの型定義が一貫していません。eclipse/mcu_data/components/PlatformSDK_S32K3/Bctu_Ip/Bctu_Ip_PBcfg.hの配列型は(249行目)は、BctuFifoDmaRawDataオプションが有効になっているかどうかに応じてuint16とuint32を切り替え、対応する配列はeclipse/mcu_data/components/PlatformSDK_S32K3/Bctu_Ip/Bctu_Ip_PBcfg.cの対応する配列です（317行目）はuint32型に固定されています。静的コード ( Adc_TS_T40D34M70I1R0/src/Bctu_Ip.c 、1629行目）では、送信長（2バイトまたは4バイト）はBctuFifoDmaRawData構成に基づいて動的に決定されます。BctuFifoDmaRawDataオプションのチェックを外すと、以下の異常な問題がすべて発生します。 1.SDKプロジェクトの場合:ヘッダーファイルとCファイルの配列型が不一致で、直接コン パイル失敗を引き起こします。 2. MCALプロジェクトの場合:コンパイルは成功しますが、固定されたuint32配列定義のため メモリ容量の半分が無駄になります。さらに、各uint32データユニットには2つのADC結果が含まれているため、データ解析時にuint16の高値と低値を手動で分割する必要があります。 上記の3つのバグは、公式バージョンS32K3_RTD_7_0_1_D2602_ASR_REL_4_9_REV_0000_20260206に存在します。NXPのソフトウェアエンジニアが次回RTDリリースでこれらのBCTUモジュールの欠陥を修正できることを期待しています。 Re: [S32K3] [RTD 7.0.1] Three Issues in the BCTU Module こんにちは、@ chenwilsoft あなたの質問は社内フォーラムにエスカレーションされており、設計チームからの確認を待っています。 Re: [S32K3] [RTD 7.0.1] Three Issues in the BCTU Module こんにちは、@ chenwilsoft ご意見ありがとうございます。 ソフトウェアチームと私はこれらの問題を確認しましたが、確かにバグです。 これらの問題は社内でエスカレーションしており、今後のアップデートで修正する予定です。

[S32K3] [RTD 7.0.1]BCTU模块中的三个问题 我在 RTD 代码版本S32K3_RTD_7_0_1_D2602_ASR_REL_4_9_REV_0000_20260206中发现了 BCTU 模块的三个问题。具体问题如下：   问题 1：在文件Adc_TS_T40D34M70I1R0/src/Bctu_Ip.c 的第 1558 行，当前代码使用按位或赋值： BctuBasePtr->FIFOERR |= FifoWatermarkMask;应修改为直接赋值： BctuBasePtr->FIFOERR = FifoWatermarkMask;   问题 2：在文件Adc_TS_T40D34M70I1R0/src/Bctu_Ip.c的第 567 行和第 568 行中，现有代码包含不正确的位移操作。原始代码如下所示： ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_OVR_ERR << (Index * 2u))) != 0U) ?（BCTU_FIFOERR_OVR_ERR_FIFO1_MASK << Index） : 0U; ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_UNDR_ERR << (Index * 2u))) != 0U) ?(BCTU_FIFOERR_UNDR_ERR_FIFO1_MASK << 索引) : 0U; 这两行代码应按如下方式修改为正确的换行逻辑： ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_OVR_ERR << Index)) != 0U) ?（BCTU_FIFOERR_OVR_ERR_FIFO1_MASK << （索引 * 2u）） : 0U; ClrMask |= ((u32Mask & (BCTU_IP_STATUS_FIFO1_UNDR_ERR << Index)) != 0U) ?(BCTU_FIFOERR_UNDR_ERR_FIFO1_MASK << (索引 * 2u)) : 0U;   问题 3： MCAL/SDK 代码生成工具与 BCTU 模块的静态源代码之间存在类型不一致对齐问题。在 MCAL 生成的代码（ Adc_TS_T40D34M70I1R0/generate_PB/Adc_RegOperations.m中，第 2397 行），头文件和 C 文件中定义的数组统一采用uint32类型。在 SDK 生成的代码中，头文件和 C 文件中的类型定义不一致： eclipse/mcu_data/components/PlatformSDK_S32K3/Bctu_Ip/Bctu_Ip_PBcfg.h中的数组类型（第 249 行）根据BctuFifoDmaRawData选项是否启用，在uint16和uint32之间切换，而eclipse/mcu_data/components/PlatformSDK_S32K3/Bctu_Ip/Bctu_Ip_PBcfg.c中的相应数组（第 317 行）固定为uint32类型。在静态代码（ Adc_TS_T40D34M70I1R0/src/Bctu_Ip.c中，第 1629 行），传输长度（2 字节或 4 字节）是根据BctuFifoDmaRawData配置动态确定的。当取消选中BctuFifoDmaRawData选项时，会出现以下所有异常问题： 1.对于 SDK 项目：头文件和 C 文件之间数组类型不匹配会导致直接编译失败。 2. 对于 MCAL 项目：虽然编译可以成功，但固定的 uint32 数组定义导致一半的内存空间被浪费。此外，每个 uint32 数据单元包含两个 ADC 结果，需要在数据解析期间手动拆分高 uint16 值和低 uint16 值。 以上三个错误存在于官方版本S32K3_RTD_7_0_1_D2602_ASR_REL_4_9_REV_0000_20260206中。我们希望恩智浦软件工程师能在下一个 RTD 版本中修复这些 BCTU 模块缺陷。 Re: [S32K3] [RTD 7.0.1] Three Issues in the BCTU Module 您好@chenwilsoft 您的问题已提交至内部论坛，正在等待设计团队的确认。 Re: [S32K3] [RTD 7.0.1] Three Issues in the BCTU Module 您好@chenwilsoft 感谢您的反馈。 软件团队和我已经确认了这些问题，它们确实是软件漏洞。 我们已将这些问题上报内部，并将在未来的更新中修复它们。

i.MX8M Plus - Dedicated I2C for Display and Camera Hi Team, Just wanted to confirm if there is any Dedicated I2C for Display and Camera. (like I2C2 for Display and I2C4 for Camera) or there is no restriction on configuring can i use any I2C for Display and camera interfaces? Re: i.MX8M Plus - Dedicated I2C for Display and Camera You can use any available I2C controller for display-related or camera-related devices on i.MX8M Plus. There is no dedicated "camera I2C" or "display I2C" inside the SoC. The choice is determined by your hardware design and device-tree configuration.

i.MX8MP_EVK：YOCTO 编译错误 do_package()（问题：tar & *at()） 您好， 以下是我的 Yocto 构建参数： 发布版本： imx-linux-walnascar 电路板支持包 版本： imx-6.12.49-2.2.0 机器： imx8mpevk 发行版： fsl-imx-xwayland 过去几个月我一直成功地使用这个版本环境。然而，我突然开始遇到附件中的错误。 为了排查问题，我彻底清理了构建环境，重新初始化了代码仓库（ repo init ），再次同步了所有内容，并执行了一次全新的构建。但遗憾的是，问题依旧存在。 请查阅附件中的日志文件。我希望您能帮忙找出根本原因并提出解决方案。 i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) bitbake imx-image-core Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 你使用的是哪个“bitbake 命令”？ 我会进行核实。 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 感谢您的反馈， 我已检查过我的构建环境，它已经与您推荐的配置相符。 主机操作系统： Ubuntu 22.04.5 LTS (Jammy) GNU tar 版本： GNU tar 1.34 $ cat /etc/os-release PRETTY_NAME="Ubuntu 22.04.5 LTS" ... $ tar --version tar（GNU tar）1.34 然而，我仍然遇到同样的故障。 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 请检查 tar 版本，如果主机是 Ubuntu 24.04，而 tar 版本是 1.35。 在容器或虚拟机内构建： Ubuntu 22.04 LTS GNU tar 1.34 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 请查收以下文件， 这里我粘贴一些错误信息。 调试：正在执行 Python 配方 extend_recipe_sysroot 注意：直接依赖项为 ['/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/binutils/binutils-cross_2.44.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/gcc/gcc-cross_14.3.bb:do_populate_sysroot','/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.68.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kern-tools/kern-tools-native_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-core/coreutils/coreutils_9.6.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/flex/flex_2.6.4.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/rpm/rpm_4.20.0.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-extended/bc/bc_1.08.1.bb:do_populate_sysroot','virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kmod/kmod_34.1.bb:do_populate_sysroot'] 注意：已安装到系统根目录：[] 注意：由于 sysroot 中已存在以下软件包，因此跳过：['gettext-minimal-native', 'binutils-cross-aarch64', 'cmake-native', 'gcc-cross-aarch64', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'kern-tools-native', 'linux-libc-headers', 'file-native', 'openssl-native', 'coreutils-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'zlib-native', 'bison-native', 'dwarfsrcfiles-native', 'elfutils-native', 'flex-native', 'git-native'、'gnu-config-native'、'json-c-native'、'libedit-native'、'lua-native'、'make-native'、'patch-native'、'perl-native'、'pkgconfig-native'、'pseudo-native'、'python3-native'、'rpm-native'、'bc-native'、'bzip2-native'、'libarchive-native'、'libidn2-native'、'lzlib-native'、'xz-native'、'zstd-native'、'kmod-native'、'acl-native'、'attr-native'、'curl-native'、'gdbm-native'、'gmp-native'、'gnutls-native' 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libmpc-native', 'libunistring-native', 'mpfr-native', 'nettle-native', 'p11-kit-native', 'popt-native', 'sqlite3-native'] 调试：Python 函数 extend_recipe_sysroot 已完成 调试：正在执行 Python 函数 sstate_task_prefunc 调试：Python 函数 sstate_task_prefunc 已完成 调试：正在执行 Python 函数 do_package 调试：正在执行 Python 函数 package_setup_pkgv 调试：Python 函数 package_setup_pkgv 已完成 调试：正在执行 Python 函数 package_convert_pr_autoinc 调试：Python 函数 package_convert_pr_autoinc 已完成 调试：正在执行 Python 函数 package_prepare_pkgdata 注意：已安装到 pkgdata-sysroot：[] 调试：Python 函数 package_prepare_pkgdata 已完成 调试：正在执行 Python 函数 perform_packagecopy 错误：执行 exec_func_python() 自动生成的 Python 函数时出错： 导致此异常/失败的 Python 调用堆栈跟踪如下： 文件：'exec_func_python() autogenerated'，行号：2，函数： 0001： *** 0002:perform_packagecopy(d) 0003： 文件：'/home/vvdn/LWT_Build/sources/poky/meta/classes-global/package.bbclass'，行号：363，函数：perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD} " 0362:perform_packagecopy[dirs] = "${PKGD} " *** 0363： 0364:python populate_packages() { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = " ${D} " 文件：'/usr/lib/python3.10/subprocess.py'行号：421，函数：check_output 0417：否则： 0418：空 = b'' 0419: kwargs['input'] = 空 0420: *** 0421: 返回 run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423： 0424： 0425:class CompletedProcess(object): 文件：'/usr/lib/python3.10/subprocess.py'lineno: 526, function: run 0522: # 我们不调用 process.wait()作为。 __exit__它能帮我们做到这一点。 0523：提高 0524: retcode = process.poll() 0525：如果检查并返回代码： *** 0526: 引发 CalledProcessError(retcode, process.args, 0527: output=stdout, stderr=stderr) 0528: 返回 CompletedProcess(process.args, retcode, stdout, stderr) 0529： 0530: 异常：subprocess.CalledProcessError：命令“tar --exclude=./sysroot-only”-cf - -C /home/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/linux-imx/6.12.34+git/image -p -S .| tar -xf - -C /home/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/linux-imx/6.12.34+git/package' 返回非零退出状态 2。 子进程输出： 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 tar：./usr/lib：无法创建目录：地址错误 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 获取到未知目录的 *at() 系统调用，文件描述符为 4 文件描述符 4 的未知基本路径，路径库 无法为“lib”分配绝对路径。 tar：./usr/lib：无法创建目录：地址错误 tar：./usr/lib/modules：无法创建目录：没有该文件或目录 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 我似乎没有权限下载该附件。 请您再发送一次好吗？ Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 嗨@yipingwang 期待您能尽快提供调试方面的支持。 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) 在你的 Ubuntu 电脑上，使用命令“sudo apt install tar=1.34+dfsg-1build3”

MFS2323BMBA5EP OTP構成の競合:SPIとI2Cモードの識別 NXPのエンジニアおよびコミュニティの専門家の皆様へ 現在、以下の方法で開発中です MFS2323BMBA5EP セーフティ SBCで、設定ファイルとデータシートレポートの間でOTPの工場出荷時設定に関する大きな矛盾に直面しました。この点についてご説明いただけると大変ありがたいです。 設定の競合： 1. 証拠 .cfg ファイル： 私の FS2320_BA5_CONFIG_Rev_A.cfg ファイルには、直接レジスタ値があります。 0x30 : 0x00 FS23データシート（表229）によると、 OTP_MAIN_SYS_I2C_CFG😞 ビット4（ SPI_EN_OTP ） ： 0 手段 I2Cは有効、SPIは無効です。 1 SPIが有効になっていることを意味します。 ビット3~0 ( I2CDEVADDR_OTP ) : 0000 意味する I2Cスレーブアドレスは 0x20 。 これは明らかに、このチップが工場出荷時に構成されていることを示唆しています。 I2Cモード。 2. 構成レポートPDFからの証拠： しかし、私の R_MFS2323BMBA5_Rev_A_test.pdf 文書、 表2. デバイスのOTP設定、レポートには明示的に記載されています。 SPI有効化：SPIピンが有効になっています。 これはハードウェアピンがロックされていることを示唆しています SPIモード。 私の実際のハードウェアテスト結果： MCU(S32K344)をSPIマスターとして設定し、このPMICと通信させたとき: MISOピンは一定のままです 0.3V （内部プルダウン抵抗が弱い高インピーダンス状態を示しており、スレーブ側がラインを駆動していないことを意味します。） PMIC側のSCKピンは、実際には独自にクロック信号を出力していた。 チップがOTPエミュレーションモードに固定されているか、I2Cスレーブとして設定されている可能性があり、それが原因でSPI通信が完全に失敗しているのではないかと考えています。 私の具体的な質問： 確認いただけますか MFS2323BMBA5EPの実際の工場出荷時OTP設定ですか?それはSPIですか、それともI2Cですか?  の間に対立が生じたとき。cfg registerファイル(0x30 : 0x00)とPDF設定レポート、どちらが絶対的なハードウェアの真実と考えられるべきでしょうか?PDFレポートにドキュメントの誤りが含まれている可能性はありますか? （添付しました） FS2320_BA5_CONFIG_Rev_A.cfg そして R_MFS2323BMBA5_Rev_A_test.pdf （参考としてこの投稿を参照してください）。 ご協力ありがとうございます！ Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification はい、ありがとうございます。 Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification どちらの会社にお勤めですか？現在、お客様はご自身のメールアドレスを使用されていますが、これは優先度の低い（経営幹部レベルの）顧客とみなされます。 これには、回路図とCRCドライバに関連する一連の事項を確認する必要があります。 会社のメールアドレスを使ってチケットを送信することをお勧めします。 家 Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification 現状では不可能です。デバッグモードで通信しています。344ピンのSCK波形とMOSI波形を個別にテストしたところ、書き込んだデータは送信できました。しかし、FS23のSCKピンも信号を送信しているため、この2つを接続すると、MCUから送信されたSCK信号がFS23によってローにプルダウンされてしまいます。FS23に送信する応答はすべて0です。CRCも設定済みです。 紫色の線は、上部の信号以降のSCK信号を表しています。 黄色はデータ信号を示します。 定格電圧は5Vです。 送信されたデータは {0x02, 0x00, 0x00, CRC} です SCK波形を通常の波形として無理やり解釈すると、データが正しいことがわかります。最初のビットは2で、その後に00とCRCが続きます。 Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification SPIを使用して正常に通信できますか？ Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification FS23とS32K344がSPIで通信している際に、FS23のSCK信号も送信されている可能性はありますか？というのも、FS23とのSPI通信を設定しない場合、FS23のSCKピンをキャプチャしようとしても波形が取得できないからです。S32K344と通信している場合にのみ、FS23とS32K344の両方のSCKピンから信号が送信され、SCKピンとCSピンの波形が全く同じになります。 Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification GUI経由で.cfgファイルをMirrorにアップロードしました。このレジスタはSPIモードを示します。

FS26 LDO Off Issue Hello I am using the FS26 and S32K358. I am using the FS26's VLDO2 as the power supply for the MCU and the FS26's VLDO1 as the power supply for the CAN transceiver. When the MCU is left in a state of CAN communication, the FS26's VLDO turns OFF, cutting off the MCU's power. (This occurs randomly, approximately every 1 to 8 hours.) The VLDO is restored only after the FS26's power supply is cut off and then restored. This issue occurs on all boards, not just a single one, and does not occur when CAN communication is not in progress. The status when the issue occurs is as follows: Vpre 6V O VDIG 1.6V O VBOS 5V O VLDO2 X VLDO1 X VCORE X DFS is disabled via OTP. I would like to know the current state of the FS26 and what causes this to happen. Re: FS26 LDO Off Issue Hello kjy106906  Good day! Is the watchdog enabled? What are the values of: FS_STATES FS_GRL_FLAGS FS_OVUV_REG_STATUS M_REG_FLG M_STATUS immediately after failure? Have you checked if FS26 is not displaying any UV or OV flags? Also could you share your M_STATUS? I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck. Re: FS26 LDO Off Issue @RafaR  Thank you for the reply. Unfortunately, the MCU is receiving power from the SBC, but communication is not possible because the VLDO is OFF. You must cut off and resupplied the board power for the MCU to function. The watchdog window is infinite.

システムマネージャーのドライバーコードPCAL6524 システムマネージャーのドライバーコードを教えていただけますかPCAL6524HEAZ fsl_pcal6524.c fsl_pcal6524.h Re: system manager driver code for PCAL6524 ビンソン様、 公式のMCUXpresso SDKsやSystem マネージャ ドライバは知りません。 fsl_pcal6524.cfsl_pcal6524.h fやPCAL6524HEAZ。NXP Linux BSPは、標準のLinux GPIOエクスパンダードライバーを通じて、PCA6524デバイスツリー互換文字列を使ってデバイスをサポートしています。i.MX95 19x19 EVK は、I²C GPIO エキスパンダーとして PCAL6524 を使用する公開サンプルです。https ://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts   敬具、 ヨゼフ

i.MX8M Plus - ディスプレイとカメラ専用のI2Cポート チームの皆さん、こんにちは。 ディスプレイとカメラ専用のI2Cポートがあるかどうか確認したかっただけです。 (例えばディスプレイ用のI2C2やカメラ用のI2C4のような)設定に制限はありませんか?ディスプレイとカメラのインターフェースに任意のI2Cを使えますか? Re: i.MX8M Plus - Dedicated I2C for Display and Camera i.MX8M Plusでは、ディスプレイ関連やカメラ関連デバイス用に利用可能な任意のI2Cコントローラーを使用できます。SoC内部には、専用の「カメラI2C」や「ディスプレイI2C」は搭載されていません。選択はハードウェア設計とデバイスツリー構成によって決まります。

Debug authentication Response for MCXW72 I am trying to unlock the debug port on the MCXW72. Unlocking it with the MCUXpresso Secure Provisioning Tool works correctly, but I am attempting to unlock the port using my own application based on the Debug Credential (DC), the DCK private key, and the DAC received from the device. The documentation is very unclear in this area (and in some places even incorrect). As I understand it, the DAR consists of: DAR = DC + AB + UUID (from DAC) + Signature (Figure 50 in the Reference Manual shows the UUID and AB fields in the wrong order.) I would like to calculate the Signature using OpenSSL, however I cannot determine exactly what data should be signed: a) DC + CV (from DAC) b) DC + AB + CV (from DAC) c) DC + AB + UUID (from DAC) + CV (from DAC) or something else entirely? The documentation states that the signature binds the DAR to the challenge vector (CV), but it does not clearly specify the exact byte sequence that must be hashed and signed. Could you please clarify the precise data that is used to generate the DAR signature? MCXA Security(Edgelock | secure boot | OTP) Re: Debug authentication Response for MCXW72 Hi @Surdej  Secure Provisioning Tool is built on top of Secure Provisioning SDK, see https://spsdk.readthedocs.io/en/latest/ This is open source so you can find the answers there.

调试 MCXW72 的身份验证响应 我正在尝试解锁 MCXW72 上的调试端口。使用 MCUXpresso 安全配置工具解锁端口可以正常工作，但我正在尝试使用我自己的应用程序，该应用程序基于从设备接收的调试凭证 (DC)、DCK 私钥和 DAC 来解锁端口。 这方面的文档非常不清楚（有些地方甚至有错误）。 据我了解，DAR 由以下部分组成： DAR = DC + AB + UUID（来自 DAC）+ 签名 （参考手册中的图 50 显示 UUID 和 AB 字段顺序错误。） 我想使用 OpenSSL 计算签名，但我无法确定应该对哪些数据进行签名： a)直流 + 恒压（来自数模转换器） b) DC + AB + CV（来自 DAC） c) DC + AB + UUID（来自 DAC）+ CV（来自 DAC） 或者完全是其他原因？ 文档指出，签名将 DAR 与挑战向量 (CV) 绑定，但并未明确指定必须进行哈希和签名的确切字节序列。请问能否详细说明用于生成DAR特征的具体数据？ MCXA 安全（Edgelock | 安全启动 | OTP） Re: Debug authentication Response for MCXW72 嗨@Surdej 安全配置工具基于安全配置 SDK 构建，请参阅https://spsdk.readthedocs.io/en/latest/ 这是开源软件，所以你可以在那里找到答案。

system manager driver code for PCAL6524 could you please provide the system manager driver code for PCAL6524HEAZ fsl_pcal6524.c fsl_pcal6524.h Re: system manager driver code for PCAL6524 Dear Binson, I am not aware of an official MCUXpresso SDK/System Manager driver named fsl_pcal6524.cfsl_pcal6524.h for the PCAL6524HEAZ. NXP Linux BSPs support the device through the standard Linux GPIO-expander driver using the PCA6524 device-tree compatible string. The i.MX95 19x19 EVK is a public example that uses the PCAL6524 as an I²C GPIO expander: https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts   With Best Regards, Jozef

i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Hi, These are my yocto build parameters: Release: imx-linux-walnascar BSP Version: imx-6.12.49-2.2.0 MACHINE: imx8mpevk DISTRO: fsl-imx-xwayland I have been using this build environment successfully for the past couple of months. However, I suddenly started encountering the attached error. To troubleshoot, I completely cleaned the build environment, reinitialized the repository (repo init), synced everything again, and performed a fresh build. Unfortunately, I am still facing the same issue. Please find the attached log file for your reference. I would appreciate your help in identifying the root cause and suggesting a solution. i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) bitbake imx-image-core Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) What "bitbake command" are you using? I will do verification. Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Thank you for your response. I verified my build environment, and it already matches the configuration you recommended. Host OS: Ubuntu 22.04.5 LTS (Jammy) GNU tar version: GNU tar 1.34 $ cat /etc/os-release PRETTY_NAME="Ubuntu 22.04.5 LTS" ... $ tar --version tar (GNU tar) 1.34 However, I still encounter the same failure Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Please check the tar version, if the host is Ubuntu 24.04 and tar is 1.35 Build inside a container or VM with: Ubuntu 22.04 LTS GNU tar 1.34 Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Please find file below,  Here i am pasting the some lines of error  DEBUG: Executing python function extend_recipe_sysroot NOTE: Direct dependencies are ['/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/binutils/binutils-cross_2.44.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/gcc/gcc-cross_14.3.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/quilt/quilt-native_0.68.bb:do_populate_sysroot', '/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kern-tools/kern-tools-native_git.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-core/coreutils/coreutils_9.6.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/bison/bison_3.8.2.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/dwarfsrcfiles/dwarfsrcfiles.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/flex/flex_2.6.4.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/patch/patch_2.7.6.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pkgconfig/pkgconfig_git.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/pseudo/pseudo_git.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-devtools/rpm/rpm_4.20.0.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-extended/bc/bc_1.08.1.bb:do_populate_sysroot', 'virtual:native:/home/vvdn/LWT_Build/sources/poky/meta/recipes-kernel/kmod/kmod_34.1.bb:do_populate_sysroot'] NOTE: Installed into sysroot: [] NOTE: Skipping as already exists in sysroot: ['gettext-minimal-native', 'binutils-cross-aarch64', 'cmake-native', 'gcc-cross-aarch64', 'libtool-native', 'm4-native', 'quilt-native', 'texinfo-dummy-native', 'kern-tools-native', 'linux-libc-headers', 'file-native', 'openssl-native', 'coreutils-native', 'expat-native', 'ncurses-native', 'readline-native', 'util-linux-libuuid-native', 'zlib-native', 'bison-native', 'dwarfsrcfiles-native', 'elfutils-native', 'flex-native', 'git-native', 'gnu-config-native', 'json-c-native', 'libedit-native', 'lua-native', 'make-native', 'patch-native', 'perl-native', 'pkgconfig-native', 'pseudo-native', 'python3-native', 'rpm-native', 'bc-native', 'bzip2-native', 'libarchive-native', 'libidn2-native', 'lzlib-native', 'xz-native', 'zstd-native', 'kmod-native', 'acl-native', 'attr-native', 'curl-native', 'gdbm-native', 'gmp-native', 'gnutls-native', 'libtasn1-native', 'libcap-native', 'libffi-native', 'libgcrypt-native', 'libgpg-error-native', 'libmicrohttpd-native', 'libmpc-native', 'libunistring-native', 'mpfr-native', 'nettle-native', 'p11-kit-native', 'popt-native', 'sqlite3-native'] DEBUG: Python function extend_recipe_sysroot finished DEBUG: Executing python function sstate_task_prefunc DEBUG: Python function sstate_task_prefunc finished DEBUG: Executing python function do_package DEBUG: Executing python function package_setup_pkgv DEBUG: Python function package_setup_pkgv finished DEBUG: Executing python function package_convert_pr_autoinc DEBUG: Python function package_convert_pr_autoinc finished DEBUG: Executing python function package_prepare_pkgdata NOTE: Installed into pkgdata-sysroot: [] DEBUG: Python function package_prepare_pkgdata finished DEBUG: Executing python function perform_packagecopy ERROR: Error executing a python function in exec_func_python() autogenerated: The stack trace of python calls that resulted in this exception/failure was: File: 'exec_func_python() autogenerated', lineno: 2, function: 0001: *** 0002:perform_packagecopy(d) 0003: File: '/home/vvdn/LWT_Build/sources/poky/meta/classes-global/package.bbclass', lineno: 363, function: perform_packagecopy 0359: rpath_replace (dvar, d) 0360:} 0361:perform_packagecopy[cleandirs] = "${PKGD}" 0362:perform_packagecopy[dirs] = "${PKGD}" *** 0363: 0364:python populate_packages () { 0365: oe.package.populate_packages(d) 0366:} 0367:populate_packages[dirs] = "${D}" File: '/usr/lib/python3.10/subprocess.py', lineno: 421, function: check_output 0417: else: 0418: empty = b'' 0419: kwargs['input'] = empty 0420: *** 0421: return run(*popenargs, stdout=PIPE, timeout=timeout, check=True, 0422: **kwargs).stdout 0423: 0424: 0425:class CompletedProcess(object): File: '/usr/lib/python3.10/subprocess.py', lineno: 526, function: run 0522: # We don't call process.wait() as .__exit__ does that for us. 0523: raise 0524: retcode = process.poll() 0525: if check and retcode: *** 0526: raise CalledProcessError(retcode, process.args, 0527: output=stdout, stderr=stderr) 0528: return CompletedProcess(process.args, retcode, stdout, stderr) 0529: 0530: Exception: subprocess.CalledProcessError: Command 'tar --exclude=./sysroot-only -cf - -C /home/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/linux-imx/6.12.34+git/image -p -S . | tar -xf - -C /home/vvdn/LWT_Build/build/tmp/work/imx8mpevk-poky-linux/linux-imx/6.12.34+git/package' returned non-zero exit status 2. Subprocess output: got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. tar: ./usr/lib: Cannot mkdir: Bad address got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. got *at() syscall for unknown directory, fd 4 unknown base path for fd 4, path lib couldn't allocate absolute path for 'lib'. tar: ./usr/lib: Cannot mkdir: Bad address tar: ./usr/lib/modules: Cannot mkdir: No such file or directory Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) It seems that I don't have the permission to download the attachment. Would you please resend it again? Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) Hi @yipingwang  Awaiting for your prompt support in further debugging. Re: i.MX8MP_EVK: YOCTO Compilation Error do_package() (Issue: tar & *at()) On your ubuntu PC, use the command "sudo apt install tar=1.34+dfsg-1build3"

MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Dear NXP engineers and community experts, I am currently developing with the MFS2323BMBA5EP Safety SBC and have encountered a significant conflict between my configuration files and datasheet reports regarding the OTP factory configuration. I would greatly appreciate your expertise in clarifying this. The Configuration Conflict: 1. Evidence from the .cfg file: In my FS2320_BA5_CONFIG_Rev_A.cfg file, there is a direct register value: 0x30 : 0x00 According to the FS23 datasheet (Table 229, OTP_MAIN_SYS_I2C_CFG😞 Bit 4 (SPI_EN_OTP): 0 means I2C is enabled, SPI is disabled; 1 means SPI is enabled. Bit 3~0 (I2CDEVADDR_OTP): 0000 means the I2C slave address is 0x20. This clearly suggests the chip is factory-configured for I2C mode. 2. Evidence from the Configuration Report PDF: However, in my R_MFS2323BMBA5_Rev_A_test.pdf document, under Table 2. Device OTP configuration, the report explicitly states: SPI Enable: SPI pins are enabled. This suggests the hardware pins are locked to SPI mode. My Actual Hardware Test Results: When I configured my MCU (S32K344) as an SPI Master to communicate with this PMIC: The MISO pin stays at a constant 0.3V (indicating high-impedance with internal weak pull-down, meaning the slave is not driving the line). The SCK pin on the PMIC side was actually outputting clock signals on its own. I suspect the chip might be locked in OTP Emulation mode or configured as an I2C slave, which is causing the SPI communication to completely fail. My Specific Questions: Could you please confirm the actual factory OTP configuration for the MFS2323BMBA5EP? Is it SPI or I2C? When there is a conflict between the .cfg register file (0x30 : 0x00) and the PDF configuration report, which one should be considered the absolute hardware truth? Is there a possibility that the PDF report contains a documentation error? (I have attached the FS2320_BA5_CONFIG_Rev_A.cfg and the R_MFS2323BMBA5_Rev_A_test.pdf to this post for reference). Thank you in advance for your help! Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Okay, thank you. Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Which company are you from? Currently, you're using your own email address, which is considered a low-priority (C-level) customer. This requires checking your schematic and a series of things related to the CRC driver. I suggest you submit a ticket using your company email address. Home Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Currently, it's not possible. I'm communicating in DEBUG mode. I've tested the SCK and MOSI waveforms on the 344 pin separately, and they can transmit the data I write. However, because the FS23's SCK pin is also sending a signal, when these two are connected together, the SCK signal sent by the MCU is pulled low by the FS23. The responses I send to the FS23 are all 0s. I've also configured CRC. The purple line represents the SCK signal after the top. Yellow indicates data signals. The scale is 5V. The data sent is {0x02, 0x00, 0x00, CRC} If you forcefully interpret the SCK waveform as a normal waveform, you can see that the data is correct; the first bit is 2, followed by 00 and CRC. Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Can you successfully communicate using SPI? Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification Is it possible that the SCK signal of the FS23 is also being sent when communicating with the S32K344 via SPI? Because if I don't configure SPI communication with the FS23, there's no waveform when I try to capture the SCK pin of the FS23. Only when communicating with the S32K344 are both the SCK pins of the FS23 and the S32K344 sending signals, and the waveforms of the SCK and CS pins are exactly the same. Re: MFS2323BMBA5EP OTP Configuration Conflict: SPI vs I2C Mode Identification I uploaded the .cfg file to Mirror via the GUI. The register indicates SPI mode.

PCAL6524 的系统管理器驱动程序代码 请问能否提供PCAL6524HEAZ的系统管理器驱动程序代码？ fsl_pcal6524.c fsl_pcal6524.h Re: system manager driver code for PCAL6524 亲爱的宾森： 我不知道有名为fsl_pcal6524.cfsl_pcal6524.hf或 PCAL6524HEAZ 的官方 MCUXpresso SDK/系统管理器驱动程序。NXP Linux BSP 通过标准的 Linux GPIO 扩展器驱动程序，使用 PCA6524 设备树兼容字符串来支持该设备。i.MX95 19x19 EVK 是一个公开示例，它使用 PCAL6524 作为 I²C GPIO 扩展器： https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts   最诚挚的问候， 约瑟夫

FS26 LDO 発行終了 Hello 私はFS26とS32K358を使用しています。 私はFS26のVLDO2をMCUの電源として、FS26のVLDO1をCANトランシーバの電源として使っています。 MCUがCAN通信状態のままになると、FS26のVLDOはオフになり、MCUの電源が遮断されます。 （これはランダムに発生し、およそ1～8時間ごとに起こります。） VLDOは、FS26の電源が遮断され、その後復旧された後にのみ復旧します。 この問題はすべてのボードで発生し、単一のボードだけでなく、CAN通信が進行中でない場合は発生しません。 問題発生時の状況は以下のとおりです。 Vpre 6V O VDIG 1.6VO VBOS 5V O VLDO2 X VLDO1 X VCORE X OTPによるDFSは無効化されています。 FS26の現状と、この問題が発生する原因について知りたいです。 Re: FS26 LDO Off Issue こんにちは、 kjy106906さん 良い一日！ ウォッチドッグは有効になっていますか？ 以下の値は何ですか？ FS_STATES FS_GRL_FLAGS FS_OVUV_REG_STATUS M_REG_FLG 障害発生直後にM_STATUSが表示されますか？ FS26にUVフラグやOVフラグが表示されていないか確認しましたか？ また、あなたのM_STATUSも教えてもらえますか? この情報がお役に立てば幸いです。他に何かご不明な点がありましたら、お気軽にお問い合わせください。 良い一日をお過ごしください。幸運を祈ります。 Re: FS26 LDO Off Issue @RafaR ご返信ありがとうございます。 残念ながら、MCUはSBCから電力を受け取っていますが、VLDOがオフであるため通信は不可能です。 MCUが動作するためには、基板の電源を切って再供給しなければなりません。 監視ウィンドウは無限です。