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LPC Microcontrollers Knowledge Base

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Unboxing of the Mini-Monkey.    This was a demonstration of how you can use a low cost 2-layer PCB process with the LP55S69 in the 0.5mm pitch VFBGA98 package.    We used Macrofab for the prototypes and the results were fabulous. Blog articles on the Mini-Monkey: https://community.nxp.com/community/general-purpose-mcus/lpc/blog/2020/03/13/mini-monkey-part-1-how-to-design-with-the-lpc55s69-in-the-vfbga98-package https://community.nxp.com/community/general-purpose-mcus/lpc/blog/2020/03/29/mini-monkey-part-2-using-mcuxpresso-to-accelerate-the-pcb-design-process https://community.nxp.com/community/general-purpose-mcus/lpc/blog/2020/04/19/lpc55s69-mini-monkey-build-update-off-to-fabrication
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Unboxing video of the low cost OKDO E1 board.    As a quick demo, I hooked up the E1 to a low cost  240x240 Pixel IPS display from buydisplay.com.
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When we use LPC55Sxx PRINCE feature, we need enable PRINCE sub-region “crypto” by setting SR_ENABLE register. If we “crypto” enable discontinuous sub-regions and erase part of them, we may find we can’t erase/read/write other “crypto” sub-regions any more. This article will discuss how to resolve this phenomenon.           Figure 1         Testing Steps According to LPC55Sxx UM, each PRINCE region has its SR_ENABLEx register. This register enables PRINCE encryption and decryption of data for each sub-region of crypto region 0. Each bit in this field enables a sub-region of crypto region 0 at offset 8kB*n, where n is the bit number.  For example, when we set SR_ENABLE0=0X00000005, PRINCE region 0 sub-region 1 and sub-region 3 are set as encryption region. When read data out from these sub-regions, PRINCE will decrypt the data automatically.   Now we will test discontinuous sub-region erase/read/write. Board: LPC55S16-EVK IDE: Keil MDK v5.29 Step 1: PRINCE initialization: Enable PRINCE region 0 and two discontinuous sub-regions; generate key, IV code; enable crypto. //set SR_ENABLE , SR_ENABLE=0X28000000,enable sub-regions(0x30000-0x32000,0x34000-0x36000) crypto 。 status=PRINCE_SetRegionSREnable(PRINCE( prince_region_t )region0,0X28000000); //select PRINCE crypto for region0 PRINCE_SetRegionBaseAddress ( PRINCE_Type *base, prince_region_t region0, uint32_t 0X0) //generate PRINCE region0 crypto key Status=FFR_KeystoreGetKC(&flashInstance,&keyCode[0],kFFR_KeyTypePrinceRegion0); status=PUF_GetHwKey(PUF,keyCode,sizeof(keyCode),kPUF_KeySlot2, rand()); //generate PRINCE region0 crypto IV_code status=PRINCE_GenNewIV(kPRINCE_Region0,&prince_iv_code[0],true,&flashInstance) //load IV code to PRINCE status=PRINCE_LoadIV(kPRINCE_Region0,&prince_iv_code[0]) //enable PRINCE encryption PRINCE_EncryptEnable(PRINCE)   Step 2: Select two discontinuous sub-regions ( 0x30000-0x32000,0x34000-0x36000). Erase one of them (0x30000-0x32000), then write data to this sub-region. Output: Erasing and Writing are all successful. See Figure 2. //Erase 0x30000-0x32000 sub-region status=PRINCE_FlashEraseWithChecker(&flashInstance,0x30000,0x2000,kFLASH_ApiEraseKey); //Write 0x30000-0x32000 sub-region status=PRINCE_FlashProgramWithChecker(&flashInstance,0x30000,(uint8_t *)prince_iv_code,0x2000);   Step 3: Erase and Write the other sub-region ( 0x34000-0x36000 ) Output: Erasing and Writing are failed. See Figure 2. //Erasing 0x34000-0x36000 sub-region status=PRINCE_FlashEraseWithChecker(&flashInstance,0x34000, 0x2000,kFLASH_ApiEraseKey); //Write 0x34000-0x36000 sub-region status=PRINCE_FlashProgramWithChecker(&flashInstance,0x34000, (uint8_t *)prince_iv_code,0x2000); Error Analysis According to UM11126( 49.16.1 Functional details ) , each crypto region has its own SKEY and IV code. SKEY and IV are used together by the PRINCE when encrypting or decrypting the data in the sub-regions of crypto region. For Instance, For PRINCE region1, each time after we execute erasing operation, new Skey1 and IV1 are generated, thus when executing erase/read/write operation to another sub-region, the old IV1 and new IV1 don’t match, which causes PRINCE can’t decrypt correctly.   Suggestion We suggest user using SR_ENABLE to set continuous crypto sub-regions. When erasing operation is needed, erasing all the crypto sub-regions together, avoid erasing part of the sub-regions. One sub-region size is 8K, make sure the erasing/writing address 8K aligned.   Thanks for the suggestion from johnwu‌
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Abstract This paper discusses our approach to crypto acceleration and asset protection using novel techniques that help bring high levels of security to low-cost microcontrollers with minimal power and area penalty. CASPER, our asymmetric cryptography acceleration engine, aims to optimize crypto algorithm execution (e.g., RSA, ECC). It is built on a hardware-software partitioning scheme where software functions map asymmetric crypto functions to the hardware modules of the accelerator, delivering sufficient flexibility to software routines to enable mapping of new algorithms. Further efficiency is achieved by making use of the co-processor interface on the Arm® Cortex®-M33 core. Important assets such as keys, proprietary and/or licensed application software are protected against side-channel analysis or cloning using SRAM PUF and PRINCE. SRAM PUF technology enables secure storage of root-of-trust keys and user keys by exploiting the deep sub-micron process technology variations. PRINCE is a low-latency lightweight cryptography algorithm implementation in hardware that allows encrypted non-volatile storage and real-time, latency-free decryption of the execution code. Read More >
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At the time of the LPC55S6x launch, the latest silicon revision of the LPC55S6x is revision 1B. Since Nov,2019, all the LPCXpresso55S69 EVK boards marked as Revision A2 are equipped with revision 1B silicon.                                   NXP introduced its new debug session request functionality on silicon revision 1B. For some IDE versions, the method of initiating a debug session is designed for current 1B silicon revisions and will r esult in an endless loop when used on older revision 0A parts. The protocol for this debug connection method is included in the latest LPC55S6x/S2x/2x User Manual, section Debug session protocol.   IDE Consideration:       MCUXpresso IDE: Due to above debug access protocol changes, the latest MCUXpresso IDE v11.0.1, who expects silicon to handle silicon revision 1B debug session requests correctly, can’t connect silicon revision 0A production under some situations. When connecting LPCXpresso55S69 Revision A1 board, you may have connection error like this: NXP has released MCUXpresso IDE v11.0.1 LPC55xx Debug Hotfix1 for this issue. Please follow the steps to fix the issue if you use IDE v11.0.1 with silicon revision 0A: https://community.nxp.com/community/mcuxpresso/mcuxpresso-ide/blog/2019/10/30/mcuxpresso-ide-v1101-lpc55xx-debug-hotfix The newer version of MCUXpresso IDE has already fixed this issue.       IAR: According to our test: IAR Embedded Workbench for ARM v8.42 and later can support both silicon revision 1B and 0A production without issue, which can be downloaded from https://www.iar.com/iar-embedded-workbench/tools-for-arm/arm-cortex-m-edition/ Note: The IAR 8.50.5 changed the CMSIS-DAP debug support for trustzone feature. There is known debug issue with the combination of IAR 8.50.5+SDK2.8.0. Thus our recommendation is:         Use IAR 8.50.5 with SDK2.8.0       Use IAR 8.40.2 with SDK 2.7.1         Keil MDK: Both Keil MDK v5.28 and v5.29+ latest LPC55S69 pack v12.01 can support silicon reversion 1B without problem but can’t support silicon revision 0A.     LPC55S69 Revision 0A vs. 1B Silicon Revision 0A production 1B production Board Revision A1 A2 Deliver Date Before Nov,2019 After Nov,2019 Debug Access None Add New Debug Session Access Method Secure Boot Revision SB2.0 SB2.1 Maximum CPU Frequency 100MHz 150MHz IDE revision required 1.      MCUXpresso IDE v11.0.0 and older 2.      MCUXpresso IDE v11.0.1 + hotfix 1 3.      MCUXpresso IDE next version MCUXpresso IDE v11.0.0 and newer SDK version SDK2.5 and newer are supported; SDK2.6.3 and newer are recommended SDK2.6.3 and newer     LPC55S69 Defect Fix: 0A vs. 1B 0A Production 1B Production Defect : For PRINCE encrypted region, partial erase cannot be performed Fixed Defect : For PUF based key provisioning, a reset must be performed Fixed Defect : Unprotected sub regions in PRINCE defined regions cannot be used. Fixed Defect : Last page of image is erased when simultaneously programming the signed image and CFPA region Fixed Defect : the minimum operating range is 1.85 V. Fixed: The LPC55S6x operating voltage range specification is from 1.80 V to 3.6 V. Defect : PHY does not auto-power down in suspend mode Fixed For more detail, see Errata sheet LPC55S6x which can be downloaded  from NXP web site.   Pre-production Silicon: Note that NO BOARDS WERE EVER SOLD THROUGH DISTRIBUTION WITH PRE-PRODUCTION SILICON. In case you have board marked with Revision 1, 2 ,A, or A1 board with 1B silicon, contact NXP to ask for production replacement.   Get Silicon Revision: The silicon revision info is marked on the chip and board revision is marked on the board silkscreen. For silicon revision marking information, please consult LPC55S6x Data Sheet section 4. Marking . Below is an example of silicon revision marking information where revision is highlighted in red: The user application can also get the silicon revision through chip revision ID and number: SYSCON->DIEID:   Please also note that it is recommended to replace Revision 0A silicon with 1B silicon on boards with older board revision than  Revision A2. Thanks  William Jiang , Hao Liu for helping me review the doc.  
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The documentation discusses how to generate phase-shift PWM signals based on SCTimer/PWM module, the code is developed based on MCUXpresso IDE version 10.3 and LPCXpresso5411x board. The LPC family has SCTimer/PWM module and CTimer modules, both of them can generate PWM signals, but only the SCTimer/PWM module  can generate phase-shift PWM signals. In the code, only the match registers are used to generate events, I/O signals are not used.  The match0 register is set up as (SystemCoreClock/100), which determines the PWM signal frequency. The the match1 register is set up as 0x00, which generate event1. The the match2 register is set up as (SystemCoreClock/100)/2;, which generate event2. The duty cycle is (SystemCoreClock/100)/2-0x00= (SystemCoreClock/100)/2, which is 50% duty cycle, the cycle time is (SystemCoreClock/100). The event1 sets the SCT0_OUT1, event2 clears the SCT0_OUT1, so SCT0_OUT1 has 50% duty cycle. The the match3 register is set up as (SystemCoreClock/100)/4;, which generate even3. The the match4 register is set up as 3*(SystemCoreClock/100)/4, which generate event4. The duty cycle is 3*(SystemCoreClock/100)/4  -  (SystemCoreClock/100)/4= (SystemCoreClock/100)/2, which is 50% duty cycle. The event3 sets the SCT0_OUT2, event4 clears the SCT0_OUT2, so SCT0_OUT2 has 50% duty cycle. The phase shift is (SystemCoreClock/100)/4 - 0x00= (SystemCoreClock/100)/4, which corresponds 90 degree phase shift. PWM initilization code: //The SCT0_OUT1 can output PWM signal with 50 duty cycle from PIO0_8 pin //The SCT_OUT2 can output PWM signal with 50 duty cycle fron PIO0_9 pin //The SCT0_OUT1 and SCT0_OUT2 PWM signal has 90 degree phase shift. void SCT0_PWM(void) {     SYSCON->AHBCLKCTRL[1]|=(1<<2); //SET SCT0 bit     SCT0->CONFIG = (1 << 0) | (1 << 17); // unified 32-bit timer, auto limit     SCT0->SCTMATCHREL[0] = SystemCoreClock/100; // match 0 @ 100 Hz = 10 msec     SCT0->EVENT[0].STATE = 0xFFFFFFFF; // event 0 happens in all states     //set event1     SCT0->SCTMATCHREL[1]=0x00;     SCT0->EVENT[1].STATE = 0xFFFFFFFF; // event 1 happens in all states     SCT0->EVENT[1].CTRL = (1 << 12)|(1<<0); // match 1 condition only     //set event2     SCT0->SCTMATCHREL[2]=(SystemCoreClock/100)/2;     SCT0->EVENT[2].STATE = 0xFFFFFFFF; // event 2 happens in all states     SCT0->EVENT[2].CTRL = (1 << 12)|(2<<0); // match 2 condition only     //set event3     SCT0->SCTMATCHREL[3]=(SystemCoreClock/100)/4;     SCT0->EVENT[3].STATE = 0xFFFFFFFF; // event 3 happens in all states     SCT0->EVENT[3].CTRL = (1 << 12)|(3<<0); // match 3 condition only     //set event4     SCT0->SCTMATCHREL[4]=3*(SystemCoreClock/100)/4;     SCT0->EVENT[4].STATE = 0xFFFFFFFF; // event 4 happens in all states     SCT0->EVENT[4].CTRL = (1 << 12)|(4<<0); // match 4 condition only     //PWM output1 signal     SCT0->OUT[1].SET = (1 << 1); // event 1 will set SCT1_OUT0     SCT0->OUT[1].CLR = (1 << 2); // event 2 will clear SCT1_OUT0     SCT0->RES |= (3 << 2); // output 0 toggles on conflict     //PWM output2 signal     SCT0->OUT[2].SET = (1 << 3); // event 3 will set SCT1_OUT0     SCT0->OUT[2].CLR = (1 << 4); // event 4 will clear SCT1_OUT0     SCT0->RES = (3 << 4); // output 0 toggles on conflict     //PWM start     SCT0->CTRL &= ~(1 << 2); // unhalt by clearing bit 2 of the CTRL } Pin initialization code: //PIO0_8 PIO0_8 FC2_RXD_SDA_MOSI SCT0_OUT1 CTIMER0_MAT3 //PIO0_9 PIO0_9 FC2_TXD_SCL_MISO SCT0_OUT2 CTIMER3_CAP0 - FC3_CTS_SDA_SSEL0 void SCTimerPinInit(void) {     //Enable the     SCTimer clock     SYSCON->AHBCLKCTRL[0]|=(1<<13); //set IOCON bit     //SCTimer pin assignment     IOCON->PIO[0][8]=0x182;     IOCON->PIO[0][9]=0x182;     IOCON->PIO[0][10]=0x182; } Main Code: #include <stdio.h> #include "board.h" #include "peripherals.h" #include "pin_mux.h" #include "clock_config.h" #include "LPC54114_cm4.h" void SCT0_Init(void); void SCTimerPinInit(void); void P1_9_GPIO(void); void SCT0_PWM(void); int main(void) {       /* Init board hardware. */     BOARD_InitBootPins();     BOARD_InitBootClocks();     BOARD_InitBootPeripherals();     printf("Hello World\n");    // SCT0_Init();    // P1_9_GPIO();     SCTimerPinInit();     SCT0_PWM();     /* Force the counter to be placed into memory. */     volatile static int i = 0 ;     /* Enter an infinite loop, just incrementing a counter. */     while(1) {         i++ ;     }     return 0 ; } The Yellow channel is PIO0_8 pin output signal, which is SCT0_OUT1 PWM output signal. The Bule channel is PIO0_9 pin output signal, which is SCT0_OUT2 PWM output signal.
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The following document contains a list of documents, questions and discussions that are relevant in the community based on the amount of views they are receiving each month. If you are having a problem, doubt or getting started in LPC or MCUXpresso you should check the following links to see if your doubt have been already solved in the following documents and discussions. MCUXpresso MCUXpresso Supported Devices Table  FAQ: MCUXpresso Software and Tools  How to create a new LPC project using LPCOpen and MCUXpresso IDE  Introducing MCUXpresso SDK v.2 for LPC54xxx Series  Generating a downloadable MCUXpresso SDK v.2 package  Using the MCUXpresso Pins Tool   MCUXpresso Config Tools is now available!   LPC55xx Multicore Applications with MCUXpresso IDE  LPC information LPC5460x MCU Family Overview  USB with NXP Microcontrollers LWIP memory requirements  LPC800 Four-Part Webinar Series!  The LPC804 Programmable Logic Unit (PLU)   LPC84x Technical Training - Now Available Guides and Examples Flashing and Installing the new firmware and drivers for LPC11U35 debug probes  Enabling debug output  USB FLASH download, programming, and security tool (DFUSec)  DMA Ping-Pong application  Getting start with LPCXpresso54608 &amp; emWin Graphics;  Capacitive Touch example using the LPC845 Breakout Board  OLED Display Application Example using LPC845 Breakout Board and SPI  Mixed-Signal Logic Analyzer &amp; Oscilloscope (Lab Tool) Solution  LPC FAQ How to calculate the value of crystal load capacitors? Can I send a message with X/Y/Z bits in the ID?  What is the difference between error active and error passive? What is the sample point for?  How can I verify the configured CAN bitrate, using an oscilloscope? 
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Do you want to know more about one of our hottest products in the LPC800 series portfolio? Take a look at this technical presentation featuring the LPC84x MCU family. Based on the Arm Cortex-M0+ core, the LPC84x Family of MCUs is a low-cost, 32-bit MCU operating at frequencies of up to 30 MHz. The LPC84x MCU family supports of up to 64 KB of flash memory and 16 KB of SRAM. In addition, to make things easier, the LPC800 series McUs are supported by our free example code bundles and now, they're also supported by the MCUXpresso Software Develpment Kit (SDK).  Fig 1. LPC84x MCU Family Block Diagram
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Now that you've downloaded & unzipped your LPCXpresso54608 SDK, let's open KEIL  uVision IDE. Note: you must have at least uVision version 5.22.0.0 to use this board Before we start utilizing uVision we must make sure that we have the relevant packs installed to work with the LPCXpresso54608 board. Select the Pack Installer on the toolbar. The Pack installer shows you which parts and boards for which you have support. On the left hand side you see a variety of different manufacturers. The easiest way to search will be to type 'lpc' into the search right below the devices tab. Then select 'LPC54000 Series'. On the right hand side under the packs tab you will see one item listed under 'Device Specific' called 'Keil::LPC54000_DFP' click on install Note: Version 2.1.0 released on 10-18-2016 added LPC5460x support. If you had downloaded this pack before go to Packs>Check for Updates at the top to download the latest version Once installed the diamond will turn green. To double check we are ready, select boards on the left side and search  'lpcxpresso54'. You will notice that our board is green indicating we have support for it in uVision. Now we can close the Pack Installer to return to uVision Select File>Open and navigate to the location you unzipped your SDK download.  By the way, within this folder there are plenty of SDK based demos for you to explore our microcontroller.  We will use one of them to guide you through this tutorial, but definitely take time to try all of them! Navigate to boards>lpcxpresso54608>demo_apps>touch_cursor>mdk, change file type to ''Project Files (*.uvproj, *.uvprojx) and select 'touch_cursor' Once opened, select 'Build' right above the Project window. Once the Build Output window tells you that you have successfully built the program select the 'Start/Stop Debug Session' icon. Note: You may receive a warning if you have a size limitation on the license you are using. If you do get a warning you can resolve licensing issues by going to File>License Management. Once the debug session has been started select 'Run' on the left side Once you have successfully flashed the board with this demo you will see the following, This demo utilizes the touch interface on the screen to read where you are touching and updates the cursor position to the last known location.   Remember that other demos and sample code are provided in the root folder of the SDK download.   Be sure to explore these demos and reach out on the community if you need help!
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Now that you've downloaded & unzipped your LPCXpresso54608 SDK, let's open IAR Embedded Workbench IDE. Note: You must have at least IAR Embedded Workbench version 7.80.3.12146 to use this board Once open, select File>Open>Workspace Navigate to the location where you unzipped your SDK files. Within this folder there are plenty of SDK based demos for you to explore our microcontroller.  We will use one of them to guide you through this tutorial, but definitely take time to try all of them! Select boards>lpcxpresso54608>demo_apps>touch_cursor>iar>touch_cursor Once the workspace is loaded, you will see the project files on the left.  Along the toolbar the first highlighted item is 'Build' select it. Once your console shows no errors you can select the 'Download and Debug' a few icons to the right of 'Build' Your debug session will start and will look like the following window.  Once it opens 'touch_cursor.c' and has a green arrow next to the main function you can select 'Go' After you have successfully flashed the board with this demo you will see the following on your board. This demo utilizes the touch interface on the screen to read where you are touching and updates the cursor position to the last known location.   Remember that other demos and sample code are provided in the root folder of the SDK download.   Be sure to explore these demos and reach out on the community if you need help!
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Getting Started with LPCXpresso54608  & MCUXpresso is pretty straight forward, but we want to make the process even easier.  So we created a  simple guide to walk you through the getting started process,         LPCXpresso54608: Out of Box & Getting Started Introduction LPC5460x MCU Family part numbering & feature summary table (highlighted in yellow are the first of many parts to be released). If it wasn't already clear, LPCXpresso54608 is the superset development board for our LPC5460x MCU Family. NXP.com Board Page Board Part Number (OM13092) Board User Manual (UM11035) Board Schematics Key features of the LPCXpresso54608 development board, 272x480 color LCD with capacitive touch screen On-board, high-speed USB, Link2 debug probe with CMSIS-DAP and SEGGER J-Link protocol options UART and SPI port bridging from LPC546xx target to USB via the on-board debug probe Support for external debug probe 3 x user LEDs, plus Reset, ISP (3) and user buttons Multiple Expansion options, including Arduino UNO and PMod Built-in power consumption measurement for target LPC546xx MCU 128Mb Micron MT25QL128 Quad-SPI flash 8MB Micron MT48LC8M16A2B4 SDRAM Knowles SPH0641LM4H digital microphone Full size SD/MMC card slot NXP MMA8652FCR1 accelerometer Stereo audio codec with line in/out High and full speed USB ports with micro A/B connector for host or device functionality 10/100Mbps Ethernet (RJ45 connector)
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First, download the LPCXpresso54608 board User Manual.  After scanning the document, let's get started! Plug in LPCXpresso54608 (as shown below).  You will see the pre-loaded, Out of Box demo, which features Draupner TouchGFX.  A screen shot is shown below, Once you've explored the pre-loaded demo, you will likely want to learn more.   For this you will need to configure and build an  MCUXpresso Software Development Kit (SDK)  for your LPCXpresso54608 development board. Register or use your login credentials to sign in and download software from NXP. You can create a configuration for the LPCXpresso54608 in one of two ways: By typing 'LPCXpresso54608' or selecting boards>LPC>LPCXpresso54608 Once you have selected the board you will be presented with two options: 'Select Configuration' or 'Specify Additional Configuration Settings'. (It is recommended that you name the configuration something that specifies the settings as this will help identify multiple configurations.)   Note: By default the SDK Builder will choose IAR as the default toolchain for Windows.  For this tutorial we will use Windows as our Development Host OS.  If this is not the desired toolchain or OS please 'Select 'Specify Additional Configuration Settings' The following window will be presented, which allows you to download an SDK for IAR, Keil or Both (selecting 'All toolchains'.).  During this stage, you can also specify any necessary middleware for your download.  You can select or deselect these under the 'Select Optional Middleware' Select 'Go to SDK builder' once you have made your choices. Note:You may be prompted to update your info before you are allowed to download the package. If this happens select the link in the red at the top to resolve any issues. Once the information is updated you can click on the 'Overview' at the top and reselect 'SDK Builder' to return to the screen you were on. You have the opportunity to rename your file one last time before you hit download now. Once you select 'Download Now' you will be presented with a license agreement and once agreed to the download will start. Once you have downloaded the packaged .zip use your favorite utility to extract to a known location --> Continue here if IAR is your selected default toolchain. --> Continue here if KEIL is your selected default toolchain. --> Continue here if MCUXpresso is your selected default toolchain (coming March 2017!)
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