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Kinetis Microcontrollers Knowledge Base

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This file contains some codewarrior code examples migrated from the IAR examples in the sample code package available at the freescale webpage: blink_blue blink_red blink_rgb serial_test_19200 serial_test_115200 touch_toggle_leds Regards
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The following file contains example code for usage of ADC, UART, DAC, GPIO, I2C, interrupts, MCG and timers for the k53 platform. Regards.
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Hi Community members! Here you can find the source code of the MSD Host Bootloader implemented on the AN4368 document using the TWR-K70F120M and CodeWarrior 10.6 and a document that describes the migration process of the original source code for the TWR-K60N512 to a TWR-K70F120M and the steps to use the application. Attached you will find a image.s19 file created to be used with the bootloader application as an example. :smileyinfo: This document and code are intended to demonstrate the use of the AN4368 source code on a 120 MHz device and CodeWarrior 10.6 but is not replacing the work done on the application note. I hope this can be helpful for you! Best Regards, Adrian :smileyplus: If it was useful for you do not forget to click on the Like button. It would be nice!
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Hi everybody, The original document was moved to KSDK subspace. You can find it in the next link: https://community.freescale.com/docs/DOC-102612 Regards, Carlos
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Hi,   Attached USB Mass Storage Device Host Bootloader code is ported for KL25 / KL26.   Reference: AN4368 USB Mass Storage Device Host Bootloader   Thanks & Regards, Swaminathan.R
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Hello Kinetis friends! The launch of new Kinetis devices and development tools called "Kinetis K2" brought some new K22_120 MHz devices to the K22 family portfolio. :smileyinfo: Please notice the name "Kinetis K2" only refers to the Kinetis generation, but it is not related to part number (e.g. K63/K64 are part of K2 generation). Previously existing Kinetis portfolio already had some K22_120 MHz devices, so this  caused confusion regarding the documentation, header files, features, development boards and others, because the part numbers are very similar. I created the next reference table outlining the existing K22_120 MHz parts with their corresponding files and boards. The last column is an overview of the features or peripherals that are either missing or added in each device. :smileyalert: IMPORTANT NOTES:           - I gathered and put together this information as reference, but it is not official. For the most accurate information please visit our webpage www.nxp.com.           - Header files MK22F12.h and MK22FA12.h apply for legacy K22_120 devices. However TWR-K21F120M(A) board has a K21_120 part, so use MK21F12.h or MK21FA12.h instead.      Colleague Carlos Chavez released an Engineering Bulletin (EB811) with good information related to this document:      http://cache.nxp.com/files/microcontrollers/doc/eng_bulletin/EB811.pdf Regards! Jorge Gonzalez
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The following (after the "- - - - - -" is debugged code for flashing Green, Red, and Blue LEDs on the FRDM-K22F module. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #include "fsl_device_registers.h" #include "board.h" static int i = 0; int main(void) {   // LEDs are common-anode, with cathodes connected to port pins.   // Therefore, logic high (1) turns them off, and logic low   // (0) turns them on.   short OFF = 1;   short ON = 0;         hardware_init();           GPIO_DRV_SetPinDir(kGpioLED1, kGpioDigitalOutput); //Green LED      GPIO_DRV_SetPinDir(kGpioLED2, kGpioDigitalOutput); //Red LED      GPIO_DRV_SetPinDir(kGpioLED3, kGpioDigitalOutput); //Blue LED      GPIO_DRV_WritePinOutput(kGpioLED1, OFF); //Green LED initially off      GPIO_DRV_WritePinOutput(kGpioLED2, OFF); //Red LED initially off      GPIO_DRV_WritePinOutput(kGpioLED3, OFF); //Blue LED initially off      while (1)           {           for (i = 0; i<0xFFFFFF; i++)           {           }           GPIO_DRV_WritePinOutput(kGpioLED1, ON); //Green LED on           for (i = 0; i<0xFFFFFF; i++)           {           }           GPIO_DRV_WritePinOutput(kGpioLED1, OFF); //Green LED off           for (i = 0; i<0xFFFFFF; i++)           {           }           GPIO_DRV_WritePinOutput(kGpioLED2, ON); //Red LED on           for (i = 0; i<0xFFFFFF; i++)           {           }           GPIO_DRV_WritePinOutput(kGpioLED2, OFF); //Red LED off           for (i = 0; i<0xFFFFFF; i++)           {           };           GPIO_DRV_WritePinOutput(kGpioLED3, ON); //Blue LED on           for (i = 0; i<0xFFFFFF; i++)           {           }           GPIO_DRV_WritePinOutput(kGpioLED3, OFF); //Blue LED off           }      return 0; }
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Fast Startup Guide for Freescale MCU, wirtten by China IMM FAE team for mass market users.
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This file describes how to install KSDK, is easy and simple with images and descriptions step by step, so you wont have problems with the installation.
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Overview      This document describes how to use ezport module on TWR-K22F120M,  and the usage of ezport on other platforms  is similar.      The EzPort module is a serial flash programming interface that enables In-System Programming (ISP) of flash memory contents in a 32-bit general-purpose microcontroller.      The block diagram of EzPort module is as follows: Hardware environments TWR-K60D100M TWR-K22F120M TWR-SER Primary and Secondary Tower boards      Because the EzPort module is a serial flash programming interface that is compatible with a subset of the SPI format. TWR-K60D100M is used as a SPI master and TWR-K22F120M is used as a slave. The flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M.      Connect the TWR-K60D100M and TWR-SER by two tower boards, the execution result will be outputed by uart. Step 1:TWR-K22F120M enters into EzPort mode Hardware setup:       If the TWR-K22F120M wants to enter EzPort mode, the EZP_CS pin should be asserted and then reset pin is asserted. TWR-K60D100M                         TWR-K22F120M PTC6(J11 A71)                           EZP_CS(J31 Pin9) Software setup: Open the project “ezport_test_kinetis”; Define the MACRO “ENTER_EZPORT_MODULE” in hal_config.h; Build and download the program into TWR-K60D100M, run it, then EZP_CS pin of TWR-K22F120M will be asserted. Then power-on the TWR-K22F120M. The TWR-K22F120M will enter into EzPort mode. Step 2: Use EzPort to read/erase/program the flash Hardware setup: TWR-K60D100M                         TWR-K22F120M PTD0(J11 B63)                            EZP_CS(J31 Pin9) PTD1(J11 B64)                            EZP_CLK(J31 Pin4) PTD2(J11 A76)                            EZP_DI(J31 Pin8) PTD3(J11 A77)                            EZP_DO(J31 Pin6) GND(J11 B65)                             GND(J31 Pin5) Note: TWR-K60D100M and TWR-K22F120M should have common ground. Software setup: Open the project “ezport_test_kinetis”; Undefine the MACRO “ENTER_EZPORT_MODULE” in hal_config.h, then EzPort test codes will be enabled; Build and download the program into TWR-K60D100M, run it, then the flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M, the execution result will output to the console by uart.
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I created this spreadsheet from the data in the user manual. Exported here as Microsoft Excel but I encourage folks to use the link below to Google Docs. Useful when documenting how pins will be used. Highlight the intended alternate function of a pin. Use commenting to resolve issues when collaborating with others. Add notes to better describe how a pin is used for a particular application. K64 Pins Template - Google Sheets
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1. How Calibration works There are three main sub-blocks important in understanding how the Kinetis SAR module works.  There is a capacitive DAC, a comparator, and the SAR engine that controls the module. Of those blocks, the DAC is most susceptible to variations that can cause linearity problems in the SAR. The DAC is architected with three sets of binary weighted capacitors arrayed in banks, as in Figure 1. The capacitors that represent the most significant bits of the SAR (B15:B11) are connected directly to the inputs of the comparator. The next bank of five capacitors (B10:B6) is connected to the top plate of the MSB array through an intentionally oversized scaling capacitor. The final six capacitors that makeup the least significant bits of the SAR (B5:B0) are correspondingly connected to the top plate of the middle bank of capacitors through another scaling capacitor. Figure 1. Arrangement of DAC capacitors Only the MSB capacitor bank is calibrated. Because the first scaling capacitor is intentionally oversized, each of the non-calibrated MSB capacitors will have an effective capacitance too small to yield accurate results. However, because they are always too small, we can measure the amount oferror that each of those capacitors would cause individually, and add that back in to the result. Calibration starts with the smallest of the LSB capacitors, B11. The SAR samples Vrefl on all of the capacitors that are lower-than or equal-to the capacitor under test (CUT), while connecting all of the smaller capacitors to Vrefh. The top plate of all of the MSB capacitors is held at VDDA while this happens. After the sampling phase is complete, the top plates of the MSB capacitors are allowed to float, and the bottom plates of the MSBs not under test are connected to Vrefl. This allows charge to redistribute from the CUT to the smaller capacitors. Finally, an 11 bit SAR algorithm (corresponding with the 11 capacitors that are smaller than the MSB array) is performed which produces a result that indicates the amount of error that the CUT has compared to an ideally sized capacitor. This process is repeated for each of the five MSBs on both the plus side and minus side DACs and the five error values that are reported correspond to the five MSBs accordingly. All of these error values are about the same magnitude, with a unit of 16-bit LSBs. See Figure 2 for an example. Figure 2. Example of calibration on bit 11 The DAC MSB error is cumulative. That is, if bit 11 of the DAC is set, then the error is simply the error of that bit. However if bit 12 of the DAC is set, the total error is equivalent tothe error reported on bit 12, plus the error reported on bit 11. For each MSB the error is calculated as below, where Ex is the error found during the calibration for its corresponding MSB bit: When bit 11 of the DAC is set: CLx0 = E0. When bit 12 of the DAC is set: CLx1 = E0+E1. When bit 13 of the DAC is set: CLx2 = E2 + E1 + 2E0. When bit 14 of the DAC is set: CLx3 = E3 + E2 + 2E1 + 4E0. When bit 15 of the DAC is set: CLx4 = E4 + 2E3 + 4E2 + 8E1 + 16E0 Figure 3. Effect of calibration error on ADC response These are the values that are then placed in each of the CLxx calibration results registers. Figure 3 shows how the errors would accumulate if all of the CLxx registers were set to zero. The offset and gain registers are calculated based on these values as well. Because of this, the gain and offset registers calibrate only for errors internal to the SAR itself. Self calibration does not compensate for board or system level gain or offset issues. 2. Recommended Calibration Procedure From the above description it is evident that the calibration procedure is in effect several consecutive analog to digital conversions. These are susceptible to all of the same sources of error of any ADC conversion. Because what is primarily being measured is the error in the size of the MSB capacitors; the recommendation is to configure the SAR in such a way as to make for the most accurate conversions possible in the environment that the SAR is being calibrated in. Noise is the primary cause of run-to-run variation in this process,so steps should be taken to reduce the impact of noise during the calibration process. Such as: All digital IO should be silent and unnecessary modules should be disabled. The Vrefh should be as stable and high a voltage as possible, since higher Vrefh means larger ADC code widths. An isolated Vrefh pin would be ideal. Lacking that, using an isolated VDDA as the reference would be preferable to using VREFO. The clock used should be as noise free as possible, and less than or equal to 6 MHz. For this purpose the order of desirable clock sources for calibration would be OSC > PLL > FLL > ASYNC The hardware averaging should be set to the maximum 32 samples. The Low Power Conversion bit should be set to 0. The calibration should be done at room temperature. The High Speed Conversion and Sample Time Adder will not have much effect in most situations, and the Diff and Mode bits are completely ignored by the calibration routine. The calibration values should be taken for each instance of the SAR on a chip in the above conditions. They should be stored in nonvolatile memory and then written into their appropriate registers whenever the ADC register values are cleared. In some instances, the system noise present will still cause the calibration routine to exhibit greater than desired run-to-run variation. One rule of thumb would be to repeat calibration several times and look at the CLx0 registers. If the value reported in that register varies by more than three, the following procedure can be implemented. Run the calibration routine several times. Twenty to forty times. Place the value of each of the calibration registers into a corresponding array. Perform a bubble sort on each array and find the median value for each of the calibration registers. Use  these median values as described for typical calibration results.
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系统框图如下图示: 硬件设计支持如下扩展功能: (1)      USB、SD卡(SDHC接口) (2)      SWD调试+串口Printf。 (3)      SPI外设接口,支持NRF24L01、W5100、WIFI等。 (4)      两路差分ADC输入、一路DAC输出。 (5)      50M有源晶振,供MCU以及以太网PHY工作。 (6)      32.768K RTC时钟晶振。 (7)      SPI Flash、EEPROM(IIC接口) (8)      CAN接口。以太网应用。 (9)      TSI电容触摸按键。 (10)  GPIO:按键输入以及LED输出指示。 (11)  PWM输出。 (12)  FlexBus总线扩展: 扩展应用一:4.3寸LCD。 扩展应用二:FPGA扩展高速ADC采集。(设计进行中) 基于K60+SSD1963驱动4.3寸屏并移植ucGUI的测试实例,移植后的视频效果见如下链接: http://v.youku.com/v_show/id_XNzAwMTE5OTA0.html?firsttime=15 Pixels/sec: 16397220。
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底层驱动源码,mdk5.0打开。 另有移植好了的ucGUI的源码。
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SSD1963驱动4.3寸屏原理图。
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主板原理图。
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介绍通过使用Kinetis KL系列以及K系列通过不同方式驱动液晶。
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The USB OTG module in Kinetis parts uses a Buffer Descriptor Table (BDT) in system memory to manage USB endpoint communications, the BDT is a a 512-byte buffer and there are 3 registers in USB module to contain the base address for it, and it must be 512-byte aligned otherwise there would be issue during transfer. In USB stack ver 4.1.1, some Kinetis old parts like K60N512, K20D72M have the demo project basked on CodeWarrior ARM compiler, and in khci_kinetis.c, bdt is defined as following: #define _BDT_RESERVED_SECTION_ #if(defined _BDT_RESERVED_SECTION_) #ifdef __CWCC__ #pragma define_section usb_bdt ".usb_bdt" RW __declspec(usb_bdt) uint_8_ptr bdt; but since the base address is defined as below: #define BDT_BASE               ((uint_32*)(bdt)) so the bdt definition is not correct , and we have to change it as below: #define _BDT_RESERVED_SECTION_ #if(defined _BDT_RESERVED_SECTION_) #ifdef __CWCC__ #pragma define_section usb_bdt ".usb_bdt" RW __declspec(usb_bdt) uint_8 bdt[512];//uint_8_ptr bdt; and the definition for usb_dbt section can be found in MK20X256_flash.lcf. with above modification, we can make the demo of "msd_mfs_generic" work well as expected. Please kindly refer to the following result got from TWR-K20D72M. FAT demo Waiting for USB mass storage to be attached... Mass Storage Device Attached ****************************************************************************** * FATfs DEMO * * Configuration:  LNF Enabled, Code page =1258 * ****************************************************************************** ****************************************************************************** * DRIVER OPERATION * ****************************************************************************** 1. Demo function: f_mount   Initializing logical drive 0...   Initialization complete ----------------------------------------------------------------------------- 2. Demo functions:f_getfree, f_opendir, f_readdir getting drive 0 attributes............... Logical drive 0 attributes: FAT type = FAT16 Bytes/Cluster = 2048 Number of FATs = 2 Root DIR entries = 512 Sectors/FAT = 250 Number of clusters = 63858 FAT start (lba) = 36 DIR start (lba,clustor) = 536 Data start (lba) = 568 ... 127716 KB total disk space. 127624 KB available. ----------------------------------------------------------------------------- ****************************************************************************** * DRECTORY OPERATION * ****************************************************************************** 1. Demo functions:f_opendir, f_readdir Directory listing...     ----A 2014/04/16 17:25     32253  tek00000.png     ----A 2014/04/16 17:34     31451  tek00001.png     ----A 2014/07/04 14:57     20549  tek00002.png     DR--- 2010/12/25 23:30         0 DIRECT~1     D---- 2010/01/01 00:00         0 DIRECT~2 3    File(s),     84253 bytes total 2    Dir(s) ----------------------------------------------------------------------------- 2. Demo functions:f_mkdir 2.0. Create <Directory_1> 2.1. Create <Directory_2> 2.2. Create <Sub1> as a sub directory of <Directory_1> 2.3. Directory list Directory listing...     ----A 2014/04/16 17:25     32253  tek00000.png     ----A 2014/04/16 17:34     31451  tek00001.png     ----A 2014/07/04 14:57     20549  tek00002.png     DR--- 2010/12/25 23:30         0 DIRECT~1     D---- 2010/01/01 00:00         0 DIRECT~2 3    File(s),     84253 bytes total 2    Dir(s) ----------------------------------------------------------------------------- 3. Demo functions:f_getcwd, f_chdir 3.0. Get the current directory     CWD: 0:/ 3.1. Change current directory to <Directory_1> 3.2. Directory listing Directory listing...     D---- 2010/01/01 00:00         0  .     D---- 2010/01/01 00:00         0  ..     D---- 2010/01/01 00:00         0  sub1 0    File(s),         0 bytes total 3    Dir(s) 3.3. Get the current directory     CWD: 0:/Directory_1 ----------------------------------------------------------------------------- 4. Demo functions:f_stat(File status), f_chmod, f_utime 4.1. Get directory information of <Directory_1>     DR--- 2010/12/25 23:30         0 Directory_1 4.2  Change the timestamp of Directory_1 to 12.25.2010: 23h 30' 20 4.3. Set Read Only Attribute to Directory_1 4.4. Get directory information (Directory_1)     DR--- 2010/12/25 23:30         0 Directory_1 ----------------------------------------------------------------------------- 5. Demo functions:f_rename Rename <sub1> to <sub1_renamed> and move it to <Directory_2> Directory listing...     D---- 2010/01/01 00:00         0  .     D---- 2010/01/01 00:00         0  ..     D---A 2010/01/01 00:00         0 SUB1_R~1 0    File(s),         0 bytes total 3    Dir(s) ----------------------------------------------------------------------------- 6. Demo functions:f_unlink Delete Directory_1/sub1_renamed Directory listing...     D---- 2010/01/01 00:00         0  .     D---- 2010/01/01 00:00         0  .. 0    File(s),         0 bytes total 2    Dir(s) ****************************************************************************** * FILE OPERATION * ****************************************************************************** 1. Demo functions:f_open,f_write, f_printf, f_putc, f_puts, fclose 1.0. Create new file <New_File_1> (f_open)     File size =    0 1.1. Write data to <New_File_1>(f_write) 1.2. Flush cached data     File size =   52 1.3. Write data to <New_File_1> (f_printf) 1.4. Flush cached data     File size =  103 1.5. Write data to <New_File_1> (f_puts) 1.6. Flush cached data     File size =  152 1.7. Write data to <New_File_1> uses f_putc function 1.8. Flush cached data     File size =  199 1.9. Close file <New_File_1> ----------------------------------------------------------------------------- 2. Demo functions:f_open,f_read, f_seek, f_gets, f_close 2.0. Open <New_File_1> to read (f_open) 2.1. Get a string from file (f_gets)     Line 1: Write data to  file uses f_write function 2.2. Get the rest of file content (f_read)     Line 2: Write data to file uses f_printf function Line 3: Write data to file uses f_puts function Line 4: Write data to file uses f_putc functionûöF¬ â•:7Rz}™ yzjw8¸×áÀ—»ÃЭ¹òÍ­ ä‹Hïk¨Wã½c'     ²7këÞÑ%VrC×»Ô¼ÒSÈÑèR+NjD¡¾òû>ú3‰SËþo^ÎI Pë±ñ‰þ/Directory_1[1] 2.3. Close file (f_close) ----------------------------------------------------------------------------- 3. Demo functions:f_stat, f_utime, f_chmod 3.1. Get  information of <New_File_1> file (f_stat)     ----A 2010/01/01 00:00       199  New_File_1.dat 3.2  Change the timestamp of Directory_1 to 12.25.2010: 23h 30' 20 (f_utime) 3.3. Set Read Only Attribute to <New_File_1> (f_chmod) 3.4. Get directory information of <New_File_1> (f_stat)     -R--A 2010/12/25 23:30       199  New_File_1.dat 3.5. Clear Read Only Attribute of <New_File_1> (f_chmod) 3.6. Get directory information of <New_File_1>     ----A 2010/12/25 23:30       199  New_File_1.dat ----------------------------------------------------------------------------- 4. Demo functions:f_ulink Rename <New_File_1.dat> to  <File_Renamed.txt> Directory listing...     D---- 2010/01/01 00:00         0  .     D---- 2010/01/01 00:00         0  ..     ----A 2010/12/25 23:30       199  FILE_R~1.TXT 1    File(s),       199 bytes total 2    Dir(s) ----------------------------------------------------------------------------- 5. Demo functions:f_truncate Truncate file <File_Renamed.txt> 5.0. Open <File_Renamed.txt> to write 5.1. Seek file pointer     Current file pointer:    0     File pointer after seeking:  102 5.2. Truncate file     File size =  102 5.3. Close file ----------------------------------------------------------------------------- 6. Demo functions:f_forward 6.0. Open <File_Renamed.txt> to read 6.1. Forward file to terminal Line 1: Write data to  file uses f_write function Line 2: Write data to file uses f_printf function 6.2. Close file ----------------------------------------------------------------------------- 7. Demo functions:f_ulink Delete <File_Renamed.txt> Directory listing...     D---- 2010/01/01 00:00         0  .     D---- 2010/01/01 00:00         0  .. 0    File(s),         0 bytes total 2    Dir(s) *------------------------------ DEMO COMPLETED    ------------------------ * ******************************************************************************
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   Android Open Accessory support allows external USB hardware (an Android USB accessory) to interact with an Android-powered device in a special accessory mode. When an Android-powered powered device is in accessory mode, the connected accessory acts as the USB host (powers the bus and enumerates devices) and the Android-powered device acts in the USB accessory role. This ADK library is based on Freescale Kinetis KL26 MCU, It implements some functions to communicate with android phone.
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