about ADC sampling clock

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about ADC sampling clock

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goto11
Contributor III

hello,Community

Can I change the ADC sampling clock during operation?
Are there any precautions when making changes?

best regards

Goto

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igorpadykov
NXP Employee
NXP Employee

Hi Goto

for clock usage one can look at Figure 14-2. Timing

i.MX 7Dual Applications Processor Reference Manual

Seems it is possible to change clock during operation,

valid data will be on next conversion cycle.

Best regards
igor
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1,318 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Goto

for clock usage one can look at Figure 14-2. Timing

i.MX 7Dual Applications Processor Reference Manual

Seems it is possible to change clock during operation,

valid data will be on next conversion cycle.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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goto11
Contributor III

hello,

Table 93. Recommended operating conditions for 12-bit ADC in .MX 7 Dual Family of Applications Processors Datasheet
Is it OK to make the RIEXT value larger than 250Ω (for example, from several kΩ to dozens of kΩ) when FCLK and FSOC are operated at close Min values?

What kind of problems will occur if the resistance value is increased?

best regards

Goto

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igorpadykov
NXP Employee
NXP Employee

for new questions recommended to create new thread.

Best regards
igor

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