Hi,
I am working with i.MX8MM EVK and another SoC is interfaced to the EVK hw.
The SAI1 of iMX8MM is Master and generating the Frame Sync.
This Frame Sync from SAI1 is connected to I2S In Port of SoC.
Internally in SoC this Frame Sync is routed to I2S Out port and it is used as Frame Sync of I2S Out
When we observe these two Frame Syncs (Frame Sync Generated by SAI1 and Frame Sync at I2S Out port) on CRO. they are not in phase.
Is there a way or any programming sequence of SAI registers can we achieve the similar phase?
Because out of phase can lead us to sample swap issues.
Please let us know.
Thank you, Sreedhar
