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This patch release is target for LPDDR2 ( dual channels in interleave mode ) support on i.MX6DL platform. Two patches are prepared to modify u-boot and kernel in order to have correct DRAM init sequence, 400MHz & 24MHz frequency switching and suspend/resume support. The patches are not fully verified. It is provided as reference for customer to enable their i.MX6DL board with LPDDR2. Customization and Testing is needed by customer. We need to remind some points here: MMDC_MDCFG3LP in 24MHz need to increase the margin ( 0x40222 -> 0x80555 ) in order to pass the OS frequency switch stress test. We are identifying the reason but this workaround is working fine and included to the patch. Code changes in kernel is prepared so that it is compatible to DDR3. In other words, the DDR type will be detected and a correct handling will be done for LPDDR2 and DDR3. In LPDDR2 system, we can't put SDQ pin into LPM during suspend. Otherwise, the system cannot resume. Dual channels in fix mapping mode is not recommended to use.

Hi All, The new i.MX 6 SL L3.0.35_2.1.0 release is now available on the http://www.freescale.com/site. · Files available # Name Description 1 L3.0.35_2.1.0_LINUX_DOCS i.MX 6SoloLite Linux BSP Documentation. Includes Release Notes, Reference Manual, User guide. API Documentation 2 L3.0.35_2.1.0_LINUX_MMDOCS i.MX 6SoloLite Linux Multimedia Codecs Documentation. Includes CODECs Release Notes and User's Guide 3 L3.0.35_2.1.0_ER_SOURCE i.MX 6SoloLite Linux BSP Source Code Files 4 L3.0.35_2.1.0_MM_CODECS i.MX 6SoloLite Linux Multimedia Codecs Sources 5 L3.0.35_2.1.0_AACP_CODECS i.MX 6SoloLite Linux AAC Plus Codec 6 L3.0.35_2.1.0_DEMO_IMAGE i.MX 6SoloLite Linux Binary Demo Files · Target HW boards o i.MX6SL-EVK · New features o Updated thermal equation for i.MX 6SoloLite o Added Fuse check for all the devices o Enabled DISPLAY power gating feature on TO1.2 · Known issues o For known issues and limitations please consult the release notes.

When to improve kernel booting using hibernation [1], I found kernel initialized each component [2] took too much time. One solution is to remove unnecessary module to save time. Another approach is to delay those modules until user space up. Then it won’t lost some features just because hopes to gain benefit on booting speed. This is very useful since hibernation’s trigger point is at the late_initcall [3]. Kernel doesn't need do much module initialize since hibernate will restore those module status later. The detailed implementation is in the attached patch. [1]: hibernation is a technique to store system memory content to storage. Then the device can be shutdown and read the content back after power on. [2]: component means subsystem or driver. [3]: Consult kernel/power/hibernate.c, software_resume

Change ambient graphic - Ambient Grafic: Fluxbox (low memory and fast initialization) - Install (root): apt-get update apt-get install fluxbox - After instalation, edit file /etc/lightdm/lightdm.conf and change line: "greeter-session=unity-grreter" for "greeter-session=fluxbox" if, preference auto login comment this line: "autologin-user=user" for "#autologin-user=user" - Reboot and try fluxbox 🙂

This document provides the steps to patch and build a fastboot Linux System. This document assumes the BSP 3.0.35_1.1.0 and a i.MX6Q platform. For more information about what the patches do, please check this link. Install LTIB and move to the ltib folder Download the ltib patch from this document and patch it (patch -p1 < 0001-set-imx6_ssd_lite_defconfig-as-default-kernel-config.patch) Go to the LTIB configuration menu (./ltib -m config), select mx6q platform and min profile Select mx6q_sabresd as u-boot board Fetch and Patch: u-boot: Prepare u-boot source code (./ltib -m prep -p u-boot) Move to u-boot folder (cd rpm/BUILD/u-boot-2009.08) Download u-boot attached patches Patch code (for p in *.patch; do patch -p1 < $p;done) kernel: Prepare kernel source code (./ltib -m prep -p kernel) Move to kernel folder (cd rpm/BUILD/linux) Download attached kernel patches Patch code (for p in *.patch; do patch -p1 < $p;done) Build (./ltib) Add an application to run first after boot in rootfs/etc/inittab (see example inittab file, it captures data from the MIPI Camera) Create necessary devices nodes under rootfs/dev. For example terminal: sudo mknod ttymxc0 c 207 16 video capture nodes: sudo mknod video0 c 81 5; sudo mknod video1 c 81 6 video display nodes: sudo mknod video16 c 81 0; sudo mknod video17 c 81 1 frame-buffers: for i in 0 1 2 3 4; do sudo mknod fb$i c 29 $i; done Package rootfs (cd rootfs; sudo tar --numeric-owner -cvfj ../rootfs.tar.bz2 *; cd ..) On a windows machine, download latest Manufacturing tool and uncompress it. Move rootfs.tar.bz2, rootfs/boot/uImage and rootfs/boot/u-boot.bin into the corresponding Manufacturing folder (Profiles\MX6Q Linux Update\OS Firmware\files) Choose a sabresd-eMMC profile and flash the board Boot the board using the eMMC

Notes: First run the playback pipeline then the streaming pipeline. The above example streams H263 video and AMR audio data. Change codec format to your needs. In case where the iMX is the streaming machine, the audio encoder 'amrnbenc' must be installed before. This scenario has not been tested Shell variables and pipelines Playback machine (receiver) # On playback machine, set either IMX2PC or PC2IMX variables, then run the pipeline ## IMX2PC: Case where PC does the playback AUDIO_DEC_SINK="rtpamrdepay ! amrnbdec ! alsasink " VIDEO_CAPS="\"application/x-rtp,media=(string)video,clock-rate=(int)90000,encoding-name=(string)H263-1998\"" VIDEO_DEC_SINK="rtph263pdepay ! ffdec_h263 ! autovideosink" ## End of IMX2PC Settings ## PC2IMX: Case where iMX does the playback AUDIO_DEC_SINK="rtpamrdepay ! mfw_amrdecoder ! alsasink " VIDEO_CAPS="\"application/x-rtp,media=(string)video,clock-rate=(int)90000,encoding-name=(string)H263-1998\"" VIDEO_DEC_SINK="rtph263pdepay ! vpudec ! mfw_v4lsink " ## End of PC2IMX Settings PLAYBACK_AUDIO="udpsrc caps=\"application/x-rtp,media=(string)audio,clock-rate=(int)8000,encoding-name=(string)AMR,encoding-params=(string)1,octet-align=(string)1\" \ port=5002 ! rtpbin.recv_rtp_sink_1 \ rtpbin. ! $AUDIO_DEC_SINK \ udpsrc port=5003 ! rtpbin.recv_rtcp_sink_1 \ rtpbin.send_rtcp_src_1 ! udpsink port=5007 sync=false async=false" PLAYBACK_VIDEO="udpsrc caps=$VIDEO_CAPS port=5000 ! rtpbin.recv_rtp_sink_0 \ rtpbin. ! $VIDEO_DEC_SINK \ udpsrc port=5001 ! rtpbin.recv_rtcp_sink_0 \ rtpbin.send_rtcp_src_0 ! udpsink port=5005 sync=false async=false" PLAYBACK_AV="$PLAYBACK_VIDEO $PLAYBACK_AUDIO" # Playback pipeline gst-launch -v gstrtpbin name=rtpbin $PLAYBACK_AV Streaming Machine (sender) # On Streaming machine, set either IMX2PC or PC2IMX variables, then run the pipeline ## IMX2PC: Case where iMX does the streaming IP=x.x.x.x # IP address of the playback machine VIDEO_SRC="mfw_v4lsrc" VIDEO_ENC="vpuenc codec=h263 ! rtph263ppay " AUDIO_ENC="audiotestsrc ! amrnbenc ! rtpamrpay " ## END IMX2PC settings ## PC2IMX: Case where PC does the streaming IP=y.y.y.y # IP address of the playback machine VIDEO_SRC="v4l2src" VIDEO_ENC="ffenc_h263 ! rtph263ppay " AUDIO_ENC="audiotestsrc ! amrnbenc ! rtpamrpay " # END PC2PC settings STREAM_AUDIO="$AUDIO_ENC ! rtpbin.send_rtp_sink_1 \ rtpbin.send_rtp_src_1 ! udpsink host=$IP port=5002 \ rtpbin.send_rtcp_src_1 ! udpsink host=$IP port=5003 sync=false async=false \ udpsrc port=5007 ! rtpbin.recv_rtcp_sink_1" STREAM_VIDEO="$VIDEO_SRC ! $VIDEO_ENC ! rtpbin.send_rtp_sink_0 \ rtpbin.send_rtp_src_0 ! queue ! udpsink host=$IP port=5000 \ rtpbin.send_rtcp_src_0 ! udpsink host=$IP port=5001 sync=false async=false \ udpsrc port=5005 ! rtpbin.recv_rtcp_sink_0" STREAM_AV="$STREAM_VIDEO $STREAM_AUDIO" # Stream pipeline gst-launch -v gstrtpbin name=rtpbin $STREAM_AV

The i.MX 6 D/Q L3.035_1.0.3 patch release is now available on www.freescale.com · Files available # Name Description 1 L3.0.35_1.0.3_TEMP_PFD_PATCH This patch release is based on the i.MX 6Dual/6Quad Linux 12.09.01 release. The purpose of this patch release is update thermal sensor calibration routine and correct the PFD workflow in U-Boot. More details in the release notes.

This work is the result of my daughter's idea, she finished it with my guidance. Cradle-1 Palmsize mini-HPC World's first full function heterogeneous mini-HPC, this is what it looks like: 1 Architecture Overall: CPU+GPU heterogeneous, 4 nodes, connected by a 100M Ethernet switcher; Nodes： FreeScale I.MX6 Quad core mini-pc, with 4 ARM Cortex-A9 cores and 1 Vivante GC2000 GPU 2 Software OS: Ubuntu 11.10 linaro OpenCL driver: Vivante GC2000 OpenCL driver Compiler: C/C++: gcc 4.6.1, Fortan90/95: gfortran 4.6.1, MPI Parallel Computing: MPICH2 1.4-1 NFS network file system: nfs-kernel-server 1.2.4 SSH security: openssh 1:5.8 3 Hardware The hardware of all nodes are the same, only the software configurations are slightly different. One of them was assigned as the master node, the others are slave nodes. They were TV sticks originally, with android 4.0 installed. The node's hardware specification is: CPU: 4 1.2G Cortex-A9 cores GPU: 1 Vivante GC2000 GPU RAM: 1G DDR ROM: 8G SD NIC: usb2.0 100M Ethernet Adapter (this NIC is not the TV stick's component, we added it) WIFI: 150M Display Interface: HDMI Network Switcher: 5 port 100M Ethernet Switcher 4 Network Each node has one USB2.0 NIC and one WIFI interface, the WIFI is used as the backup connection for NIC connection. Network configurations are: IP Address assignment: (baby1 - baby4 are the four computing nodes) baby1: 100M NIC 192.168.10.1 WIFI 192.168.0.111 baby2: 100M NIC 192.168.10.2 WIFI 192.168.0.112 baby3: 100M NIC 192.168.10.3 WIFI 192.168.0.113 baby4: 100M NIC 192.168.10.4 WIFI 192.168.0.114 5 Performance Cradle-1 has 16 1.2G ARM Cortex-A9 cores and 4 Vivante GC2000 GPU cores, the total computing power of these 20 computing devices is more than 100GFLOPS, more powerful than an ordinary desktop. The whole machine is only a little bigger than a palm, and the total power consumption is less than 15 watts. The overall architecture of Cradle-1 is almost the same as Chinese Tianhe-1A or the Titan in the oak ridge lab. they used the same set of software, LINUX+OPENCL+OPENMPI. Cradle-1 supports C/C++, Fortran90/95. And almost all kinds of parallel computing algorithms can run on it, the only difference is the scale. We coded a MPI parallel computing program for large matrix multiplication with 4 processes, each process had 5 threads, four threads for the four CPU cores, and one thread for GPU computing. 6 Appearance Front Back Top Left Right One node, it has three interfaces, the right is HDMI interface, upper-left is the wireless adapter for keyboard and mouse, down-left is the power connection. One node is running Ubuntu 11.10. Coded a simple OpenCL program to display OpenCL driver information On a notebook, using remote desktop access function to obtan the node baby1's desktop. This is the sign in desktop of baby1 node. Baby 1 has X11VNC server installed. sign in baby1, open a terminal Ran a MPI testing program, ensuring that all babies (baby1 - baby4) were working Any comments? please mail to audrey.tao@hotmail.com

In an earlier topic (Linux fast boot on i.MX6 Sabresd board.) about Linux fast boot on i.MX6 SabreSD board, the demo showed an application startup procedure including u-boot boot, Linux kernel boot, rootfs mount, demo application load and run. Additionally, this demo shows a live video on a LVDS screen from board CSI camera. Its total boot up time is about 1.x seconds. Now, based on Linux fast boot, we integrate it with another demo application: surround view, this demo shows 4 different live videos on LVDS screen from 4 UDP data sockets. In this demo video is drawn by GPU to screen, that means the frame buffers decode by video decoder directly pass to GPU, which is not same as previous demo. The encode video format is also MJPEG in this demo. This demo creates 4 different threads every thread handle one UDP socket, receive buffer, push this buffer to video decoder, get frame buffer from video decoder, pass this buffer to GPU, start GPU render, command GPU draw the render buffer to the screen; this thread needs to occupy one ARM processor to show every video smoothly. So we need a i.MX 6DQ board in this demo. Hardware: i.MX 6DQ SabreSD board Software: 12.09 GA BSP Difference with previous fast boot demo: U-boot difference with previous fast boot demo. 1: Add logo show. (For remove CSI2, V4L2, Capture modules ) Kernel different with previous fast boot demo. 1: Add SMP support. 2: Add Network support. (IPV4, PHY, network driver(FEC)) 3: Remove CSI2, V4L2, Capture. (Remove this need in U-boot procedure Freescale logo show on the screen! ) 4: Add GPU support in kernel. Rootfs difference with previous fast boot demo: 1: Keep rc.s firstly run, while in previous fast boot demo, demo is the firstly running program on rootfs. 2: Get rid of almost all service in rc.conf just keep “mount /proc and /sys” service. Network performance on this demo Software : The default network receive buffer is about 128KB. This default size is too small for this demo; the demo application can't fetch receive buffer in time while kernel network stack will discard some UDP packets if we don't enlarge it. We enlarge this receive buffer through command in inittab before demo running. Hardware: i.MX6 DQ TOI less than 1.2 version has some Ethernet mac layer issue, this issue will also cause some UDP packets lost. So please ensure the SabreSD board i.MX6 DQ chip TOI version is equal 1.2 or more. Attached are some files for your reference. Below patches assume this SabreSD board boot from SD3 and default display port is LVDS1. 1: U-boot and kernel patches based on 12.09. 2: Demo application based on 12.09 vpu test program and vpu test program running configure file. 3: Rootfs startup scripts.

In January 2013, Adeneo Embedded launched 2 dedicated blogs. These blogs are both run by Adeneo Embedded Windows and Linux experts, multiple time MVP awarded. The goal is to provide the windows and linux communities with specific up-to-date information as well as the latest announcements concerning these two companies. Click here to visit our Windows dedicated blog Click here to visit our Linux dedicated blog Follow, comment and subscribe ! Ce document a été généré à partir de la discussion suivante : Adeneo Embedded experts launch 2 dedicated blogs !

Here are two patches to support BT656 and BT1120 output for i.MX6 ipuv3. With this patch, the i.MX6 can support the CVBS output on TV encoder. It is useful for a TV box. "L3.0.35_1.1.0_GA_bt656_output_patch.zip" is the patch for Freescale L3.0.35_1.1.0_GA_iMX6DQ BSP. "r13.4.1_bt656_output_patch.zip" is the patch for Freescale Android R13.4.1 BSP. 1. Features supported: 1) Support BT656(8 bits) and BT1120 (16 bits)interlaced output on display port. 2) Support both RGB and YUV frame buffer for BT656/BT1120 output. 3) Support PAL and NTSC mode. 4) Support on the fly switch between PAL and NTSC mode. 5) Support CVBS output based on adv7391 TV encoder. 2. Hardware link between iMX6 and adv7391 TV encoder chip. IPU1_DI0_DISP_CLK connected to adv7391 CLKIN pin. IPU1_DISP0_DAT_23~DISP0_DAT_16 connected to adv7391 P7~P0 pins. IPU1_DI0_PIN2 connected to adv7391 HSYNC pin. (option) IPU1_DI0_PIN4 connected to adv7391 VSYNC pin. (option) - Android R13.4.1 kernel. 3. How to use -- Copy the two patch files to kernel folder. $ git apply ./0001-Support-BT656-and-BT1120-output-for-iMX6-ipuv3.patch $ git apply ./0002-Support-adv739x-TV-encoder-for-BT656-output.patch -- Select them in kernel config and build the new kernel image: Device Drivers ---> Graphics support ---> [*] MXC BT656 and BT1120 output [*] ADV7390/7391 TV Output Encoder -- Uboot parameters for video mode Output BT656 NTSC data to display port with UVYV frame buffer mode: "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16" Output BT656 NTSC data to display port with RGB565 frame buffer mode: "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565" Output BT656 PAL data to display port with RGB24 frame buffer mode: "video=mxcfb0:dev=bt656,BT656-PAL,if=BT656,fbpix=RGB24" Output CVBS NTSC signal on adv7391 with UYVY frame buffer mode: "video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=UYVY16" Output CVBS PAL signal on adv7391 with RGB565 frame buffer mode: "video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565" -- Switch between PAL and NTSC $ echo D:720x480i-60 > /sys/class/graphics/fb0/mode $ echo D:720x576i-50 > /sys/class/graphics/fb0/mode 4. Note 1) For 8 bits BT656 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_16", it can also be any other continued display data pins, for example if "DISP0_DAT_7~DISP0_DAT_0" are used, the macro "BT656_IF_DI_MSB" in "kernel_imx/drivers/mxc/ipu3/ipu_disp.c" should be changed from "23" to "7". 2) For 16 bits BT1120 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_8", it can also be any other continued display data pins, the macro "BT656_IF_DI_MSB" should be modified if the hardware pins are changed. 3) When bt656 interface is the second display for each IPU,1-layer-fb (it can be checked with command "$ cat /sys/class/graphics/fbx/fsl_disp_propperty"), the frame buffer can only be YUV format. In this case, the IPU DC channel was used for BT656 display, it has no CSC function, so RGB frame buffer was not supported. 2013-08-09 updated: The new release package "L3.0.35_1.1.0_GA_bt656_output_patch_2013-08-09.zip" had fixed the BT656 dual display issue on iMX6S/DL. Removed the old release package. 2013-09-04 updated: The new release package "r13.4.1_bt656_output_patch_2013-09-04.zip" had fixed the BT656 dual display issue on iMX6S/DL. For default, the dual display was tested with HDMI + CVBS, HDMI is the main display and adv739x CVBS output is the second display. For iMX6DQ which has two IPUs, please assign dual display to two IPUs, for example adv739x is on IPU1 DI0, it is fixed, because hardware pins used for it is fixed. Then we can assign HDMI or LVDS to another IPU (IPU2). For iMX6S/DL which has only one IPU, since adv739x had used IPU1 DI0, another display should be IPU1 DI1. 2013-09-30 updated: Added patch for L3.0.35_4.1.0_GA BSP, the file is "L3.0.35_4.1.0_GA_bt656_output_patch_2013-09-30.zip". 2014-07-21 updated: Added patch for L3.10.17_1.0.0_GA BSP, the file is "L3.10.17_1.0.0_GA_bt656_output_patch_2014-07-21.zip". 2015-01-26 updated: Updated the IPU microcode for 1080i50 and 1080i60 BT1120 output, the parameters "N" for command BMA is a 8 bits parameters, so its max value is 255, but for 1080i50 and 1080i60 output, it needs more blank data in each line, the "N" will be bigger than 255, the updated IPU microcode can fix this limitation. The updated file is "IPU_Microcode_Update_for_BT1120_1080i_20150126.zip". You can update the macro "DC_MCODE_BT656_xxx" and function _ipu_dc_setup_bt656_interlaced() to the old patch if you used BT1120 mode to support 1080i display. The verified 1080i display mode is: { /* 1080I60 Interlaced output */ "BT1120-1080I60", 30, 1920, 1080, 13468, 20, 3, 20, 2, 280, 1, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED, FB_MODE_IS_DETAILED,}, { /* 1080I50 Interlaced output */ "BT1120-1080I50", 25, 1920, 1080, 13468, 20, 3, 20, 2, 720, 1, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED, FB_MODE_IS_DETAILED,}, 2016-01-28 updated: Updated IPU microcode to align with BT656.4 specification for NTSC output. For other BSP version with NTSC format support, please reference to ipu_disp_update.c for the final microcode. File "L3.0.35_4.1.0_GA_bt656_output_patch_20160128.zip"., Details, please reference to the readme.txt file in the package. 2016-06-24 update: Added BT656 and BT1120 progressive mode support. File "L3.0.35_4.1.0_GA_bt656_output_patch_20160624.zip". Details, please reference to the readme.txt file in the package. The patch for 3.14.52 GA1.1.0 BSP will be released in next week. 2016-06-27 update: Add BT656 and BT1120 display patch for 3.14.52 BSP. File "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27.zip", details, please reference to the readme.txt in the package. 2017-03-10 update: Fixed a hard coding DC macro issue for progressive mode. Added patch "0008-Fixed-a-hard-coding-DC-macro-issue-for-progressive-m.patch" in L3.0.35_4.1.0_GA_bt656_output_patch_2017-03-10.zip. The code in patch "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27" is correct.

Starting from $52, the VAR-SOM-MX6 sets the bar for unparalleled design flexibility. The VAR-SOM-MX6 ensures scalable and simplified development, while also extending the product lifecycle. Thanks to four CPU core assembly options, customers can apply a single System on Module in a broad range of applications to achieve short time-to-market for their current innovations, while still accommodating potential R&D directions and marketing opportunities. VAR-SOM-MX6 CPU: Freescale iMX6 Key features include: Freescale i.MX6 1.2GHz Quad / Dual / Single core Cortex-A9 2GB DDR3, 1GB SLC NAND Flash Full HD 1080p video encoding/decoding capability Vivante GPU providing 2D/3D acceleration Simultaneous multiple display support Gigabit Ethernet TI WiLink™ 6.0 single-chip connectivity solution (Wi-Fi, Bluetooth®) PCI-Express 2.0, S-ATA 3.0 Camera interface USB 2.0: Host, OTG Audio In/Out Dual CAN Bus This versatile solution's -40 to 85°C temperature range and Dual CAN support is ideal for industrial applications, while 1080p video and graphics accelerations make it equally suitable for intensive multimedia applications. The impressive scalability of the VAR-SOM-MX6 satisfies the needs of the most demanding future application requirements whether faster processing power, enhanced algorithms or improved graphics and video performance to name just a few. The VAR-SOM-MX6 is an all-round solution with broad connectivity and sophisticated video and acceleration graphic capabilities, delivering a range of middle to high end assembly options all from the same product. For more details, please see VAR-SOM-MX6 CPU: Freescale iMX6

i.MX Processors Knowledge Base

i.MX Processors Knowledge Base

Discussions

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Patch to Support BT656 and BT1120 Output For i.MX6 BSP

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VAR-SOM-MX6, $52 i.MX6 System on Module