Dear NXP support team
In the NXP LS1028A reference design 100MHz LP-HCSL clock was used for SerDes 1&2 reference and PCIe reference.
Can these clocks be 100 MHz HCSL instead of LP-HCSL?
With Regards
Krishnam Raju M
Solved! Go to Solution.
Hi @mkraj
The clock selected should be as per the specification mentioned in section# 3.16.2 of the LS1028A datasheet. And I believe the HCSL clock is as per the specification required for the SerDes clock.
Thanks
Khushbu
Hi @mkraj
The clock selected should be as per the specification mentioned in section# 3.16.2 of the LS1028A datasheet. And I believe the HCSL clock is as per the specification required for the SerDes clock.
Thanks
Khushbu