NXP Designs ナレッジベース

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

NXP Designs Knowledge Base

ディスカッション

ソート順:
Smart Pump Monitor Demo This demo shows a small water pump rig consisting of a water pump and 3 valves put together to collect data for supervised machine learning. Normal operation as well as abnormal conditions may be simulated with the rig. There are 2 sensor boards attached by clamps to the water pipe. Each sensor board has many sensors on it, but only the accelerometer will be used to gather the data. One board is used for data logging.  The other runs a model which was generated via machine learning based on data logged from the first board.  Pump vibration measurements are processed through the model by the MCU on that board to determine the operating state of the system Features Use of accelerometer to measure pipe vibration Sensing algorithm detects when the pump is clogged or drawing on air How to find patterns in data taken by NXP Sensors Links Sensor Fusion 10-Axis Sensor Data Logger http://www.nxp.com/files/sensors/doc/user_guide/RD-KL25-AGMP01-UG.pdf Related demos NXP Sensor Toolbox Demo Vibration Monitoring - Prediction using NXP Sensors Sensor Fusion for Kinetis MCUs
記事全体を表示
NXP's secure over-the-air communication for automotive networks features embedded hardware crystallographic engine for the rapid decryption of received data.   Features   MPC5748G targets High-End Body and High-End gateway Rich communication peripheral set & HSM - embedded Security Module Encryption, decryption, message code generation, secured flash memory for secured storage Secured communication inside or outside the vehicle (wired or wireless) Encryption with different algorithms demo Decryption in both hardware (HSM) or software comparison Links High End Body Control Module Central Gateway / In-Vehicle Networking Block Diagram  
記事全体を表示
Description Earlier this year NXP organized a promotional opportunity for amateur radio enthusiasts to use their creativity and build their own power amplifier designs. NXP received numerous creative submissions in this competitive Homebrew RF Design Challenge. We appreciate the dedication and enthusiasm from the community that made this contest a success. First place winner An MRF101AN broadband amplifier design with 1 W Input, 100 W Output 1.8-54 MHZ Amplifier deck. (For more information visit:NXP MRF-101 - RFPowerTools )  It is an amplifier with a bandwidth of 1.8MHz to 54MHz. Maximum output power of 100W up to 30MHz and 70W up to 50MHz. Maximum power supply 50V to 4A, with a Voltage Standing Wave Ratio of 1.5:1 maximum. The design dimensions of the PCB is 5x5 cm (2x2 in). and 310g weight including fan and heat sink. Second place winner A 600W broadband HF amplifier using affordable LDMOS devices (For more information visit: https://qrpblog.com/2019/10/a-600w-broadband-hf-amplifier-using-affordable-ldmos-devices/  ) This project is meant to demonstrate the capabilities of the MRF300 transistors as linear broadband devices in the 2-50MHz range and to be used by radio amateurs as a starting point for a medium-high power amplifier. This is also my entry to the NXP Homebrew RF Design Challenge 2019. To achieve the target of 600W output while also minimizing the level of even-number harmonics, a “push-pull” configuration of two transistors is used. Luckily, the manufacturer made it easy to design the PCB layout for such a thing by offering two versions (the MRF300AN & MRF300BN) that have mirrored pinout. The common TO-247 package is used, with the source connected to the tab. Each individual MRF300 LDMOS transistor is specified at 330W output over a 1.8-250MHz working frequency range, a maximum 28dB of gain and over 70% efficiency. The recommended supply range is 30-50Vdc. By studying the specifications, it looks like with correct broadband matching and some operational safety margin we can get close to 600W output at a voltage of around 45V across a resonably large bandwidth; the aim is to cover 1.8 to 54MHz. Main challenges when designing this amplifier are related to achieving good input and output matching over the entire frequency range as well as maintaining high and flat gain. Good linearity and a low level of harmonic products are mandatory. As the TO-247 is not a package specifically designed for high-power RF, there are some challenges with thermal design and PCB layout as well. Information taken from the essay by the winner. Third place winner A High Efficiency Switchmode RF Amplifier using a MRF101AN LDMOS Device for a CubeSat Plasma Thruster (For more information visit: Research - SuperLab@Stanford ) The Class E amplifier utilizes the active device as a switch, operating in only cutoff (off) and saturated (on) conditions. This minimizes the overlap of voltage and current, reducing losses in the active device. To further reduce loss the Class E amplifier utilizes an inductively tuned resonant network to achieve zero voltage switching, bringing the voltage across the switch to zero before turn on, eliminating energy stored in the output capacitance of the active device that would otherwise be dissipated. This is achieved with an inductively tuned series resonant output filter.  In the Class E amplifier losses are almost entirely determined by the current conducted by the active device so a high drain impedance is desired to maximize efficiency. The drain impedance is ultimately limited by the voltage rating of the switch. For our desired output power of 40W and the maximum voltage rating of 133V for the MRF101AN this impedance is still less than 50 ohms, so a L match circuit is used to match the drain impedance to 50 ohms. The load network in our design provides a drain impedance of 15.4+12.8j. As the MRF101AN will operate in saturation a high drive level is desired. To eliminate the need for a preamplifier and allow for digital control, we use a high speed gate drive chip typically used in switch-mode power supplies, LMG1020, to drive the MRF101AN instead of a RF preamplifier. A resonant network is used to provide voltage gain at the fundamental and third harmonic, providing a quasi-square wave on the gate which helps insure the device remains in saturation. Conclusion It was a close call and highly competitive! Each participant had their own creative, unique and impressive way of displaying the capabilities of these new parts. NXP is always up for new design challenges. Ready for the next challenge?
記事全体を表示
See how to use the Tower Kinetis 70 development hardware and programmed with PEG GUI, MQX Software Solutions RTOS and processor expert software development tools to create this touch screen controlled, wireless motor control demonstration.   Features Hardware and software modular system that NXP provides for the Kinetis Microcontrollers K series One TWR-K70F120M board communicates with another TWR-K70F120M board wirelessly and then the second TWR-K70F120M board controls a motor Usage of LCD touch panel to control the speed of the motor   Featured NXP Products CodeWarrior Development Tools|NXP Processor Expert Software and Embedded Compon|NXP Kinetis K70 120 MHz Tower System Module|NXP MQX
記事全体を表示
Demo The demo session focuses on demonstrating the transport of human voice over the Bluetooth Smart protocol on Kinetis Wireless platforms running the Kinetis Bluetooth Low Energy stack. The intended setup is made up of two Kinetis Wireless KW41Z evaluation boards connected to an audio codec board with a headset (headphones + microphone) connected at each end. The audience can use the headsets for a full duplex voice communication experience. This demo session is aimed at showcasing the performance of the Kinetis KW41Z platform Demo Features Full duplex voice samples transport over Bluetooth LE transport using Kinetis KW41Z enabled with the Kinetis BLE v4.2 stack SGTL5000 audio codec for sample processing and Kinetis K24F for used for compression Interactive component through a pair of headsets for demonstrating the full duplex voice capabilities NXP Recommends Product Link Kinetis® KW41Z-2.4 GHz Dual Mode: Bluetooth® Low Energy and 802.15.4 Wireless Radio Microcontroller (MCU) based on Arm® Cortex®-M0+ Core https://www.nxp.com/products/wireless/thread/kinetis-kw41z-2.4-ghz-dual-mode-bluetooth-low-energy-and-802.15.4-wireless-radio-microcontroller-mcu-based-on-arm-cortex-m0-plus-core:KW41Z?&fsrch=1&sr=1&pageNum=1 Ultra-Low-Power Audio Codec https://www.nxp.com/products/audio/audio-converters/ultra-low-power-audio-codec:SGTL5000?&fsrch=1&sr=1&pageNum=1 Kinetis® K24 120 MHz MCU Tower® System Module TWR-K24F120M|Tower System Board|Kinetis® MCUs | NXP 
記事全体を表示
NXP Content: PN7462, NTAG I²C plus NXP Recommends: PN7462, NTAG I²C plus The NFC Cube is a universal demo with which all 3 basic NFC operation modes can be shown: Interaction between a device and a card or tag Interaction between 2 electronic devices (NFC as cable replacement) Interaction between a device and an NFC phone Value Propositions The NFC Cube is a universal NFC demo Support Under https://nxp.box.com/NFCcube you find more information and a video showing the NFC Cube in action.
記事全体を表示
The Attach demo consists of a 3 board stack up using the Arduino connectors on the Kinetis FRDM-KL26Z board. The demo runs from a Li Ion polymer battery and consists of 1x FRDM-KL26Z board, 1x FRDM-BATT board (including battery and loudspeaker) and 1x Arduino LCD touch screen board. The code builds using either CodeWarrior V10.6 or IAR EWARM V7.20.2. The software uses eGUI to drive the Arduino LCD and runs demos for the following Sensors - FXOS8700 (combined 3-axis Accelerometer and Magnetometer) and FXAS21000 (3-axis MEMs Gyro). The demo also includes 7-element eCompass code for which full source code is available. Finally, the board also uses the MC34673 1.2A charger for Li Ion batteries, charging is accomplished via either of the USB ports on the FRDM-KL26Z. All datasheets, schematics, source code and bill of materials are included in the zip archive. NOTE: software update which now includes 10-element eCompass software and Kalman filtering code creating a far more accurate eCompass solution. Recommended Products Product Link Freedom Development Platform for Kinetis® KL16 and KL26 MCUs (up to 128 KB Flash) FRDM-KL26Z|Freedom Development Platform|Kinetis® MCU | NXP 
記事全体を表示
Demo Owner: b14714 The motor control development toolbox is a comprehensive set of tools that plug into the MATLAB™/Simulink™ model-based design environment for rapid application development on MCUs.  The SFIO Toolbox is a new addition that can control Simulink system models by SFIO algorithms running directly on NXP DSC and Kinetis MCU hardware. NXP FreeMASTER debug monitor and data visualization tool interfaces provide an interface to monitor signals in real time for data logging and signal calibration. Features The motor control development toolbox is a comprehensive set of tools that plug into the MATLAB™/Simulink™ model-based design Auto code generation straight to the Micro. NXP developed a library and embedded target to interface with MATLAB and SimuLink Customers can directly go from the model based environment to the MCU without having to write C code by hand Featured NXP Products Motor Control
記事全体を表示
Demo   Resonant Power Supply Video from IEEE.TV   The TEA19161T is a resonant / LLC half bridge converter and the TEA19162T is a PFC converter. Combining these two IC’s together with the SR controller TEA1995T at the secondary side results in a high efficient converter over the whole output power range. These demos show 2 examples of a resonant power supply; one with an output power of 240 W (12V / 20A), and another with an output power of 90 W (19.5V / 4.6A). Both showing a very low component count and small design. The resonant supplies operate in normal mode for high and medium power levels, in low power mode at medium and low power levels and in burst mode at (very) low power levels. Low power mode and burst mode operation provides a reduction of power losses, resulting in a higher efficiency at lower output power levels. Power levels for switching over from one mode to another mode can be selected by the end customer by adjusting component values. The efficiency at high power is well above 90%. No load power consumption is well below 75 mW. At 250mW output power the input power is only 360mW, which is well below the 500 mW required to be compliant with EUP lot6 power saving specification, soon becoming mandatory for consumer electronics sold in Europe.   Features: Full digital output voltage regulation and burst mode control Easy and low-cost application with cycle-by-cycle capacitive voltage control Very high efficiency over wide load range Special low power mode enabling high efficiency at 0–30% load Extremely low no-load stand-by power (< 75 mW), saves auxiliary supply cost ___________________________________________________________________________________________________________________________   Featured NXP Products:   Resonant power supply control IC|NXP GreenChip Synchronous Rectifier controller|NXP ______________________________________________________________________________________________________________________   Desktop PC Supply. 12v, 20A (240W)                                                   Ultra Slim 90W Adaptor. 19.5V / 4.6A (90W)              C17
記事全体を表示
本文说明在S32G上如何修改eMMC时钟,来避开200Mhz的或及倍频的频率EMI干扰检查点。 目录 1    背景说明和需要的资料... 2 1.1  背景说明... 2 1.2  需要的资料... 2 2    eMMC的硬件连接... 3 3    eMMC时钟初始化方法... 4 3.1  eMMC时钟源说明及修改目标... 4 3.2  M7+Bootloader方法(可选项) 6 3.3  ATF初始化方法... 7 4    修改eMMC时钟... 9 4.1  ATF的修改... 9 4.2  Uboot相关的修改... 9 4.3  非整除时钟的修改考虑... 10 5    测试结果... 11 update to V2,增加分数分频: 6    分数分频... 13 6.1  调试方法... 13 6.2  代码修改... 14 6.3   测试结果   15
記事全体を表示
本文说明S32G在Linux中如何使用内存读写工具来发起一个HSE Server服务请求,以确认HSE是否正常工作。本说明的目的旨在在极端缺少Debug手段的情况下,确认HSE的状态。 目录 1    背景说明与参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 2 2    启动包含HSE的Linux镜像... 3 3    HSE服务代码逻辑与寄存器状态... 3 3.1  HSE Demo示例... 3 3.2  IDEL情况下MU寄存器状态... 6 4    使用Linux memtool命令来访问HSE. 10 4.1  检查HSE状态... 10 4.2  准备hseSrvDescriptor_t数据结构... 10 4.3  申请HSE服务... 11 5    其它建议... 12
記事全体を表示
本文说明如何配置MCAL UART模块为DMA模式。 默认的MCAL UART模块是使用的PIO模式。 本文采用软件版本为MCAL RTD 4.0.2。 目录 1    背景与资料说明... 2 1.1  背景说明... 2 1.2  所需资料说明... 2 2    创建UART工程... 2 2.1  打开工程... 2 2.2  修改波特率... 3 2.3  编译... 3 2.4  默认工程说明与运行... 4 3    配置UART DMA模式... 5 3.1  参考资料... 5 3.2  增加并配置MCL模块... 5 3.3  修改UART模块... 6 3.4  修改Platform模块... 7 3.5  处理Cache相关问题... 7 3.6  测试结果... 8
記事全体を表示
本文说明如何配置MCAL ICU模块为GPIO Input。 默认的MCAL ICU模块是使用FTM输入为示例的。 本文采用软件版本为MCAL RTD 4.0.2 目录 1    背景与资料说明... 2 1.1  背景说明... 2 1.2  所需资料说明... 2 2    创建ICU工程... 3 2.1  打开工程... 3 2.2  编译与运行... 3 2.3  默认工程说明... 4 3    增加GPIO输入支持... 6 3.1  修改说明... 6 3.2  修改Port模块... 6 3.3  修改ICU模块... 7 3.4  Platform模块... 8 3.5  主测试程序修改... 9 3.6  测试结果... 10
記事全体を表示
本文说明S32G3 M7核Standby MCAL demo 详细情况及定制,并在进入Standby之前 调用QSPI 接口将QSPI NOR flash配置进入 deep power down模式,以节省用电。 目录 1    参考资料说明... 2 2    G2和G3 Demo的区别... 2 3    G3 MCAL Demo的实现... 4 3.1  修改UART驱动... 4 3.2  实现时钟关闭代码... 4 3.3  配置电源模式切换驱动... 5 3.4  配置唤醒源... 5 3.5  加入PMIC驱动... 6 3.6  主函数逻辑实现... 7 3.7  运行测试... 7 3.8  未来开发计划... 8 4    将QSPI NOR设置进入Deep Power Down模式... 8 4.1  Fls层的修改... 10 4.2  中间层的修改... 10 4.3  QSPI_IP层的修改... 13 4.4  主测试函数调用... 16 4.5  Fls驱动的测试... 17 5    将Deep Power Down功能集成到STANDBY工程中并测试    18 5.1  EB配置... 18 5.2  主测试函数与编译修改... 20 5.3  运行测试... 21
記事全体を表示
现在越来越多的客户,对于S32G PFE在master/slave的使用有了需求。 但是,PFE只有4个HIF接口,HIF0~HIF3,而PFE有3个EMAC口,以及LLCE2PFE也需要要给HIF,从而HIF成为一个关键资源。 同时,有些客户需要从A核,M核的业务考量,A核和M核的网络不仅要和外部设备进行通信,同时A核和M核内部也有通信需求,并且需要把业务报文和管理报文分离,这就对PFE master/slave的使用场景有了更多变化,以及对各种配置有了更多需求。 因此,针对PFE/Slave的几种使用典型的使用场景,进行配置。
記事全体を表示
在进行时钟同步时,目前S32G2/G3有一种很典型的使用场景: Grand master clock  <-> S32G PFE <-> 其余连接在PFE 某些 eMAC口上的设备 外部的grand master clock,连接在PFE的一个eMAC上,要同步S32G以及连接在PFE其余eMAC上的设备时钟。 但是S32G2/G3的PFE仅仅是支持timestamp,对于将S32G PFE设置成交换机使用时,PFE不能实现Transparent clock的功能。 因此,本文讨论将PFE + S32G SoC当作Transparent clock,以及将PFE + S32G当作boundary clock,来同步S32G以及其余部件的时钟。
記事全体を表示
本文说明了S32G如何储存mac地址,包括dts保存,systemd指定和fuse保存的办法: 目录 1 需要的软件................................................................. 2 2 背景说明 .................................................................... 2 3 PFE eMAC MAC地址说明 ......................................... 2 3.1 DTS配置 ................................................................. 2 3.2 源代码说明 ............................................................. 3 3.3 测试 ........................................................................ 4 4 GMAC0 MAC地址说明 .............................................. 4 4.1 DTS配置 ................................................................. 4 4.2 源代码说明 ............................................................. 4 4.3 SystemD脚本 ......................................................... 5 4.4 固定GMAC MAC地址的修改办法 ........................... 6 5 用Uboot命令烧写FUSE MAC地址项 .......................... 7 6 修改为从fuse中获得GMAC0 MAC地址 ...................... 9 6.1 Uboot代码修改 ....................................................... 9 6.2 Uboot写MAC寄存器说明 ...................................... 10 6.3 测试 ...................................................................... 10  
記事全体を表示
本文为如下G2版本的升级篇,使用G3+更新的软件 目录 1    需要的软件与工具... 2 1.1  软件工具与文档... 2 1.2  开发说明... 3 2    测试软件安装编译说明... 3 2.1  安装LLCE Logger驱动... 3 2.2  编译LLCE驱动测试程序(以CAN Logger 为例) 4 2.3  Logger Demo功能说明... 5 2.4  M7 BootLoader ATF镜像冲突检查... 7 2.5  LLCE Logger Demo去掉CLOCK INIT. 9 2.6  LLCE Logger Demo去掉MCU 相关INIT. 10 2.7  LLCE Logger Demo程序去掉PORT INIT. 10 2.8  中断冲突说明... 10 2.9  去掉其它无用初始化... 11 3    Bootloader工程说明... 11 3.1  关掉XRDC支持... 12 3.2  关掉eMMC/SD支持(可选) 13 3.3  关掉secure boot(可选) 14 3.4  增加LLCE 驱动所需要的PORT 的初始化... 15 3.5  解决Bootloader,MCAL 与Linux 的clock 冲突... 16 3.6  配置A53 Boot sources: 34 3.7  配置M7 Boot sources: 36 3.8  关闭调试软断点... 37 3.9  编译Bootloader工程... 38 3.10 制造Bootloader的带IVT的镜像... 39 3.11 烧写镜像... 41 4    Linux LLCE logger功能修改... 42 4.1 ATF的修改... 42 4.2 Linux中关于LLCE配置... 44 4.3 LLCE相关初始化冲突说明... 45 5    测试... 46 5.1  硬件连接... 46 5.2  LLCE logger 测试过程... 46 S32G Boot customization doc how to run bootloader to run mcal&linux https://community.nxp.com/t5/NXP-Designs-Knowledge-Base/S32G-Bootloader-Customzition/ta-p/1519838
記事全体を表示
doc&project&patch&script explain to support GD qspi nor in lauterbach, flash tool,ivt,fls mcal, fls bootloader and linux 目录 1    背景和参考资料... 2 1.1  背景说明... 2 1.2  参考资料... 3 1.3  硬件连接... 5 2    Lauterbach脚本驱动开发(可选) 5 2.1  准备参考脚本... 5 2.2  QuadSPI_ReadID.. 6 2.3  配置QSPI NOR为DOPI模式... 7 2.4  使用DOPI模式 READ_8DTRD.. 10 2.5  测试结果... 13 3    Flash tool算法镜像开发... 14 3.1  Flash SDK实现的算法... 15 3.2  开发新的flash源代码... 17 3.3  测试结果... 20 4    开发IVT参数头... 22 4.1  S32G QSPI控制器配置区别... 24 4.2  QSPI的配置区别... 28 4.3  测试结果... 29 5    开发MCAL Fls驱动... 30 5.1  MCAL Fls驱动工程说明... 30 5.2  FlsMem配置页... 34 5.3  MemCfg配置页... 35 5.4  测试结果... 49 6    开发Bootloader工程中Fls驱动... 51 6.1  Bootloader工程说明... 51 6.2  Bootloader与MCAL Fls驱动的不同点... 53 6.3  镜像打包... 54 6.4  测试结果... 56 7    开发Linux驱动(可选) 57 7.1  Linux GD驱动支持情况... 57 7.2  时钟相关的修改... 58 7.3  在DTS中增加GD flash的支持... 60 7.4  修改源代码增加flash信息结构体... 61 7.5  修改源代码中flash的fixup支持DTR模式... 62 7.6  Turning dummy值解决读错位的问题... 64 7.7  测试结果... 65
記事全体を表示
S32G Host Secure debug methods with Lauterbach tool after LC is updated, and some details about secure debug knowledge in S32G. 本文主要描述S32G在演进生命后如何使用lauterbach工具来进行调试,涉及到S32G HSE相关知识点。
記事全体を表示