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Linker issue with BLE demo of QN9090DK6 Hi all, I run into issues when trying to compile any of the ble demo projects of the QN9090DK6. Errors akin to: signalr.c:(.text._kill_r+0x12): undefined reference to `_kill' Appear for all projects. Now I have read that this may be a lib-setting problem. But I have tried semihosted and it still does not work. Any ideas on what this could be? Is there a need to set the correct lib settings? If yes can you give me an example, e.g., for the qn9090dk6_wireless_uart_freertos demo? Additional infos: Simple projects (such as hello world) work without any issues Had the same issue on two separate machines Could this be related to some problem with my toolchain installation? When I try to swich the lib type using "Quick Settings -> Set library/header type" none of the options are selecteable. Thanks for your help QN9090-DK006 BLE-NFC MCUXpresso-SDK  Re: Linker issue with BLE demo of QN9090DK6 Hi Ricardo Thank you for pointing this out. This has solved my issue, the examples compiles just fine with the older IDE. Or in other words: the SDK is not fully compatible with the latest IDE. Best, Manuel Re: Linker issue with BLE demo of QN9090DK6 Hi, Thank you. According to the MCUXpresso SDK Release Notes for QN9090 (v2.6.15), the SDK was compiled and tested with MCUXpresso IDE version 11.9.0. Could you please try with this IDE version? Please let me know your findings. Regards, Ricardo Re: Linker issue with BLE demo of QN9090DK6 Hi Ricardo Thanks for the quick reply. IDE version: MCUXpresso IDE v11.10.0 [Build 3148] [2024-07-03] SDK: SDK_2.x_QN9090DK6 version 2.6.15 I have not modified the SDK example. The only thing I have modified (and tried different ones) was the lib type after it failed with the default setting. I can confirm I have followed all steps in said document: MCUXpresso SDK downloaded with all features and added to MCUXpresso MCUXpresso IDE installed Connectivity QTool installed, DK6 production flash programmer tested (it works) Python 2.7 installed, added to PATH and pycryptodome installed All done on Windows 11 OS (both machines on which I tried) Best, Re: Linker issue with BLE demo of QN9090DK6 Hello, Hope you are doing well. Could you please clarify the following information? IDE version SDK version If any modification was done to the SDK example. Could you please help me confirm the steps from section 3 of the QN9090-DK006 Development Kit Getting Started? Best Regards, Ricardo
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FXPS71407 change physaddr Hi !  I use the method in datasheet to change physaddr in otp, but it does not work. How could I change the physaddr in otp. When the board power on, the physaddr is 0x0. Then I send a crm command 0x08180112 to change the physaddr to 0x1. I want physaddr keep 0x1 when the board reset. So I use the method in the datasheet below. The Lock_UF2 is 0, then I send crm command 0x18118a5b to write to the WRITE_OP_EN register. I can get the correct crm response. But then I send a crm command to read back the register value, I can not communicate with the board. And when I power off and on, the physaddr is still 0x0. How could I change the physaddr to 0x2 permanently? Thanks! Re: FXPS71407 change physaddr Hi gangli “if there is U_OTP_ERR in DEVSTAT2, is it meaning the chip is broken?” I contacted the expert to see if there was any way to fix it but no. “The device will remain definitively in that state.” I hope this information has helped you. Have a great day and best of luck. Re: FXPS71407 change physaddr Hi RafaR Thanks for your help! If there is U_OTP_ERR in DEVSTAT2, is it meaning the chip is broken? Because U_OTP_ERR influences the pdcm data And how could I avoid U_OTP_ERR when I write $11 register? Hope for you response! Thanks! Re: FXPS71407 change physaddr Hi gangli_weride I am still in contact with the expert, let me share the information with you. “The U_OTP_ERR cannot be cleared as the memory is only One Time Programmable (i.e OTP).” I hope this information has helped you Have a great day and best of luck. Re: FXPS71407 change physaddr Hi RafaR: By the way, Could you show me how to clear u_otp_err in DEVSTAT2? Re: FXPS71407 change physaddr Hi gangli_weride Can you please confirm the voltage applied to BUS_I during programming ? It needs to be within 9-11V for at least 10ms after the register $11 write command. Re: FXPS71407 change physaddr Hi gangli_weride Let me confirm with an expert on this device to have a definitive answer. I will contact you soon Have a great day and best of luck. Re: FXPS71407 change physaddr And why the u_otp_err happen? How could I clear this error? Re: FXPS71407 change physaddr Hi!   Now I can change the physaddr by sending write $11 register data 0x8a. And the physaddr changed successfully!   But after I reset, there is a u_otp_err error. And I can not clear this error by reading DEVSTAT2 register. Is there something wrong? Thanks! Hope for you response! Re: FXPS71407 change physaddr Before send crm 0x1811820c to write OTP:0x5f register data: 0x00, LOCK_UF2 was not set. Sending crm 0x181182f8, response: 0x18820087. The crm was sending correctly. After send crm 0x181182f8, I read 0x5f register, there is no response of crm 0x105f00f8, I can check the LOCK_UF2.  Thanks! Re: FXPS71407 change physaddr Hi gangli_weride Could you check if the UF2 regions are not locked before and after the reset?, It seems to be exactly what is happening to you. Have a great day and best of luck.
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Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 I'm trying to debug/program an S32G with S32DS 3.6 on Ubuntu 20.04. Everything builds fine, but I get this error when attempting to launch the debugger: Could not determine GDB version using command: /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py --version; execution time 58 seconds Could not find platform independent libraries Could not find platform dependent libraries Consider setting $PYTHONHOME to [: ] Python path configuration: PYTHONHOME = (not set) PYTHONPATH = (not set) program name = '/usr/local/bin/python' isolated = 0 environment = 1 user site = 1 import site = 1 sys._base_executable = '/usr/local/bin/python' sys.base_prefix = '/usr/local' sys.base_exec_prefix = '/usr/local' sys.platlibdir = 'lib' sys.executable = '/usr/local/bin/python' sys.prefix = '/usr/local' sys.exec_prefix = '/usr/local' sys.path = [ '/usr/local/lib/python310.zip', '/usr/local/lib/python3.10', '/usr/local/lib/lib-dynload', ] Python Exception : No module named 'encodings' Python not initialized This is in a fresh Ubuntu 20.04 VM running on an Ubuntu 22.04 host (because S32DS fails to install on Ubuntu 22 😞 😞 ). Do I need to be hacking in an install of Python 3.10 here? Ubuntu 20.04 uses Python 3.8, but that's not what arm-none-eabi-gcc-py is looking for. The strace log attached along with looking at the binary with strings makes it look like Python 3.10 paths are hardcoded in. Also seems odd that I'm getting that ModuleNotFoundError since 1) arm-none-eabi-gcc-py doesn't seem to be finding Python and 2) "import encodings" works fine in my system Python. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Hello @dustinr, I'm glad to know that you were able to debug your chip. About the installation guide, with the S32DS 3.6 being a very recent release, some documents may be missing, just as the installation guide. I am sorry for the inconvenience.  Best regards. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 That did the trick, thank you! I originally followed the S32DS 3.5 installation guide since I couldn't find the 3.6 guide on the NXP website, and it doesn't include anything about doing a non-distribution Python install. Has the 3.6 guide been published somewhere? I'm looking on this page: https://www.nxp.com/design/design-center/software/automotive-software-and-tools/s32-design-studio-ide/s32-design-studio-for-s32-platform:S32DS-S32PLATFORM#downloads Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Hello @dustinr, I have received the following information from the internal team: " Based on the attached log, it looks like a Python environment issue. Has the customer followed the instructions in S32DS.3.6.0/S32DS/help/pdf/S32DS_Installation_Guide.pdf chapter titled Installation prerequisites for Linux platforms to install Python 3.10.x? For S32Debugger to work correctly while debugging ARM cores, the user must install Python 3.10.x. Please follow the relevant chapter to install the necessary tools. Once installed, open a new terminal, navigate to the directory containing the installed S32DS 3.6.0, and execute ./s32ds.sh to launch S32DS. " Please let me know if this information solves your problem. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Hello @dustinr,  Thanks for all the information, I will share it with the appropriate team and let you know their feedback.  Best regards  Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Log attached, I'm crossing my fingers that the VM will work. Happy to be a guinea pig. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Hello  @dustinr  Thanks a lot for the information, after some investigation, there might be a configuration issue with the python environment for the S32DS 3.6.0 for Linux. I will escalate this topic with the internal team and come back with their feedback. About the Native PC issue, please consider that we may find some error that arise because of the use of a VM, either way, I will do my best to try to solve the issue. Please also share all the installation logs so I may also share them with the internal team, they should be in a path similar to this: ...\S32DS.3.6.0\_S32 Design Studio for S32 Platform 3.6.0_installation\Logs Thanks in advance. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 And, yeah, an entire second computer just to run Ubuntu 20 or Windows isn't a great option. IT gets kind of finnicky about that sort of stuff. I'd also rather avoid downgrading my computer to Ubuntu 20. Having S32DS 3.6 locked to a four-year-old Ubuntu version is a bit of an unfortunate limitation. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Thanks for the tidbit about the GDB Python version, I didn't realize it was bundled. This is my first time using S32DS, it's a new addition for my entire team since we only recently started working with an NXP processor. Here's the info: dustin@dustin-Standard-PC-Q35-ICH9-2009:~$ ls /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py dustin@dustin-Standard-PC-Q35-ICH9-2009:~$ /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py --version Could not find platform independent libraries Could not find platform dependent libraries Consider setting $PYTHONHOME to [: ] Python path configuration: PYTHONHOME = (not set) PYTHONPATH = (not set) program name = '/usr/local/bin/python' isolated = 0 environment = 1 user site = 1 import site = 1 sys._base_executable = '/usr/local/bin/python' sys.base_prefix = '/usr/local' sys.base_exec_prefix = '/usr/local' sys.platlibdir = 'lib' sys.executable = '/usr/local/bin/python' sys.prefix = '/usr/local' sys.exec_prefix = '/usr/local' sys.path = [ '/usr/local/lib/python310.zip', '/usr/local/lib/python3.10', '/usr/local/lib/lib-dynload', ] Python Exception : No module named 'encodings' Python not initialized dustin@dustin-Standard-PC-Q35-ICH9-2009:~$ echo $PYTHONHOME dustin@dustin-Standard-PC-Q35-ICH9-2009:~$ echo $PYTHONPATH dustin@dustin-Standard-PC-Q35-ICH9-2009:~$  You are correct in assuming I'm not setting PYTHONHOME or PYTHONPATH. Thanks! Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Hello @dustinr, In the past I have had a lot of cases in which using virtual machines generates a number of unexpected problems particularly when debugging. My first recommendation would be to use a Ubuntu LTS 20.04 64-bit native machine (which is the supported version), it would be even better if you could get a Windows 10/11 native machine but I understand that it may not be possible. With that said, please share the following information so I may start narrowing down the problem: In the past have you being able to use older versions of S32 Design Studio successfully in your ubuntu machine? what is the result of executing the following two commands in an terminal: $ ls /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py $ /usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py --version Knowing that it is a fresh ubuntu installation, I assume that your are not defining either PYTHONHOME nor PYTHONPATH, in a system or user level. Please help me confirming it. About the ubuntu python version, it should not affect the GDB python, since it should be included in the same installation as the S32DS, therefore it does not use the python included in your system. thanks in advance for the information. Re: Unable to debug with S32 Debug Probe - S32DS 3.6 on Ubuntu 20.04 Attachment didn't seem to work, here's the strace log in case it's useful. execve("./arm-none-eabi-gdb-py", ["./arm-none-eabi-gdb-py", "--version"], 0x7ffe77c776a8 /* 47 vars */) = 0 brk(NULL) = 0x555be38ac000 arch_prctl(0x3001 /* ARCH_??? */, 0x7ffd41ec3570) = -1 EINVAL (Invalid argument) access("/etc/ld.so.preload", R_OK) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/etc/ld.so.cache", O_RDONLY|O_CLOEXEC) = 3 fstat(3, {st_mode=S_IFREG|0644, st_size=80035, ...}) = 0 mmap(NULL, 80035, PROT_READ, MAP_PRIVATE, 3, 0) = 0x7f1841676000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libncursesw.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\20\221\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=231504, ...}) = 0 mmap(NULL, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f1841674000 mmap(NULL, 233912, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f184163a000 mmap(0x7f1841642000, 159744, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x8000) = 0x7f1841642000 mmap(0x7f1841669000, 36864, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x2f000) = 0x7f1841669000 mmap(0x7f1841672000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x37000) = 0x7f1841672000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libtinfo.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0 \347\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=192032, ...}) = 0 mmap(NULL, 194944, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f184160a000 mmap(0x7f1841618000, 61440, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0xe000) = 0x7f1841618000 mmap(0x7f1841627000, 57344, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1d000) = 0x7f1841627000 mmap(0x7f1841635000, 20480, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x2a000) = 0x7f1841635000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libpthread.so.0", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\220q\0\0\0\0\0\0"..., 832) = 832 pread64(3, "\4\0\0\0\24\0\0\0\3\0\0\0GNU\0\232e\273F\236E\241\306\373\317\372\345\270*/\327"..., 68, 824) = 68 fstat(3, {st_mode=S_IFREG|0755, st_size=157224, ...}) = 0 pread64(3, "\4\0\0\0\24\0\0\0\3\0\0\0GNU\0\232e\273F\236E\241\306\373\317\372\345\270*/\327"..., 68, 824) = 68 mmap(NULL, 140408, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f18415e7000 mmap(0x7f18415ed000, 69632, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x6000) = 0x7f18415ed000 mmap(0x7f18415fe000, 24576, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x17000) = 0x7f18415fe000 mmap(0x7f1841604000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1c000) = 0x7f1841604000 mmap(0x7f1841606000, 13432, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0x7f1841606000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libdl.so.2", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0 \22\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=18848, ...}) = 0 mmap(NULL, 20752, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f18415e1000 mmap(0x7f18415e2000, 8192, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1000) = 0x7f18415e2000 mmap(0x7f18415e4000, 4096, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x3000) = 0x7f18415e4000 mmap(0x7f18415e5000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x3000) = 0x7f18415e5000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libutil.so.1", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\340\23\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=14880, ...}) = 0 mmap(NULL, 16656, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f18415dc000 mmap(0x7f18415dd000, 4096, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1000) = 0x7f18415dd000 mmap(0x7f18415de000, 4096, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x2000) = 0x7f18415de000 mmap(0x7f18415df000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x2000) = 0x7f18415df000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libstdc++.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\3\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0 \341\t\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=1956992, ...}) = 0 mmap(NULL, 1972224, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f18413fa000 mprotect(0x7f1841490000, 1290240, PROT_NONE) = 0 mmap(0x7f1841490000, 987136, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x96000) = 0x7f1841490000 mmap(0x7f1841581000, 299008, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x187000) = 0x7f1841581000 mmap(0x7f18415cb000, 57344, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1d0000) = 0x7f18415cb000 mmap(0x7f18415d9000, 10240, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0x7f18415d9000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libm.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\3\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\300\323\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=1369384, ...}) = 0 mmap(NULL, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f18413f8000 mmap(NULL, 1368336, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f18412a9000 mmap(0x7f18412b6000, 684032, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0xd000) = 0x7f18412b6000 mmap(0x7f184135d000, 626688, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0xb4000) = 0x7f184135d000 mmap(0x7f18413f6000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x14c000) = 0x7f18413f6000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libgcc_s.so.1", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\0\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\3405\0\0\0\0\0\0"..., 832) = 832 fstat(3, {st_mode=S_IFREG|0644, st_size=104984, ...}) = 0 mmap(NULL, 107592, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f184128e000 mmap(0x7f1841291000, 73728, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x3000) = 0x7f1841291000 mmap(0x7f18412a3000, 16384, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x15000) = 0x7f18412a3000 mmap(0x7f18412a7000, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x18000) = 0x7f18412a7000 close(3) = 0 openat(AT_FDCWD, "/lib/x86_64-linux-gnu/libc.so.6", O_RDONLY|O_CLOEXEC) = 3 read(3, "\177ELF\2\1\1\3\0\0\0\0\0\0\0\0\3\0>\0\1\0\0\0\300A\2\0\0\0\0\0"..., 832) = 832 pread64(3, "\6\0\0\0\4\0\0\0@\0\0\0\0\0\0\0@\0\0\0\0\0\0\0@\0\0\0\0\0\0\0"..., 784, 64) = 784 pread64(3, "\4\0\0\0\20\0\0\0\5\0\0\0GNU\0\2\0\0\300\4\0\0\0\3\0\0\0\0\0\0\0", 32, 848) = 32 pread64(3, "\4\0\0\0\24\0\0\0\3\0\0\0GNU\0\7\2C\n\357_\243\335\2449\206V>\237\374\304"..., 68, 880) = 68 fstat(3, {st_mode=S_IFREG|0755, st_size=2029592, ...}) = 0 pread64(3, "\6\0\0\0\4\0\0\0@\0\0\0\0\0\0\0@\0\0\0\0\0\0\0@\0\0\0\0\0\0\0"..., 784, 64) = 784 pread64(3, "\4\0\0\0\20\0\0\0\5\0\0\0GNU\0\2\0\0\300\4\0\0\0\3\0\0\0\0\0\0\0", 32, 848) = 32 pread64(3, "\4\0\0\0\24\0\0\0\3\0\0\0GNU\0\7\2C\n\357_\243\335\2449\206V>\237\374\304"..., 68, 880) = 68 mmap(NULL, 2037344, PROT_READ, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0x7f184109c000 mmap(0x7f18410be000, 1540096, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x22000) = 0x7f18410be000 mmap(0x7f1841236000, 319488, PROT_READ, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x19a000) = 0x7f1841236000 mmap(0x7f1841284000, 24576, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1e7000) = 0x7f1841284000 mmap(0x7f184128a000, 13920, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0x7f184128a000 close(3) = 0 mmap(NULL, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f184109a000 mmap(NULL, 12288, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f1841097000 arch_prctl(ARCH_SET_FS, 0x7f1841097e80) = 0 mprotect(0x7f1841284000, 16384, PROT_READ) = 0 mprotect(0x7f18412a7000, 4096, PROT_READ) = 0 mprotect(0x7f18413f6000, 4096, PROT_READ) = 0 mmap(NULL, 8192, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f1841095000 mprotect(0x7f18415cb000, 45056, PROT_READ) = 0 mprotect(0x7f18415df000, 4096, PROT_READ) = 0 mprotect(0x7f18415e5000, 4096, PROT_READ) = 0 mprotect(0x7f1841604000, 4096, PROT_READ) = 0 mprotect(0x7f1841635000, 16384, PROT_READ) = 0 mprotect(0x7f1841672000, 4096, PROT_READ) = 0 mprotect(0x555bdb281000, 339968, PROT_READ) = 0 mprotect(0x7f18416b7000, 4096, PROT_READ) = 0 munmap(0x7f1841676000, 80035) = 0 set_tid_address(0x7f1841098150) = 99521 set_robust_list(0x7f1841098160, 24) = 0 rt_sigaction(SIGRTMIN, {sa_handler=0x7f18415edbf0, sa_mask=[], sa_flags=SA_RESTORER|SA_SIGINFO, sa_restorer=0x7f18415fb420}, NULL, 😎 = 0 rt_sigaction(SIGRT_1, {sa_handler=0x7f18415edc90, sa_mask=[], sa_flags=SA_RESTORER|SA_RESTART|SA_SIGINFO, sa_restorer=0x7f18415fb420}, NULL, 😎 = 0 rt_sigprocmask(SIG_UNBLOCK, [RTMIN RT_1], NULL, 😎 = 0 prlimit64(0, RLIMIT_STACK, NULL, {rlim_cur=8192*1024, rlim_max=RLIM64_INFINITY}) = 0 brk(NULL) = 0x555be38ac000 brk(0x555be38cd000) = 0x555be38cd000 getrusage(RUSAGE_SELF, {ru_utime={tv_sec=0, tv_usec=3471}, ru_stime={tv_sec=0, tv_usec=0}, ...}) = 0 openat(AT_FDCWD, "/usr/lib/locale/locale-archive", O_RDONLY|O_CLOEXEC) = 3 fstat(3, {st_mode=S_IFREG|0644, st_size=5699248, ...}) = 0 mmap(NULL, 5699248, PROT_READ, MAP_PRIVATE, 3, 0) = 0x7f1840b25000 close(3) = 0 openat(AT_FDCWD, "/proc/self/fd", O_RDONLY|O_NONBLOCK|O_CLOEXEC|O_DIRECTORY) = 3 fstat(3, {st_mode=S_IFDIR|0500, st_size=0, ...}) = 0 getdents64(3, /* 6 entries */, 32768) = 144 getdents64(3, /* 0 entries */, 32768) = 0 close(3) = 0 ioctl(0, TCGETS, {B38400 opost isig icanon echo ...}) = 0 getcwd("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", 4096) = 62 getcwd("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", 4096) = 62 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py", {st_mode=S_IFREG|0775, st_size=15366192, ...}) = 0 stat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/../arm-none-eabi", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local/NXP", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0", {st_mode=S_IFDIR|0777, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/arm-none-eabi", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 getcwd("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", 4096) = 62 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py", {st_mode=S_IFREG|0775, st_size=15366192, ...}) = 0 stat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/../lib/debug", 0x7ffd41ec3170) = -1 ENOENT (No such file or directory) lstat("/opt", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/opt/nxp", 0x7ffd41ec2070) = -1 ENOENT (No such file or directory) getcwd("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", 4096) = 62 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py", {st_mode=S_IFREG|0775, st_size=15366192, ...}) = 0 stat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/../share/gdb", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local/NXP", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0", {st_mode=S_IFDIR|0777, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/share", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/share/gdb", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 stat("/usr/local/lib", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local/lib", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 rt_sigprocmask(SIG_BLOCK, NULL, [], 😎 = 0 rt_sigaction(SIGHUP, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGINT, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGQUIT, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGILL, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTRAP, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGABRT, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGBUS, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGFPE, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGKILL, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGUSR1, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGSEGV, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGUSR2, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGPIPE, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGALRM, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTERM, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGSTKFLT, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGCHLD, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGCONT, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGSTOP, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTSTP, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTTIN, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTTOU, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGURG, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGXCPU, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGXFSZ, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGVTALRM, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGPROF, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGWINCH, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGIO, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGPWR, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGSYS, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_2, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_3, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_4, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_5, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_6, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_7, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_8, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_9, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_10, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_11, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_12, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_13, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_14, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_15, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_16, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_17, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_18, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_19, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_20, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_21, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_22, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_23, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_24, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_25, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_26, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_27, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_28, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_29, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_30, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_31, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGRT_32, NULL, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 sigaltstack({ss_sp=0x555be38c5140, ss_flags=0, ss_size=8192}, {ss_sp=NULL, ss_flags=SS_DISABLE, ss_size=0}) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 getuid() = 1000 geteuid() = 1000 getgid() = 1000 getegid() = 1000 getuid() = 1000 geteuid() = 1000 getgid() = 1000 getegid() = 1000 stat("/home/dustin/.terminfo", 0x555be38c8ab0) = -1 ENOENT (No such file or directory) stat("/etc/terminfo", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 stat("/lib/terminfo", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 stat("/usr/share/terminfo", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 access("/etc/terminfo/x/xterm-256color", R_OK) = -1 ENOENT (No such file or directory) access("/lib/terminfo/x/xterm-256color", R_OK) = 0 openat(AT_FDCWD, "/lib/terminfo/x/xterm-256color", O_RDONLY) = 3 fstat(3, {st_mode=S_IFREG|0644, st_size=3503, ...}) = 0 read(3, "\36\2%\0&\0\17\0\235\1\356\5xterm-256color|xterm"..., 32768) = 3503 read(3, "", 28672) = 0 close(3) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 ioctl(1, TIOCGWINSZ, {ws_row=24, ws_col=194, ws_xpixel=0, ws_ypixel=0}) = 0 brk(0x555be38ef000) = 0x555be38ef000 ioctl(0, TIOCGWINSZ, {ws_row=24, ws_col=194, ws_xpixel=0, ws_ypixel=0}) = 0 ioctl(1, TCGETS, {B38400 opost isig icanon echo ...}) = 0 brk(0x555be3910000) = 0x555be3910000 lstat("/opt", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/opt/nxp", 0x7ffd41ec29a0) = -1 ENOENT (No such file or directory) lstat("/usr", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/usr/local/NXP", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0", {st_mode=S_IFDIR|0777, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/share", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/share/gdb", {st_mode=S_IFDIR|0775, st_size=4096, ...}) = 0 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/share/gdb/auto-load", 0x7ffd41ec29a0) = -1 ENOENT (No such file or directory) pipe([3, 4]) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 prlimit64(0, RLIMIT_NOFILE, NULL, {rlim_cur=1024, rlim_max=1024*1024}) = 0 mmap(NULL, 36864, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f1841681000 rt_sigprocmask(SIG_BLOCK, ~[], [], 😎 = 0 clone(child_stack=0x7f1841689ff0, flags=CLONE_VM|CLONE_VFORK|SIGCHLD) = 99522 munmap(0x7f1841681000, 36864) = 0 rt_sigprocmask(SIG_SETMASK, [], NULL, 😎 = 0 close(4) = 0 fcntl(3, F_GETFL) = 0 (flags O_RDONLY) fstat(3, {st_mode=S_IFIFO|0600, st_size=0, ...}) = 0 read(3, "437//\n500//\n500V1//\n850//\n851//\n"..., 4096) = 4096 --- SIGCHLD {si_signo=SIGCHLD, si_code=CLD_EXITED, si_pid=99522, si_uid=1000, si_status=0, si_utime=0, si_stime=0} --- read(3, "DANISH//\nCSISO2022CN//\nCSISO2022"..., 4096) = 4096 read(3, "ISO-2022-CN//\nISO-2022-JP-2//\nIS"..., 4096) = 4096 read(3, "F10010001//\nOSF10010004//\nOSF100"..., 4096) = 1298 read(3, "", 4096) = 0 wait4(99522, [{WIFEXITED(s) && WEXITSTATUS(s) == 0}], 0, NULL) = 99522 close(3) = 0 prlimit64(0, RLIMIT_CORE, NULL, {rlim_cur=0, rlim_max=RLIM64_INFINITY}) = 0 brk(0x555be3931000) = 0x555be3931000 getcwd("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin", 4096) = 62 lstat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/arm-none-eabi-gdb-py", {st_mode=S_IFREG|0775, st_size=15366192, ...}) = 0 stat("/usr/local/NXP/S32DS.3.6.0/S32DS/tools/gdb-arm/arm32-eabi/bin/../lib/gdb", 0x7ffd41ec2a80) = -1 ENOENT (No such file or directory) lstat("/opt", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 lstat("/opt/nxp", 0x7ffd41ec1980) = -1 ENOENT (No such file or directory) brk(0x555be3952000) = 0x555be3952000 brk(0x555be3973000) = 0x555be3973000 pipe2([3, 4], O_CLOEXEC) = 0 fcntl(3, F_GETFD) = 0x1 (flags FD_CLOEXEC) fcntl(3, F_SETFD, FD_CLOEXEC) = 0 fcntl(3, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 fcntl(4, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 poll([{fd=3, events=POLLIN}], 1, 0) = 0 (Timeout) brk(0x555be3994000) = 0x555be3994000 brk(0x555be39b5000) = 0x555be39b5000 ioctl(0, TCGETS, {B38400 opost isig icanon echo ...}) = 0 fcntl(0, F_GETFL) = 0x2 (flags O_RDWR) ioctl(0, TIOCGPGRP, [99518]) = 0 pipe2([5, 6], O_CLOEXEC) = 0 fcntl(5, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 fcntl(6, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 poll([{fd=5, events=POLLIN}], 1, 0) = 0 (Timeout) pipe2([7, 8], O_CLOEXEC) = 0 fcntl(7, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 fcntl(8, F_SETFL, O_RDONLY|O_NONBLOCK) = 0 rt_sigaction(SIGINT, {sa_handler=0x555bda9b6dd0, sa_mask=[INT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGTERM, {sa_handler=0x555bda8bd8a0, sa_mask=[TERM], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGQUIT, {sa_handler=0x555bda8bd780, sa_mask=[QUIT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGHUP, {sa_handler=0x555bda8bd750, sa_mask=[HUP], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGFPE, {sa_handler=0x555bda8bd9d0, sa_mask=[FPE], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGBUS, {sa_handler=0x555bda8bd9d0, sa_mask=[BUS], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGABRT, {sa_handler=0x555bda8bd9d0, sa_mask=[ABRT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[], sa_flags=0}, 😎 = 0 rt_sigaction(SIGSEGV, {sa_handler=0x555bda8bdac0, sa_mask=[], sa_flags=SA_RESTORER|SA_ONSTACK, sa_restorer=0x7f18415fb420}, NULL, 😎 = 0 stat("/home/dustin/.config/gdb/gdbearlyinit", 0x7ffd41ec30a0) = -1 ENOENT (No such file or directory) stat("/home/dustin/.gdbearlyinit", 0x7ffd41ec30a0) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/sys/devices/system/cpu/online", O_RDONLY|O_CLOEXEC) = 9 read(9, "0-7\n", 8192) = 4 close(9) = 0 rt_sigprocmask(SIG_BLOCK, [INT ALRM TERM CHLD WINCH], [], 😎 = 0 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f1840324000 mprotect(0x7f1840325000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f1840b23870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99523], tls=0x7f1840b24700, child_tidptr=0x7f1840b249d0) = 99523 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183fb23000 mprotect(0x7f183fb24000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f1840322870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99524], tls=0x7f1840323700, child_tidptr=0x7f18403239d0) = 99524 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183f322000 mprotect(0x7f183f323000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183fb21870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99525], tls=0x7f183fb22700, child_tidptr=0x7f183fb229d0) = 99525 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183eb21000 mprotect(0x7f183eb22000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183f320870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99526], tls=0x7f183f321700, child_tidptr=0x7f183f3219d0) = 99526 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183e320000 mprotect(0x7f183e321000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183eb1f870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99527], tls=0x7f183eb20700, child_tidptr=0x7f183eb209d0) = 99527 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183db1f000 mprotect(0x7f183db20000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183e31e870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99528], tls=0x7f183e31f700, child_tidptr=0x7f183e31f9d0) = 99528 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183d31e000 mprotect(0x7f183d31f000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183db1d870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99529], tls=0x7f183db1e700, child_tidptr=0x7f183db1e9d0) = 99529 mmap(NULL, 8392704, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_STACK, -1, 0) = 0x7f183cb1d000 mprotect(0x7f183cb1e000, 8388608, PROT_READ|PROT_WRITE) = 0 clone(child_stack=0x7f183d31c870, flags=CLONE_VM|CLONE_FS|CLONE_FILES|CLONE_SIGHAND|CLONE_THREAD|CLONE_SYSVSEM|CLONE_SETTLS|CLONE_PARENT_SETTID|CLONE_CHILD_CLEARTID, parent_tid=[99530], tls=0x7f183d31d700, child_tidptr=0x7f183d31d9d0) = 99530 rt_sigprocmask(SIG_SETMASK, [], NULL, 😎 = 0 futex(0x555be38c34b8, FUTEX_WAKE_PRIVATE, 1) = 1 rt_sigaction(SIGINT, {sa_handler=SIG_DFL, sa_mask=[INT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=0x555bda9b6dd0, sa_mask=[INT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, 😎 = 0 openat(AT_FDCWD, "/usr/lib/x86_64-linux-gnu/gconv/gconv-modules.cache", O_RDONLY) = 9 fstat(9, {st_mode=S_IFREG|0644, st_size=27002, ...}) = 0 mmap(NULL, 27002, PROT_READ, MAP_SHARED, 9, 0) = 0x7f1841683000 close(9) = 0 futex(0x7f1841289954, FUTEX_WAKE_PRIVATE, 2147483647) = 0 readlink("/usr/local/bin/python", 0x7ffd41ebda70, 4096) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/local/bin/pyvenv.cfg", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/local/pyvenv.cfg", O_RDONLY) = -1 ENOENT (No such file or directory) stat("/usr/local/bin/Modules/Setup.local", 0x7ffd41ebea10) = -1 ENOENT (No such file or directory) stat("/usr/local/bin/lib/python3.10/os.py", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/local/bin/lib/python3.10/os.pyc", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/os.py", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/os.pyc", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/lib/python3.10/os.py", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/lib/python3.10/os.pyc", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/os.py", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/os.pyc", 0x7ffd41ebe900) = -1 ENOENT (No such file or directory) write(2, "Could not find platform independ"..., 55Could not find platform independent libraries ) = 55 openat(AT_FDCWD, "/usr/local/bin/pybuilddir.txt", O_RDONLY) = -1 ENOENT (No such file or directory) stat("/usr/local/bin/lib/python3.10/lib-dynload", 0x7ffd41ebda00) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/lib-dynload", 0x7ffd41ebda00) = -1 ENOENT (No such file or directory) stat("/usr/lib/python3.10/lib-dynload", 0x7ffd41ebda00) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10/lib-dynload", 0x7ffd41ebda00) = -1 ENOENT (No such file or directory) write(2, "Could not find platform dependen"..., 58Could not find platform dependent libraries ) = 58 write(2, "Consider setting $PYTHONHOME to "..., 57Consider setting $PYTHONHOME to [: ] ) = 57 getrandom("\x04\xf0\xa2\x12\x5c\x58\x69\xf9\xe7\x92\x2a\xc4\x9b\x55\x5c\xfc\x1f\x56\x13\xd5\x39\xe0\xe5\x4e", 24, GRND_NONBLOCK) = 24 brk(0x555be39eb000) = 0x555be39eb000 mmap(NULL, 1048576, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f183ca1d000 brk(0x555be3a13000) = 0x555be3a13000 mmap(NULL, 1048576, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0x7f183c91d000 sysinfo({uptime=4102, loads=[17216, 11392, 7168], totalram=4100464640, freeram=251756544, sharedram=39157760, bufferram=148140032, totalswap=1713590272, freeswap=1447161856, procs=577, totalhigh=0, freehigh=0, mem_unit=1}) = 0 openat(AT_FDCWD, "/etc/localtime", O_RDONLY|O_CLOEXEC) = 9 fstat(9, {st_mode=S_IFREG|0644, st_size=3592, ...}) = 0 fstat(9, {st_mode=S_IFREG|0644, st_size=3592, ...}) = 0 read(9, "TZif2\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\10\0\0\0\10\0\0\0\0"..., 4096) = 3592 lseek(9, -2280, SEEK_CUR) = 1312 read(9, "TZif2\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\10\0\0\0\10\0\0\0\0"..., 4096) = 2280 brk(0x555be3a34000) = 0x555be3a34000 close(9) = 0 stat("/usr/local/lib/python310.zip", 0x7ffd41ec1290) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/locale.alias", O_RDONLY|O_CLOEXEC) = 9 fstat(9, {st_mode=S_IFREG|0644, st_size=2996, ...}) = 0 read(9, "# Locale name alias data base.\n#"..., 4096) = 2996 read(9, "", 4096) = 0 close(9) = 0 openat(AT_FDCWD, "/usr/share/locale/en_US.UTF-8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/en_US.utf8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/en_US/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/en.UTF-8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/en.utf8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale/en/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en_US.UTF-8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en_US.utf8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en_US/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en.UTF-8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en.utf8/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) openat(AT_FDCWD, "/usr/share/locale-langpack/en/LC_MESSAGES/libc.mo", O_RDONLY) = -1 ENOENT (No such file or directory) stat("/usr/local/lib", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 stat("/usr/local/lib/python310.zip", 0x7ffd41ec1070) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/python3.10", 0x7ffd41ec1290) = -1 ENOENT (No such file or directory) stat("/usr/local/lib", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 stat("/usr/local/lib/python3.10", 0x7ffd41ec1070) = -1 ENOENT (No such file or directory) stat("/usr/local/lib/lib-dynload", 0x7ffd41ec1290) = -1 ENOENT (No such file or directory) stat("/usr/local/lib", {st_mode=S_IFDIR|0755, st_size=4096, ...}) = 0 stat("/usr/local/lib/lib-dynload", 0x7ffd41ec1070) = -1 ENOENT (No such file or directory) write(2, "Python path configuration:\n", 27Python path configuration: ) = 27 write(2, " PYTHONHOME = ", 15 PYTHONHOME = ) = 15 write(2, "(not set)", 9(not set)) = 9 write(2, "\n", 1 ) = 1 write(2, " PYTHONPATH = ", 15 PYTHONPATH = ) = 15 write(2, "(not set)", 9(not set)) = 9 write(2, "\n", 1 ) = 1 write(2, " program name = ", 17 program name = ) = 17 write(2, "'", 1') = 1 write(2, "/", 1/) = 1 write(2, "u", 1u) = 1 write(2, "s", 1s) = 1 write(2, "r", 1r) = 1 write(2, "/", 1/) = 1 write(2, "l", 1l) = 1 write(2, "o", 1o) = 1 write(2, "c", 1c) = 1 write(2, "a", 1a) = 1 write(2, "l", 1l) = 1 write(2, "/", 1/) = 1 write(2, "b", 1b) = 1 write(2, "i", 1i) = 1 write(2, "n", 1n) = 1 write(2, "/", 1/) = 1 write(2, "p", 1p) = 1 write(2, "y", 1y) = 1 write(2, "t", 1t) = 1 write(2, "h", 1h) = 1 write(2, "o", 1o) = 1 write(2, "n", 1n) = 1 write(2, "'", 1') = 1 write(2, "\n", 1 ) = 1 write(2, " isolated = 0\n", 15 isolated = 0 ) = 15 write(2, " environment = 1\n", 18 environment = 1 ) = 18 write(2, " user site = 1\n", 16 user site = 1 ) = 16 write(2, " import site = 1\n", 18 import site = 1 ) = 18 write(2, " sys._base_executable = ", 25 sys._base_executable = ) = 25 write(2, "'/usr/local/bin/python'", 23'/usr/local/bin/python') = 23 write(2, "\n", 1 ) = 1 write(2, " sys.base_prefix = ", 20 sys.base_prefix = ) = 20 write(2, "'/usr/local'", 12'/usr/local') = 12 write(2, "\n", 1 ) = 1 write(2, " sys.base_exec_prefix = ", 25 sys.base_exec_prefix = ) = 25 write(2, "'/usr/local'", 12'/usr/local') = 12 write(2, "\n", 1 ) = 1 write(2, " sys.platlibdir = ", 19 sys.platlibdir = ) = 19 write(2, "'lib'", 5'lib') = 5 write(2, "\n", 1 ) = 1 write(2, " sys.executable = ", 19 sys.executable = ) = 19 write(2, "'/usr/local/bin/python'", 23'/usr/local/bin/python') = 23 write(2, "\n", 1 ) = 1 write(2, " sys.prefix = ", 15 sys.prefix = ) = 15 write(2, "'/usr/local'", 12'/usr/local') = 12 write(2, "\n", 1 ) = 1 write(2, " sys.exec_prefix = ", 20 sys.exec_prefix = ) = 20 write(2, "'/usr/local'", 12'/usr/local') = 12 write(2, "\n", 1 ) = 1 write(2, " sys.path = [\n", 15 sys.path = [ ) = 15 write(2, " '/usr/local/lib/python310.zi"..., 36 '/usr/local/lib/python310.zip', ) = 36 write(2, " '/usr/local/lib/python3.10',"..., 33 '/usr/local/lib/python3.10', ) = 33 write(2, " '/usr/local/lib/lib-dynload'"..., 34 '/usr/local/lib/lib-dynload', ) = 34 write(2, " ]\n", 4 ] ) = 4 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) write(2, "Python Exception ", 17Python Exception ) = 17 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) write(2, " ", 29 ) = 29 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) write(2, ": ", 2: ) = 2 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) write(2, "No module named 'encodings'", 27No module named 'encodings') = 27 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) write(2, "\n", 1 ) = 1 ioctl(2, TCGETS, 0x7ffd41ec2a60) = -1 ENOTTY (Inappropriate ioctl for device) futex(0x7f18412a81e0, FUTEX_WAKE_PRIVATE, 2147483647) = 0 rt_sigaction(SIGINT, {sa_handler=0x555bda9b6dd0, sa_mask=[INT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, {sa_handler=SIG_DFL, sa_mask=[INT], sa_flags=SA_RESTORER|SA_RESTART, sa_restorer=0x7f18410df090}, 😎 = 0 sigaltstack({ss_sp=NULL, ss_flags=SS_DISABLE, ss_size=0}, NULL) = 0 rt_sigprocmask(SIG_BLOCK, [TTOU], [], 😎 = 0 ioctl(1, TCSBRK, 1) = 0 rt_sigprocmask(SIG_UNBLOCK, [TTOU], NULL, 😎 = 0 write(2, "Python not initialized", 22Python not initialized) = 22 ioctl(2, TCGETS, 0x7ffd41ec3040) = -1 ENOTTY (Inappropriate ioctl for device) write(2, "\n", 1 ) = 1 ioctl(2, TCGETS, 0x7ffd41ec3040) = -1 ENOTTY (Inappropriate ioctl for device) exit_group(1) = ? +++ exited with 1 +++
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S32 K118 Internal clock Lin I use S32k118, there is no external crystal oscillator, so i use internal clock.  The problem is that the system is works fine in debug mode.  And If power off, then power on, it can't run normally. Attached is the clock config. Is there anything special when use internal clock? Could you give me some supports? Thanks very much! Re: S32 K118 Internal clock Lin Solved, Thank you very much! Re: S32 K118 Internal clock Lin Hi Jianfeng2, If you are using S32K1 SDK, please check if "START_FROM_FLASH" Symbols are missing? refer to the discussion:   S32K188 runs with debugger, but not witout If you suspect the clock is inaccurate, please observe the frequency of internal clock through the CLKOUT pin. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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MPC5777C - Performance Monitor for SRAM accesses Hello! I need to count the number of read and write accesses to the internal SRAM of the MPC5777C. I raised some options to do so, but I would like to know which one of them is correct and more accurate and if there is any other way to do so in a better way. Consider that in my software architecture the only used XBAR masters are the e200z7 cores, the flash memory stores the instructions and constants, the SRAM stores data variables. My theories: SRAM read accesses = Com:87 (BIU data-side requests performance monitor) or  SRAM read accesses = Com:57 (DCache linefills performance monitor) SRAM write accesses = Com:88 (BIU data-side copyback requests performance monitor) [cons: does not count write-through requests] Best regards, Matheus Re: MPC5777C - Performance Monitor for SRAM accesses Com:86 (BIU instruction-side cycles) - how many clock cycles takes instruction fetch Com:89 (BIU data-side cycles) - how many clock cycles takes data access Com:90 (BIU single-beat write cycles) - how many cycles are single beat transfers, i.e. aligned 8/16/32/64 bit writes (not misaligned or bursts) How performance monitors are used depends on the optimization needs for a particular application. I am attaching screenshots from presentation I have already mentioned in another your thread. Re: MPC5777C - Performance Monitor for SRAM accesses Thanks for the explanation, David! A few more questions: I did not understand what does the following performance monitors measure: Com:86 (BIU instruction-side cycles), Com:89 (BIU data-side cycles) and Com:90 (BIU single-beat write cycles). Do they count the number of cycles taken to finish each transaction? Is the purpose of this data to extract the variability (i.e., standard deviation) of the cycles taken to attend each transaction? Do they count the total number of cycles taken to issue all transactions performed until the moment of reading the performance monitor? Can you give me a practical example of usage of these performance monitors, please? Best regards, Matheus Re: MPC5777C - Performance Monitor for SRAM accesses 1) It is needed to realize that performance monitor is tool of the core itself. BIU event are all related to accesses external to the core. 2) 1 access. Also you have event 89 for counting of cycles. 3) Event 88 count copybacks. write-through is normal transaction and will be included in 87/89 Re: MPC5777C - Performance Monitor for SRAM accesses 1-Does the Com:87 (BIU data-side requests performance monitor) counts only data read operations to the sram or it also counts read operations of constants in the flash? 2-Com:87 count a 4 beat read burst to the SRAM as 1 access or 4 accesses? 3-Does the MPC5777C have any performance monitor that counts all types of writes to the SRAM (copy-back and write through)? Best regards, Matheus Re: MPC5777C - Performance Monitor for SRAM accesses BIU data-side requests would count both accesses, cached and cache inhibited. Second tho events only cache related. I cannot tell it what is "accurate" it depends what you wanted to count avtually.
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TLS Offloading in Yocto BSP 40.0 Hi Community, (Yocto BSP 40.0, NXP s32g399ardb3) S32G3  I am currently working on TLS offloading i.e instead of TLS I want to use HSE Keys in my applications. Is there any way to offload TLS and use HSE algorithms?? GoldVIP Re: TLS Offloading in Yocto BSP 40.0 Hello, We have generated AES and ECC keys using the Hardware Security Engine (HSE) and have stored them in the RAM slots of the HSE. We are now looking to access these keys stored in the RAM slots and integrate them into our TLS application, which is developed in Python. Could you kindly provide the steps or share any relevant documentation on how to accomplish this? Thank you in advance for your asssitance. Re: TLS Offloading in Yocto BSP 40.0 Hello @pramod22b, We do offer support to run SSL/TSL operation in the HSE, please check section 10.3.2 Building OpenSSL 3.0.5 for aarch64 of the BSP40 user manual [page 79, Linux BSP 40.0 User Manual for S32G3 platforms] which is under setion  10 HSE Security Support:     if possible, please review section 10 completely, as it explains all the necessary prerequisites to use the HSE API in Linux.   Let me know if this information solved your question.
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LPC5504 Smaller FLASH usable memory size Hi there, I'm using an LPC5504. According to its own configuration and data from API functions the size is 128KB. While trying to store some data at the end of the memory map it turns out that I cannot write successfully in the last 2KB (in the range 1F800-1FFFF). Well, I can write on the memory without error but when I restart  the board the data are just not there. Is there a reason for this? Is it because of the space needed for spare memory in case some pages are not working anymore? LPC55xx Re: LPC5504 Smaller FLASH usable memory size Hi Alice, I've found where the problem was, thanks to the example you mentioned. Just so that you know in the debug build I had a different linker script which reserved the section from 0x1F800 (sigh..). So, as you see it was all my mistake. Thank you again and best regards Re: LPC5504 Smaller FLASH usable memory size Hello @pejo  Please create a simple flash project by referring to the SDK demo "flashiap" for the LPC55S06. Then, check whether it can work with the address range from 0x1F800 to 0x1FFFF. BR Alice Re: LPC5504 Smaller FLASH usable memory size Hi Alice, unfortunately I can't share the whole code without taking the time to remove proprietary code but I can share the procedure that you can use for test it: General initialization: Disable All Interrupts Init Boot clocks Init timers Flash initialization LPC55S0XFLASH_Init VERSION1_FLASH_API_TREE->flash_init Check values on one page (512 (0x200) Bytes) at address 0x1F800 LPC55S0XFLASH_Read Flash fixed char (0x1A) on one page (512 (0x200) Bytes) at address 0x1F800 LPC55S0XFLASH_Erase LPC55S0XFLASH_Program LPC55S0XFLASH_VerifyProgram Check values on one page (512 (0x200) Bytes) at address 0x1F800 contain 0x1A: LPC55S0XFLASH_Read Restart and check values --> Those values are not there anymore (it is a mix of zeros and 0xFF) If I do the same at address 0x1F600 it works properly Re: LPC5504 Smaller FLASH usable memory size Hello @pejo  Could you please show your project code, as well as your testing steps and results? I will help you check. Thank you. BR Alice
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Online Activation Failed I tried install S23DS v3.4 with the license but it always failed like bottom picture. In my opinion its reason why is Reinstallation I have downloaded version 3.6 and activated it before. Re: Online Activation Failed Hi 1. The activation codes for S32DS v3.4 and v3.6 are different, please do not mix them. 2. You should find the activation code for S32 Design Studio version v.3.4 in the License List. The activation code for S32 Design Studio for S32 Platform v.3.4 with support for S32K3 devices cannot be used to install S32DS v3.4. Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. ------------------------------------------------------------------------------- Re: Online Activation Failed This is the license which is related with my problem. I capture this picture in my license list.
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How to know whether any data is written or not to the specific eFuse address in S32G Hi. I have been implementing to write any data to the specific eFuse address in S32G. /* Write Shadow OCOTP_GP6_127_96 */ 1 . Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_127_96_SHADOW_REGISTER, DATA_TEST_0); 2. result = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_127_96, DATA_TEST_0, false, true); after 2. step, How to know whether any data is written or not to the specific eFuse address if  the value is RP (ReadProtect)+WP (WriteProtect)+OP (OverRideProtect)in S32G? Re: How to know whether any data is written or not to the specific eFuse address in S32G Hi. This issue is resolved. Thank you for your support. BRs. Re: How to know whether any data is written or not to the specific eFuse address in S32G Hi I write 20 to it when the data of specific fuse address is empty. The value is 20 when  read the data of specific fuse address. I write 21 to the same fuse address. The value is not 21 when read data for the same fuse address. So it seems that crc error happens. Do you think what is problem? What does mean that Each eFuse bit cannot be cleared if set to 1? Re: How to know whether any data is written or not to the specific eFuse address in S32G hi,EddiePark Thank you for your reply. Will the problem still occur if you only write DATA_TEST_0 or DATA_TEST_1. What is the value that you set DATA_TEST_1. Each eFuse bit cannot be cleared if set to 1. BR Joey Re: How to know whether any data is written or not to the specific eFuse address in S32G Hi. Thank you for your response. In current, I have one issue for eFuse. The below code works normally in case any data is written the specific eFuse address which is empty,  But crc error happens in case the data of specific eFuse address is updated and I cannot read the data of specific address,   LockBit is 0x00(Neither Fuse or Shadow are locked for Read, Write and Override) please let me know what is problem. Ocotp_Ip_ReadEFuse(instance_Cfg0, OCOTP_LOCK_CUSTOMER_LOCK_BITS, &u32Data);   /* Write Shadow OCOTP_GP6_127_96 */ Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_127_96_SHADOW_REGISTER, DATA_TEST_0); /* Write Shadow OCOTP_GP6_159_128 */ Ocotp_Ip_WriteShadowRegister(instance_Cfg0, OCOTP_GP6_159_128_SHADOW_REGISTER, DATA_TEST_1);   ocotpStatus = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_127_96, DATA_TEST_0, false, true); if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){ gCDDExecuted = CDD_INIT_OCOTP_FAILURE; }   ocotpStatus = Ocotp_Ip_WriteEFuse(instance_Cfg0, OCOTP_GP6_159_128, DATA_TEST_1, false, true); if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){ gCDDExecuted = CDD_INIT_OCOTP_FAILURE; } ocotpStatus = Ocotp_Ip_CalculateAndWriteCrcValue(instance_Cfg0, CRC0_EFUSE_ADD, u32DataIsTestedCRC, (uint32)2U); if(STATUS_OCOTP_IP_SUCCESS != ocotpStatus){ gCDDExecuted = CDD_INIT_OCOTP_FAILURE; }   /*Update value CRC0 eFuse to CRC0 Shadow register. If MCU reset, you dont need this step*/ Ocotp_Ip_ReadEFuse(instance_Cfg0, CRC0_EFUSE_ADD, &u32Data); Ocotp_Ip_WriteShadowRegister(instance_Cfg0, CRC0_SHADOW_REGISTER, u32Data);   /* Test CRC */ ocotpStatus = Ocotp_Ip_CrcTest(instance_Cfg0, CRC0_EFUSE_ADD, OCOTP_GP6_127_96, OCOTP_GP6_159_128); Re: How to know whether any data is written or not to the specific eFuse address in S32G hi,EddiePark Thank you for contacting us. According to the S32G2RM.pdf and the Ocotp_Ip_WriteEFuse function, you can check ADDR_SYS and WRDATA_SYS register to know whether any data has been written to the specific eFuse address. In addition , you can configure LockBit to use eFuse/shadow lock bit function by referring to S32G2_Fuse_Map_Tables.xlsx. BR Joey
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Debian 12 SDK Hello, We have read that NXP has released a new version based on Debian 12 (kernel 6.6.3) for i.MX processors We want to use it in our own design based on i.MX8m plus, so we need to port uboot and kernel. Could you please help us to find out how to get the toolchain, rootfs, uboot and kernel source code ? kind regards and thank you Angel Re: Debian 12 SDK Hi Chavira, Thank you very much for your help. This could be an option, but we are also considering building the toolchain from NXP release 6.1.22_2.0.0, as this release includes gcc 12.2. Both Debian 12 and gcc 12.2 include glibc 2.36, and this is an important point when our customers need to cross-compile their FW. Best regards Angel Re: Debian 12 SDK Hi @AngelF! Talking with the internal team I got the next answer: To cross-compile applications in standalone mode, users can use aarch64-linux-gnu-gcc compiler, which is installed by command "sudo apt-get install -y crossbuild-essential-arm64 gcc-aarch64-linux-gnu g++-aarch64-linux-gnu binutils-aarch64-linux-gnu" on Ubuntu host. Best Regards! Chavira Re: Debian 12 SDK Hi Chavira, Yes, I can find aarch64-linux-gnu-gcc and glibc in the container, but I was trying to generate the whole toolchain instead of copying file by file. When installing NXP yocto firmware, we can use the populate_sdk command to generate the full toolchain and we can deploy to customers in a "professional" way. So, with Debian 12, is it possible to generate a complete toolchain or do we have to go file by file? Best regards and thank you Angel Re: Debian 12 SDK HI @AngelF! According with previous cases of the same topic. After installing flex-builder and setting up compiling environment, you could find toolchain(GCC) is deployed in /usr/bin folder. $ which aarch64-linux-gnu-gcc /usr/bin/aarch64-linux-gnu-gcc Glibc is deployed in /usr/aarch64-linux-gnu/lib/ folder. If the tool chain doesn´t exist please let me know. Best Regards! Chavira Re: Debian 12 SDK Hi Chavira, Thank you very much for your help. My host is ubuntu 24.04, so I follow steps and now I have everything ready to generate Debian images inside a docker container. Now we need to be able to offer our customers a toolchain so that they can cross-compile their applications in standalone mode aoutside the container. So we would like to be able to generate the toolchain in the same way as we generate it with yocto (populate_sdk command). How can we get the toolchain using Flexbuild? Best regards and thank you Angel Re: Debian 12 SDK HI @AngelF! Thank you for contacting NXP Support! You can see all the documentation available for Debian in the links below: https://www.nxp.com/design/design-center/software/embedded-software/linux-software-and-development-tools/nxp-debian-linux-sdk-distribution-for-i-mx-and-layerscape:NXPDEBIAN https://www.nxp.com/docs/en/user-guide/UG10155.pdf Best Regards! Chavira
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LSDK 用の libgtk-x11-2.0.so.0 のビルド方法 私はLS1028ARDBボード(LSDKを実行)用にlibgtk-x11-2.0.so.0をビルドしようとしています。これは libopencv_highgui.so で必要です。このライブラリをLS1028A用にクロスコンパイルする方法はありますか? 日時: LSDK 用の libgtk-x11-2.0.so.0 のビルド方法 LSDK 21.08 ホスト ビルド環境で、次のコマンドを実行してください。 $ sudo chroot build/rfs/rootfs_lsdk2108_ubuntu_main_arm64/ 次に、次のコマンドを実行します。 /# apt-get install libgtk2.0-0 /# 終了 build/rfs/rootfs_lsdk2108_ubuntu_main_arm64/usr/lib/aarch64-linux-gnu/libgtk-x11-2.0.so.0 が取得されます。
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PBI not applied Hello everyone, I am currently trying to use USB2_EN, USB2_PWRFAULT, USB3_EN, USB3_PWRFAULT pins on LS1046 as GPIOs. To do this, I am trying to use the following PBI command: write 0x0057040c,0x00001111 However, it does not seem to be applied, as when reading the from uboot, I get: => md.l 0x0157040c 0157040c: 00330000 00000000 29000000 9e000000 ..3........).... I have confirmed that manually overwriting it in uboot makes the GPIO work, so now I am wondering, why my PBI commands are not applied (also some other registers seem to be different).  What is the best way to debug this? The generated binary (see attached) seems to be including the commands.  Thank you in advance! Mykyta Re: PBI not applied I was indeed suspecting that something overwrites it:) Finally I found it, in the board configuration there was: out_be32(&scfg->rcwpmuxcr0, 0x3300); After removing it, no one overwrites my stuff:)  Thank you for the hint! Re: PBI not applied Would that be modified after you set the value in the PMUXCR0 in the PBI? You could check it by the CodeWarrior TAP before the u-boot start to run. If you want to use this register you could change it when you need it to confirm it is not changed by the other command. But should not conflict with other function. Thanks Re: PBI not applied Thank you for your answer. The pins that I am referring to are GPIO4_10, GPIO4_11, GPIO4_12, GPIO4_13 - these are controlled only with setting the SCFG PINMUX register.  With RCW-controlled pins I do not have any issues. Re: PBI not applied Hi, you need to set RCW[429] and RCW[430] to 1 before the PBI block. This enables GPIO4[29] and GPIO4[30]. In your configuration file you can achieve this with: USB_DRVVBUS=1 USB_PWRFAULT=1 This configures the pins to GPIOs. Best, Kay
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PUF set key operation fails (PUF_SetUserKey), even after a correct enroll and start Hi all, I'm writing a Secure Boot for a client, who chose to use the PUF (Physically Unclonable Function) hardware to encrypt some custom user keys. The board I'm using is a NXP i.MX RT1172 (MIMXRT1172AVM8A), and I'm debugging using the MCUXpresso IDE (v11.9.1 [Build 2170] [2024-04-19]) and a Segger J-Link to connect with the hardware. I burned the PUF_ENABLE bit fuse using the MCUXpresso Secure Provisioning Tool so that the PUF operations are enabled. In my custom Boot program, I call PUF_Init,  then PUF_Enroll (it will be done just the first time, at the production end of line, when its PUF Activation Code is not yet stored on the flash memory), PUF_Deinit + PUF_Init (to "restart" the PUF after the enroll), and finally PUF_Start. All the above calls return with a success status. At this point (with the PUF initialized and started), I'd like to save a customer key (that will be passed to the Boot program only during the production end-of-line process): I call PUF_SetUserKey, but this call fails. I followed the call into the PUF driver function, and I saw that it failed because the SET KEY operation is not allowed: /* check if SET KEY is allowed */ if (0x0u == (base->ALLOW & PUF_ALLOW_ALLOWSETKEY_MASK)) { return kStatus_Fail; } Why is that? Should I do something else before calling the PUF_SetUserKey function? Thank you very much in advance for any help you will provide (even document references or links where to find more information). Best regards Re: PUF set key operation fails (PUF_SetUserKey), even after a correct enroll and start I realized that because of a stupid problem a file was not saved and in the end, the function PUF_BlockSetKey() was called BEFORE the PUF_SetUserKey instead of being called AFTER it. I solved the problem of course by requiring PUF_BlockSetKey() to be called after the PUF_SetUserKey. I'm keeping this post for future reference if anyone finds a similar problem. Note: two functions block the ENROLL operation and SET KEY operation respectively (PUF_BlockEnroll() and PUF_BlockSetKey()), so please be sure to call those only after the PUF main operations.
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How to build - Mcuxpresso command line build with build option I want use command line buld  1. windows  2. Ubuntu linux.  3. using build option; such as option [PREDEFINE_OPT 1], check below   Please explain the usage in case the sample project: (frdmkw38_ble_shell_freertos) Board Design Re: How to build - Mcuxpresso command line build with build option Hello, Hope you are doing well. I would recommend these posts: MCUXpresso IDE v11.8.1 - How to command line build project? - NXP Community mcuxpresso-ide command line and building with the .cproject file settings - NXP Community Command line build - NXP Community Hope this helps! Regards, Ricardo
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s32k3 how to recover flash? Hi NXP,     i'm working on boot application for updating app program.  when boot program pflash meet some error and trigger a swt reset mcu, then checking plash is partial unaccessible.  as pic below, 1. is this a flash ecc error case? 2. in that situation, jlink cant program the flash,   could you give some advice how to recover the plash to normal state? Re: s32k3 how to recover flash? Hi @victory, The flash must be read first. I would maybe focus on why the flashing gets stuck and why the MCU has to be reset by the WDOG. The flash block that is being programmed must not be accessed by any master on the bus. This might requires disabling interrupts or placing the flash driver into SRAM. Regards, Daniel Re: s32k3 how to recover flash? i am using s32k312 is there any method to detect the error without read the target flash region to get if that area has a ecc error and unaccessible? Re: s32k3 how to recover flash? Hi @victory, Can you specify the S32K3xx part number? If the MCU is reset while the flash operation is in progress, the content of the flash cannot be defined, and ECC error should be expected. If there is an uncorrectable ECC error detected during a read operation, the MCRS[ERR] flag is set. The detection can be suppressed: Regards, Daniel 回复: s32k3 how to recover flash? Append: is it possible to disable flash ecc function?
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NHS3152 Passive Measurement Hi everyone I have an NHS3152 on a custom PCB. The PCB is very simple, with an SWD connector for my MCU-Link Pro and some traces to a connector to attach to a screen-printed antenna. For power stability, there are 2x 100nF capacitors in parallel for both pin 3 & pin 7 (4 capacitors total). I am having an issue regarding the resistive measurements. I have two channels for resistive measurements (channel0 = pins 0,1; channel1 = pins 4,5;). When I perform a resistive measurement when the board is running passively (no power from the debugger), my NFC scanner (Adafruit PN532 shield for Arduino Uno) does not receive any data. However, it does receive the correct data from the measurements when the NHS3152 is receiving power from my debugger. If I disable the sections of the code relating to taking resistive measurements, I can successfully read the NFC contents, so I suspect the ADC is consuming too much power? Any help on this is greatly appreciated. IDE: MCUXpresso v24.9.25 SDK: release_mra2_12_6_nhs3152 Output from scanner on unsuccessful read (running in passive mode): ================================================= Tag Found and Activated! Preparing to read data. UID Length: 7 bytes UID Value: 0x04 0x8E 0xE6 0x00 0xA8 0x00 0x10 ---------------------------------------- Reading data from pages 8-12 Failed to read page 8 ================================================= Tag lost or communication failed. Resetting... ================================================= Output from scanner when NHS3152 is powered via debugger: ================================================= Tag Found and Activated! Preparing to read data. UID Length: 7 bytes UID Value: 0x04 0x8E 0xE6 0x00 0xA8 0x00 0x10 ---------------------------------------- Reading data from pages 8-12 Page 08: 6E 52 31 3A nR1: Page 09: 34 2C 52 32 4,R2 Page 10: 3A 2D 31 FE :-1 Page 11: 86 56 4D 3D VM= Page 12: 84 28 57 0C (W. Data read successfully. Tag is still present. ---------------------------------------- NHS3152  main.c: /* * James Harold, 2025, Scion * * This program measures resistance on two separate analog channels * and writes the results to an NFC tag for wireless reading. * */ // 1. Library Imports #include "board.h" #include "ndeft2t/ndeft2t.h" #include #include "pmu_nss.h" #include "gpio_nss.h" #include #include #include // 2. Defines #define CHANNEL_0 0 // Capacitive & resistive channel #define CHANNEL_1 1 // Resistive channel #define NUM_CHANNELS 2 // Number of total measurement channels // 3. Global Variables // Buffers for NDEF message creation (for NFC) static uint8_t g_ndeft2tInstanceBuffer[NDEFT2T_INSTANCE_SIZE] __attribute__((aligned (4))); static uint8_t g_nfcMessageBuffer[NFC_SHARED_MEM_BYTE_SIZE] __attribute__((aligned (4))); // Array to store the results for each measurement channel volatile int32_t measuredResistance[NUM_CHANNELS] = {0, 0}; // 4. NFC Callbacks (Required by the library, but unused) void NDEFT2T_FieldStatus_Cb(bool status) { (void)status; } void NDEFT2T_MsgAvailable_Cb(void) { /* Unused */ } // 5. Function Prototypes void SetupPowerStabilisation(void); void SetupResistiveMeasurement(int channel); int32_t PerformAndCalculateResistance(int channel); void WriteMeasurementsToNFC(int32_t res1, int32_t res2); void WriteHelloMessageToNFC(void); // 6. Main Code int main(void) { // Step 1: Perform minimal board and power setup Board_Init(); SetupPowerStabilisation(); // Must be performed early for energy harvesting from NFC tag // --- Enable Clocks and Power for peripherals that will be used --- Chip_Clock_Peripheral_EnableClock(CLOCK_PERIPHERAL_ADCDAC | CLOCK_PERIPHERAL_I2D); Chip_SysCon_Peripheral_EnablePower(SYSCON_PERIPHERAL_POWER_ADCDAC | SYSCON_PERIPHERAL_POWER_I2D); // A small delay for power and clocks to stabilise Chip_Clock_System_BusyWait_us(100); // --- Resistance Measurement Initialisation --- // Initialise the peripherals and configure the analog pins Chip_ADCDAC_Init(NSS_ADCDAC0); Chip_I2D_Init(NSS_I2D); // Configure analog pins for Channel 0 (ANA0_0, ANA0_1) Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_0, IOCON_FUNC_1); Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_1, IOCON_FUNC_1); // Configure analog pins for Channel 1 (ANA0_4, ANA0_5) Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_4, IOCON_FUNC_1); Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_ANA0_5, IOCON_FUNC_1); // Set the ADC to a narrow voltage range (1.0V) Chip_ADCDAC_SetInputRangeADC(NSS_ADCDAC0, ADCDAC_INPUTRANGE_NARROW); // Step 2: Initialise NFC communication Chip_NFC_Init(NSS_NFC); NDEFT2T_Init(); // Step 3: Perform resistive measurements SetupResistiveMeasurement(CHANNEL_0); measuredResistance[CHANNEL_0] = PerformAndCalculateResistance(CHANNEL_0); SetupResistiveMeasurement(CHANNEL_1); measuredResistance[CHANNEL_1] = PerformAndCalculateResistance(CHANNEL_1); // Step 4: Write measurements to the NFC tag WriteMeasurementsToNFC(measuredResistance[CHANNEL_0], measuredResistance[CHANNEL_1]); //WriteHelloMessageToNFC(); // --- Power down peripherals after use to save energy --- Chip_SysCon_Peripheral_DisablePower(SYSCON_PERIPHERAL_POWER_ADCDAC | SYSCON_PERIPHERAL_POWER_I2D); Chip_Clock_Peripheral_DisableClock(CLOCK_PERIPHERAL_ADCDAC | CLOCK_PERIPHERAL_I2D); // Step 5: Wait for NFC peripheral interrupt while(1) { __WFI(); } return 0; // Should never be reached } // 7. Function Declarations /** * @brief Configures hardware for a resistive measurement on a specific channel. * @param channel : The measurement channel to set up (CHANNEL_0 or CHANNEL_1) * @return Nothing */ void SetupResistiveMeasurement(int channel) { ADCDAC_IO_T dac_pin; I2D_INPUT_T i2d_pin; if (channel == CHANNEL_1) { dac_pin = ADCDAC_IO_ANA0_4; i2d_pin = I2D_INPUT_ANA0_5; } else { dac_pin = ADCDAC_IO_ANA0_0; i2d_pin = I2D_INPUT_ANA0_1; } Chip_ADCDAC_SetMuxDAC(NSS_ADCDAC0, dac_pin); Chip_ADCDAC_WriteOutputDAC(NSS_ADCDAC0, 0xFFF); // Changed from 0xFFF to 0x800 to lower DAC output voltage Chip_I2D_SetMuxInput(NSS_I2D, i2d_pin); if (channel == CHANNEL_0) { Chip_I2D_Setup(NSS_I2D, I2D_SINGLE_SHOT, I2D_SCALER_GAIN_100_1, I2D_CONVERTER_GAIN_LOW, 10); // Changed I2D conversion period from 100 to 10 (power save) } else { Chip_I2D_Setup(NSS_I2D, I2D_SINGLE_SHOT, I2D_SCALER_GAIN_100_1, I2D_CONVERTER_GAIN_LOW, 10); // Changed I2D conversion period from 100 to 10 (power save) } // Wait a moment for the voltage and current to stabilise. Chip_Clock_System_BusyWait_ms(1); } /** * @brief Initialises GPIOs to enable the capacitor bank for power stability. * @return Nothing * @note This is the most critical initialisation for passive operation. */ void SetupPowerStabilisation(void) { Chip_IOCON_Init(NSS_IOCON); Chip_GPIO_Init(NSS_GPIO); // --- Phase 1: PRECHARGE --- // Configure pins as INPUTS with internal pull-up resistors enabled. // This allows the external caps to charge slowly without causing a voltage drop. Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_3, IOCON_FUNC_0 | IOCON_RMODE_PULLUP); // Configure pin 3 as GPIO and enable pull-up Chip_GPIO_SetPinDIRInput(NSS_GPIO, 0, 3); // Configure pin 3 as input Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_7, IOCON_FUNC_0 | IOCON_RMODE_PULLUP); // Configure pin 7 as GPIO and enable pull-up Chip_GPIO_SetPinDIRInput(NSS_GPIO, 0, 7); // Configure pin 7 as input // Wait for a short time to allow the capacitors to charge. Chip_Clock_System_BusyWait_ms(60); // Approx. 60ms for 4 time constants (each pin has 200nF attached) // --- Phase 2: ENGAGE --- // Now that the caps are charged, we can safely connect them to the power rail // by setting the pins to OUTPUT and driving them HIGH. Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_3, IOCON_FUNC_0 | IOCON_RMODE_INACT); // Configure pin 3 as GPIO and disable pull-up Chip_GPIO_SetPinDIROutput(NSS_GPIO, 0, 3); // Configure pin 3 as output Chip_GPIO_SetPinOutHigh(NSS_GPIO, 0, 3); // Connect pin 3 to VDD rail by setting it high Chip_IOCON_SetPinConfig(NSS_IOCON, IOCON_PIO0_7, IOCON_FUNC_0 | IOCON_RMODE_INACT); // Configure pin 7 as GPIO and disable pull-up Chip_GPIO_SetPinDIROutput(NSS_GPIO, 0, 7); // Configure pin 7 as output Chip_GPIO_SetPinOutHigh(NSS_GPIO, 0, 7); // Connect pin 7 to VDD rail by setting it high } /** * @brief Creates an NDEF message with the two resistance values and writes it to memory. * @param res1 : The raw resistance value from the first channel. * @param res2 : The raw resistance value from the second channel. * @return Nothing */ void WriteMeasurementsToNFC(int32_t res1, int32_t res2) { char payloadText[64]; NDEFT2T_CREATE_RECORD_INFO_T createRecordInfo; uint8_t locale[] = "en"; snprintf(payloadText, sizeof(payloadText), "R1:%ld,R2:%ld", res1, res2); NDEFT2T_CreateMessage(g_ndeft2tInstanceBuffer, g_nfcMessageBuffer, NFC_SHARED_MEM_BYTE_SIZE, true); createRecordInfo.shortRecord = 1; createRecordInfo.pString = locale; if (NDEFT2T_CreateTextRecord(g_ndeft2tInstanceBuffer, &createRecordInfo)) { if (NDEFT2T_WriteRecordPayload(g_ndeft2tInstanceBuffer, (uint8_t*)payloadText, strlen(payloadText))) { NDEFT2T_CommitRecord(g_ndeft2tInstanceBuffer); } } NDEFT2T_CommitMessage(g_ndeft2tInstanceBuffer); } /** * @brief Creates a simple NDEF text message "hello" and writes it to NFC memory. * @return Nothing */ void WriteHelloMessageToNFC(void) { char payloadText[] = "bananas"; NDEFT2T_CREATE_RECORD_INFO_T createRecordInfo; uint8_t locale[] = "en"; // 1. Start creating a new NDEF message in our buffer. NDEFT2T_CreateMessage(g_ndeft2tInstanceBuffer, g_nfcMessageBuffer, NFC_SHARED_MEM_BYTE_SIZE, true /* isFirstMessage */); // 2. Prepare information for a new NDEF Text Record. createRecordInfo.shortRecord = 1; createRecordInfo.pString = locale; // 3. Create the Text Record structure within the message. if (NDEFT2T_CreateTextRecord(g_ndeft2tInstanceBuffer, &createRecordInfo)) { // 4. Write the actual "hello" string into the record's payload. if (NDEFT2T_WriteRecordPayload(g_ndeft2tInstanceBuffer, (uint8_t*)payloadText, strlen(payloadText))) { // 5. Finalise this specific record. NDEFT2T_CommitRecord(g_ndeft2tInstanceBuffer); } } // 6. Finalize the entire message, making it available to the NFC hardware. NDEFT2T_CommitMessage(g_ndeft2tInstanceBuffer); } /** * @brief Performs ADC and I2D conversions and calculates the resistance for a specific channel. * @param channel : The measurement channel to measure (CHANNEL_0 or CHANNEL_1) * @return A raw, scaled resistance value, or -1 if an error occurs (e.g., open circuit). * @note Uses low-power __WFE() to wait for conversions, essential for passive mode. */ int32_t PerformAndCalculateResistance(int channel) { int32_t v_drive, v_sense, i2d_val, adc_diff, resistance_result; ADCDAC_IO_T drive_pin_adc, sense_pin_adc; /* * NOTE: Peripheral clocks and power are assumed to be enabled in main(). * If this function were called from multiple places, you might enable/disable * them here instead. For this application, enabling in main() is more efficient. */ if (channel == CHANNEL_1) { drive_pin_adc = ADCDAC_IO_ANA0_4; sense_pin_adc = ADCDAC_IO_ANA0_5; } else { drive_pin_adc = ADCDAC_IO_ANA0_0; sense_pin_adc = ADCDAC_IO_ANA0_1; } // --- V_DRIVE ADC Measurement --- Chip_ADCDAC_SetMuxADC(NSS_ADCDAC0, drive_pin_adc); Chip_ADCDAC_StartADC(NSS_ADCDAC0); // NEW, LOW-POWER WAY: Sleep until the ADC conversion is done. while (!(Chip_ADCDAC_ReadStatus(NSS_ADCDAC0) & ADCDAC_STATUS_ADC_DONE)) { { /* wait */ } } v_drive = Chip_ADCDAC_GetValueADC(NSS_ADCDAC0); // --- V_SENSE ADC Measurement --- Chip_ADCDAC_SetMuxADC(NSS_ADCDAC0, sense_pin_adc); Chip_ADCDAC_StartADC(NSS_ADCDAC0); // Sleep until the ADC conversion is done. while (!(Chip_ADCDAC_ReadStatus(NSS_ADCDAC0) & ADCDAC_STATUS_ADC_DONE)) { { /* wait */ } } v_sense = Chip_ADCDAC_GetValueADC(NSS_ADCDAC0); // --- I2D Measurement --- Chip_I2D_Start(NSS_I2D); // Sleep until the I2D conversion is done. while (!(Chip_I2D_ReadStatus(NSS_I2D) & I2D_STATUS_CONVERSION_DONE)) { { /* wait */ } // Wait For Event - wakes up on ADC_DONE event --> Replaced __WFE() with busy waits {} } i2d_val = Chip_I2D_GetValue(NSS_I2D); /* * NOTE: Peripherals are left powered on for the next measurement. * They will be powered down at the end of main(). */ // --- Calculation --- adc_diff = v_drive - v_sense; if (adc_diff < 1) { adc_diff = 1; } if (i2d_val > 0) { resistance_result = ((uint32_t)adc_diff * 10000) / i2d_val; } else { resistance_result = -1; // Indicates open circuit or error } return resistance_result; } ntag2xx_read.ino: /**************************************************************************/ /*!     @file     readntag_continuous_power_and_data.ino     @author   KTOWN (Adafruit Industries) / Modified for continuous power and data read     @license  BSD (see license.txt)     This version keeps a passive NFC tag continuously powered, and on each     loop, it reads and displays the data from a specific range of pages (8-13).     It resets when the tag is removed. */ /**************************************************************************/ #include #include #include // If using the breakout with SPI, define the pins for SPI communication. #define PN532_SCK  (SCK) #define PN532_MISO (MISO) #define PN532_MOSI (MOSI) #define PN532_SS   (10) // Or whatever SPI CS pin you're using // If using the breakout or shield with I2C, define the pins for I2C // and comment out the SPI definitions. #define PN532_IRQ   (2) #define PN532_RESET (3) // Use this line for I2C Adafruit_PN532 nfc(PN532_IRQ, PN532_RESET); // Or use this line for SPI // Adafruit_PN532 nfc(PN532_SCK, PN532_MISO, PN532_MOSI, PN532_SS); // Global state variables to track if a tag is currently selected bool tagIsPresent = false; uint8_t uid[] = { 0, 0, 0, 0, 0, 0, 0 }; uint8_t uidLength; int pageStart = 8; int pageEnd = 12; void setup(void) {   Serial.begin(115200);   while (!Serial) delay(10); // For Leonardo/Micro/Zero   nfc.begin();   uint32_t versiondata = nfc.getFirmwareVersion();   if (!versiondata) {     Serial.print("Didn't find PN53x board");     while (1); // halt   }   Serial.print("Found chip PN5"); Serial.print((versiondata >> 24) & 0xFF, HEX);   Serial.print(", Firmware ver. "); Serial.print((versiondata >> 16) & 0xFF, DEC);   Serial.print('.'); Serial.println((versiondata >> 8) & 0xFF, DEC);   // Configure the board to listen for ISO14443A cards   nfc.SAMConfig();   Serial.println("Waiting for an ISO14443A Card to power and read..."); } void loop(void) {   // === STATE 1: NO TAG IS SELECTED ===   // If we don't have a tag, try to find one.   if (!tagIsPresent) {     Serial.print("."); // Print a dot to show we are waiting     // Wait for a card to enter the field. This also provides power.     bool success = nfc.readPassiveTargetID(PN532_MIFARE_ISO14443A, uid, &uidLength, 500);     if (success) {       tagIsPresent = true;       Serial.println("\n=================================================");       Serial.println("Tag Found and Activated! Preparing to read data.");       Serial.print("  UID Length: "); Serial.print(uidLength, DEC); Serial.println(" bytes");       Serial.print("  UID Value: ");       nfc.PrintHex(uid, uidLength);             // OPTIONAL DELAY: If your tag is a sensor that needs time to       // perform a measurement after power-up, add a delay here.       // 200ms is a good starting point for many sensor tags.       delay(200);     }     // If it fails or times out, the loop will just restart and try again.     return;   }   // === STATE 2: TAG IS SELECTED AND POWERED ===   // If we have a tag, attempt to read the data from pages 8 to 13.   if (tagIsPresent) {     Serial.println("----------------------------------------");     Serial.print("Reading data from pages ");     Serial.print(pageStart);     Serial.print("-");     Serial.print(pageEnd);     Serial.println();         bool all_reads_succeeded = true;         for (int page = pageStart; page <= pageEnd; page++) {       uint8_t page_data[4]; // NTAG pages are 4 bytes long             // Attempt to read the current page       if (nfc.ntag2xx_ReadPage(page, page_data)) {         // Success! Print the data.         Serial.print("  Page ");         if (page < 10) Serial.print("0"); // for nice alignment         Serial.print(page);         Serial.print(": ");         // nfc.PrintHexChar is a great helper function that prints hex and ASCII         nfc.PrintHexChar(page_data, 4);       } else {         // FAILED TO READ! This is our signal that the tag has been removed.         Serial.print("  Failed to read page "); Serial.println(page);         all_reads_succeeded = false;         break; // Exit the for loop immediately       }     }     if (all_reads_succeeded) {       Serial.println("Data read successfully. Tag is still present.");     } else {       // If any read failed, we reset the system state.       Serial.println("\n=================================================");       Serial.println("Tag lost or communication failed. Resetting...");       Serial.println("=================================================");       tagIsPresent = false; // Reset the state       nfc.SAMConfig(); // Re-configure the reader to listen for a new tag     }         // Wait a bit before the next read cycle.     delay(2000);   } } Re: NHS3152 Passive Measurement FYI. NHS3152 power only from NFC field and load Capacitor - NXP Community Re: NHS3152 Passive Measurement Hi Jimmy, thank you for replying. Do you think adding more capacitance to the capacitor bank could possibly enable ADC operation in passive mode? If so, what would be a safe amount of total capacitance to have to perform these operations. Re: NHS3152 Passive Measurement when the board running passively, the power may not stable enough for the ADC operation.
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S32G3: RTD MemMap セクション違反 (LLCE の場合) こんにちは、 「 [S32G3/Valeo] RTD MemMap セクション違反 - NXP コミュニティ」の提案に従い、LLCE の xxx_MemMap レビュー用のチケットを以下のように作成します (完全なドキュメントを添付します)。 GHS でコンパイルした後、以下のパラメータ/関数が適切なメモリ領域に含まれていないかどうかを確認してください。 ================================================================= (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_AFcfg.c: Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ pLlce_Can_AfBuffer => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_43_LLCE_MAIN_SOC_PBcfg.c: // VariantPostBuildが有効になっています (MAIN_SOC) Llce_Rx_Filters_List_MAIN_SOC => rodataセクションであるCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_RxAf_Filters_List_MAIN_SOC => rodataセクションのCAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIEDのデータ Llce_Rx_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl2_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl4_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_Rx_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl0_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl5_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl9_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) Llce_RxAf_Filters_Ctrl15_PB_MAIN_SOC => CAN_43_LLCE_START_SEC_CONFIG_DATA_UNSPECIFIED のデータ(rodata セクション) (Can_43_LLCE_TS_T40D11M10I8R0) (Llce_Af_TS_T40D11M10I8R0) Can_Llce: llce_minihif => 静的グローバル変数が Can_43_LLCE_MemMap.h に含まれていません u8Length => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません stringBuf => 静的ローカル変数は Can_43_LLCE_MemMap.h に含まれていません ***************************************************************************************************************************************************************** 回答: この質問は、NXPコミュニティのタグ「LLCE」を介してLLCEチームに提起してください。 ***************************************************************************************************************************************************************** LLCE Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正が予定されているかどうかご存知ですか?もしSOなら、いつですか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 あなたの質問に関して、Valeo からの非常に遅いフィードバック: 1. 「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」とおっしゃった場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言っていますが、実際には .bss セクションに配置されていますか? この変数は4の値で初期化されていますが、変数は.dataではなく.bssセクション内にあります。セクションSO、変数はたとえば .mcal_data_x にある必要があります。 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。 「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」 この変数はCan_43_LLCE_TS_T40D11M10I10R0で修正されたようです。 3. Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、正しいセクションに配置しましたか? 下の画像を見ると、(static、static const) がありますが、それらはすべて .mcal_cont_cfg という同じセクションに配置されています。これは rodata であり、このファイルは生成されるSO、どのセクションに配置するかは私の責任ではありません。 以前のやり取りでは、新しいソフトウェア バージョンがないため、次のリリースではソフトウェア アップデートは行われないと予想されていました。それはまだCASEなのでしょうか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 弊社側からの回答をお客様にまとめましたが、今のところそれ以上のフィードバックはありません。 あなたが提起した LLCE に関する質問に対するさらなるフィードバックをお願いするために、お問い合わせに個別のメールを送信しました。 お客様からの返信があればここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 更新情報をありがとうございます! S32GのCDは2025年3月にリリース予定で、2025年5月にもリリース予定です。それ以降のリリース予定はありません。SO、このトピックに関する情報を収集し、これらの実装を2025年5月のリリースに組み込む予定です。 最初の回答の質問に対するフィードバックをお願いします。 1. 彼らの言っていることは正しく理解していますか?例えば、 「Llce_Eth2Can_EnabledFormats => BSSSセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書いてある場合、 Llce_Eth2Can_EnabledFormats は、たとえば .mcal_bss_no_cacheable にあるべきだと言われていますが、実際には .bss セクションに配置されていますか? 2.グローバル静的変数llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMapセクションで制御する必要がある場合は、AUTOSARの推奨事項に従うことができます。 「関数の静的変数に特別なメモリマッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であるとCANご確認いただけますか? 3.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、お客様がこれを間違ったセクションに配置されていると考える理由を確認しましたか? Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 修正の期待に関する元のチケットの更新によると、お客様は 6 月までにコードをフリーズする予定です。 多くのコンポーネントが関係しており、パッチが必要なため、6月までにそれらをまとめるのは難しいでしょう。 SO、お客様からさらに指示がない限り、現在の想定/リソースに従って計画を立ててください。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、コングさん。 更新が遅くなり申し訳ございませんが、元のチケットでわかるように、お客様からのフィードバックはまったくありません。 私はこれを再度推進しますが、現状の評価に応じて計画を立てることがCANそうです。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、リチャード。 このトピックに関して何か最新情報はありますか? S32G の 3 月の CD にできるだけ早く実装する必要があります。 よろしくお願いいたします。 コング Re: S32G3: RTD MemMap Sections Violations (For LLCE) 2. はい、これらの詳細を記録するためにチケットAF-4950を作成しました。チケットの詳細を確定するために、上記の質問の確認を待っています。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 更新情報をありがとうございます。 1.Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ については、なぜお客様がこれを間違ったセクションに配置されていると考えるのかをさらに確認します。 2. 残りの部分については、適切なセクションが含まれるように修正するとおっしゃっていましたが、修正するためのチケットや計画は用意されていて、お客様と共有できますか? 3. 元のチケット「 [S32G3/Valeo] RTD MemMap セクション違反 - NXPコミュニティ」に記載されているように、FAE はこの問題の修正に関するお客様の期待について確認しており、追加情報が入りましたらここで更新します。 よろしくお願いいたします。 リチャード・チャン。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 まず、レポートを理解する必要があります。「Llce_Eth2Can_EnabledFormats => bssセクションのCAN_43_LLCE_START_SEC_VAR_CLEARED_16_NO_CACHEABLEのデータ」と書かれている場合、 Llce_Eth2Can_EnabledFormatsは例えば.mcal_bss_no_cacheable、しかし、実際には.bssに配置されますセクション? 上記の前提となる理解に従うと、フィードバックは次のようになります。 NXP は次のことを行います。 • グローバル静的変数 llce_minihif を適切な MemMap セクションに含めます。u8Length/ stringBuf は関数の静的変数であり、SWS_MemMap_00023 に従って関数の本体内に MemMap を追加できないため、MemMap の制御下にありません。MemMap セクションでそれらを制御する必要がある場合は、AUTOSAR の推奨事項に従うことができます。「関数の静的変数の特別なメモリ マッピングを強制するには、この変数をファイルの静的スコープに移動する必要があります。」これは強い要求であることをCAN確認できますか? • グローバル静的変数定義llce_minihifを適切なMemMapセクションに含める • Llce_Eth2Can_EnabledFormats の宣言を対応する MemMap セクションに含めます。これがおそらく置き忘れの原因です。 • pLlce_Can_AfBuffer の宣言を対応する MemMap セクションに含め、現在の MemMap セクションが適切かどうかを再確認します。 • Llce_Rx_Filters_List_ / Llce_RxAf_Filters_List_ はすでに対応する MemMap セクションに配置されているため、変数の配置ミスの原因を特定するには追加の分析が必要です。 Re: S32G3: RTD MemMap Sections Violations (For LLCE) こんにちは、 アップデートはありますか? よろしくお願いいたします。 リチャード・チャン。
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Even when connected to a PC, the USB is not recognized. The USB is not recognized. The SoC is iMX8Mini(MIMX8MM6CVTKZAA). Please tell me the cause by referring to the device tree settings below. &usbotg2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg2>; power-active-high; disable-over-current; dr_mode = "peripheral"; status = "okay"; phy_type = "utmi"; phys = <&usbphynop2_alt>; phy-names = "usb"; port { typea_hs: endpoint { remote-endpoint = <&typea_con_hs>; }; }; }; &soc { usbphynop2_alt: usbphynop@381f0040 { compatible = "usb-nop-xceiv"; reg = <0x381f0040 0x40>; #phy-cells = <0>; status = "okay"; }; }; Re: Even when connected to a PC, the USB is not recognized. Thank you very much. I used it as a reference and resolved the issue. Re: Even when connected to a PC, the USB is not recognized. Hello, Could you please share the USB schematic connection of your design? Best regards.
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询问 S32DS_PPC_eqADC 演示 你好,团队 我想了解一下使用 S32DS PA 2.1 的 MPC5777C eQADC 演示? 我试着用 DS 的例子,它在 ADC 转换触发信号期间显示 " DEVASSERT "。 因此,我希望通过 S32DS PA 寻找 MPC5777C eQADC 项目的工作示例。 谢谢! S32DS Re: Asking S32DS_PPC_eqADC demo 嗨,丹 我使用了下面的描述,其中显示了一些措辞。 谢谢。 Re: Asking S32DS_PPC_eqADC demo 你好,@Luke_Chun、 你使用的是哪个 MPC5777C 代码包版本?您查看过示例自述文件中的详细信息吗? 顺祝商祺! 丹
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Pin configuration for Watch Dog timer MIMXRT1042XJM5B Dear team, We are using MIMXRT1042XJM5B in our upcoming project, we are looking for pinout of Watch Dog Timer, where it can be configured, kindly let us know Looking forward to hear from you, Regards, Bhavesh Re: Pin configuration for Watch Dog timer MIMXRT1042XJM5B Hi @bhaveshtirex , Thank you so much for your interest in our products and for using our community. Regarding "We are using MIMXRT1042XJM5B in our upcoming project, we are looking for pinout of Watch Dog Timer, where it can be configured", In IMXRT1040RM, there are some description about WDOG External Signals. As for how to configure the pin, you can use Pins  Tool in MCUXPresso IDE Wish it helps you. If you still have question about it, please kindly let me know. Wish you a nice day! Best Regards MayLiu
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