SPI communication with FXIO I encountered two problems in configuring FXIO for SPI communication with S32K312: 1. The baud rate configured by EB is 100KHz, but according to the measurement results, it is actually 200K. What's going on? 2. The configuration of the three parameters Cs2Cs, Clk2Cs and Cs2Clk in EB seems to be invalid for FXIO. What's going on? The following are screenshots of the configuration and test results. Re: SPI communication with FXIO Yes，clock config is Option-B.I have found the answer in the latest version of the update record. It should be that there is a problem with the clock source selected when calculating the baud rate.Thinks！ Re: SPI communication with FXIO Hello @WeiCh, 1. Is the system clock set precisely to one of the clock options listed in the RM? For example:  152. Option B - Reduced Speed mode (CORE_CLK @ 120 MHz) 2. This is a HW feature of the LPSPI module. Regards, Daniel

developemt software support with mc9s12zvc? I want to develope code on MC9S12ZVCA, and I have a debuger multilink universal. I wonder is there any other software tools besides codewarrior support with this chip? Re: developemt software support with mc9s12zvc? I choose generate S-Recode file now I can burn to S12ZVCA success. Re: developemt software support with mc9s12zvc? thanks for your reply, I used codewarrior just now. I can debug with the board by multilink universal, but I wonder how could generate the flash file that can be burn to S12ZVCA in codewarrior. Re: developemt software support with mc9s12zvc? Hi, We are only able to suggest our products or products officially mentioned on our pages. They can be found in the Design resources at the page... https://www.nxp.com/products/processors-and-microcontrollers/additional-mpu-mcus-architectures/s12-magniv-mixed-signal-mcus/s12zvm-mixed-signal-mcu-for-automotive-and-industrial-motor-control-applications:S12ZVM Best regards, Ladislav

Upgrading from MPC5777C to i.MX RT1170 Hello, After many happy years with the MPC55xx, 56xx and 57xx, I am looking for another MCU that I can use when the MPC5777C EOL approaches. For the moment, I do not intend to use the S32Kxx because I am not sure they outperform the MPC5777C when using their internal memories and it seems we would get much less performance from the QSPI interface than we currently get from the EBI. As I am looking for MCUs/MPUs with automotive qualification and automotive temperature range, the S32G family not an option for the moment. Thus, the automotive version of i.MX RT1170 looks a very interesting choice for us as it seems to combine a fast core with decent internal memory, automotive qualification and apparently good external interfaces. As I am contemplating acquiring a development board to start our evaluation, we have the following questions: - Is there any performance comparison between the i.MX family and the MPC? I suppose the core performance is much higher, but I would like to know if internal memory latencies are on par to make the M7 core run that much faster than a PowerPC one. - Is there any way for me to compare external RAM access latency between its SDRAM (assuming a 200MHz one) and sn asynchronous SRAM connected to the 66MHz EBI I have on the MPC5777C? - If I am to connect the processor to an FPGA (besides an external SDRAM), would it be more advisable to use the SEMC or the FlexSPI? While the reference manual mentions the FlexSPI as suitable for the task, we wonder if we could get better performance using a bus with a wider data path. - We took a quick look at the AN13264 and it looked like we would be able to use it as we use the MPC5777C (everything, starting from boot, running bare-metal and M4 core disabled as we do not intend to use a secondary core). Can we assume that booting the i.MX RT1170 is similar to booting the MPC5777C (in the sense that no RTOS is needed and all configurations can be done directly from the M7 core)? - Does it have a good integration with Green Hills tools (compiler, debugger and probe V4) like the MPC5xxx do? Thanks! Best regards, Ricardo Re: Upgrading from MPC5777C to i.MX RT1170 Unfortunately, we don’t have a direct comparison between the two families however on this application note you can get a reference on the memories performance on RT AN12437: i.MX RT Series Performance Optimization – Application Note (nxp.com) I will send you more detailed information for the specific RT1170. Both modules can connect to an FPGA, the decision on which to use will depend on your application requirements. RT1170 can run on the single M7 core as bare-metal, no need for OS to boot.  For the Green Hills integration, I suggest you contact Green Hills directly or your distributor for more detailed information on this. Best regards, Omar

fs23 Lin mode swith question Hello, We encountered a question while debugging the FS LIN functionality. Specifically, we found that in debug mode, we cannot set the LINTRCV_FS23_TRCVMODE_OFF mode using the LinTrcv_fs23_SetMode() function. The code snippet is as follows: Std_ReturnType LinTrcv_fs23_SetMode(uint8 u8LinNetwork, LinTrcv_fs23_TrcvModeType eOpMode) { uint16 u16RegData = 0U; Std_ReturnType eStatus; LinTrcv_fs23_TrcvModeType eNewHwOpMode = LINTRCV_FS23_TRCVMODE_INVALID; /* Read M_LIN register. */ eStatus = Sbc_fs23_ReadRegister(SBC_FS23_M_LIN_ADDR, &u16RegData); if ((Std_ReturnType)E_OK == eStatus) { /* Set new register value. */ u16RegData &= ~(SBC_FS23_M_LIN_MODE_MASK | SBC_FS23_M_LIN_SLOPE_MASK| SBC_FS23_M_LIN_FS_DIS_MASK); if(TRUE == xG_drivers[u8LinNetwork].bLinSlowSlope) { u16RegData |= SBC_FS23_M_LIN_SLOPE_SLOW; } if(FALSE == xG_drivers[u8LinNetwork].bLinFailsafeDisable) { u16RegData |= SBC_FS23_M_LIN_FS_DIS_KEEP; } u16RegData |= ((uint16)eOpMode << SBC_FS23_M_LIN_MODE_SHIFT); eStatus = Sbc_fs23_WriteRegister(SBC_FS23_M_LIN_ADDR, u16RegData); .... /*Check the real hardware state*/ eStatus |= LinTrcv_fs23_GetMode(u8LinNetwork, &eNewHwOpMode); if((eNewHwOpMode == eOpMode) && ((Std_ReturnType)E_OK == eStatus)) { eStatus = (Std_ReturnType)E_OK; } else { eStatus = (Std_ReturnType)E_NOT_OK; } } return eStatus; } The eOpMode is LINTRCV_FS23_TRCVMODE_OFF,  the eNewHwOpMode  is LINTRCV_FS23_TRCVMODE_NORMAL. The manual states that in debug mode, LIN defaults to active mode. Is this behavior normal? Thanks! Re: fs23 Lin mode swith question Hi @gumu , I got confirmation from hardware team that it's a normal behaviour. In debug mode, the transceiver mode is forced ACTIVE. So even if you try and change the LIN_MODE field to OFFLINE (OFF, 2b00) then the transceiver stays in active mode. Re: fs23 Lin mode swith question Hi, I have to check with hardware team. Can you please let me know what version of FS23 that you have? Or what is the part number? Re: fs23 Lin mode swith question Hi Quang (@quangvuanh), Could you please help with this question from Anhui Zhitu Technology China? Thanks & BRs, Tomas

より大きなシステムの一部としてのNNモデル - eIQ、Glowによるビルドプロセス こんにちは、eIQ + Glowなどのサードパーティベンダーの最適化により、複雑なシステムをAIモデルで強化することはどのように可能になるのか疑問に思います。私が理解した限りでは、これらは*推論*中にモデルとCPUの使用率を最適化するだけです。精度を達成するために必要な残りのモジュール、たとえば、データの前処理、特徴エンジニアリングは、グロービルドにこれらのステップを含める必要がある場合、手書きの方法でC言語で個別に記述する必要があります。では、これらの前処理ステップには最適化はありませんよね? さらに大局的に見ると、おそらくすでに独自のビルドプロセスを持っている複雑なシステムでは、Glow eccからHWへの最適化を活用できませんよね?「複雑な」システム全体に対して 1 つのビルド プロセスのみが存在する必要があります。

Why did the FreeRTOS task have problems when using one of the cores in the dual-core project for ENE Dear NXP community At present, MPC5748G is used for dual-core development, in which the core of Z4_0 is used for ENET development, and FreeRTOS is used. The core of Z4_1 is not used for now, and it may be used for USB development in the future. Now, the ENET1 project file used normally in the single-core project is transplanted to the Z4_0 core of the dual-core project. When scheduling FreeRTOS, it does not enter the first task normally. Why is this? Also, if you enter an interrupt like IVOR1_Handler, is there a way to lock down why you entered it? Thank you very much for your help in solving this problem H-chips These three screenshots are the result of three single steps. MPC5748G-GW-RDB  Re: Why did the FreeRTOS task have problems when using one of the cores in the dual-core project for Hi, Lukas Thanks for your help, I found that the problem appears in the address setting of different cores wrong, and there are some problems in the stack size setting. Regards, H-chips Re: Why did the FreeRTOS task have problems when using one of the cores in the dual-core project for Hi @H-chips  it looks like wrong address is used here: If you step the code in asm and if you check the core registers, you should see which address is used. It is also possible to check the core registers related to IVOR1 when the exception is triggered after this access: This can be found in section "5.7.2 Machine Check Interrupt (IVOR1)" in: https://www.nxp.com/webapp/Download?colCode=E200Z4RM Regards, Lukas Re: Why did the FreeRTOS task have problems when using one of the cores in the dual-core project for Thanks for the answer, but only one of my two cores uses FreeRTOS, so SMP is not involved Re: Why did the FreeRTOS task have problems when using one of the cores in the dual-core project for Hi, did you check if the version of FreeRTOS you use supports symmetric multiprocessing (SMP)? Symmetric Multiprocessing (SMP) with FreeRTOS - FreeRTOS™ There exist also quite good ports for other CPU and older FreeRTOS which you can use as draft, I know at least one for a dual-core from a different chip manufacturer. Best regards, Rainer

Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 Downloading S32_SDK_S32K1xx_RTM_4.0.3 in s32ds will give an error,If downloaded offline, S32_SDK_S32K1xx_RTM_4.0.3 cannot be found in the official website Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 Some companies' IT restricts http access, so it is recommended to change Available S32DS Software Sites to https. Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 So now I have returned s32ds 3.4, but can not find S32_SDK_S32K1xx_RTM_4.0.3 Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 Do not use S32K1 SDK with S32DS v3.5. According to the currently available information, we don’t have any plan to integrate S32SDK S32K1XX 4.0.3 into S32DS 3.5 or above version. Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 I want to open the project created by old version s32ds3.4+S32_SDK_S32K1xx_RTM_4.0.3, I tried s32ds 3.5 does not work with old version project Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3  Extensions and Updates install the S32 SDK for S32K1xx RTM 4.0.3 in S32DS 3.4.Prompts installation failure, like the first image，S32K1xx development package only S32K1 SDK 4.0.2，There is no S32 SDK for S32K1xx RTM 4.0.3 Re: Where can I find it?S32_SDK_S32K1xx_RTM_4.0.3 Hi You should be able to use Extensions and Updates install the S32 SDK for S32K1xx RTM 4.0.3 in S32DS 3.4. If the online installation fails, please install the S32K1xx development package first, and then install S32SDK S32K1XX RTM 4.0.3.  Sorry, there is no offline installation package for S32K1 SDK 4.0.3. By the way, it is recommended to install the latest S32K1 RTD 2.0.x by refer to HOWTO: offline install S32K1 RTD 2.0.0 in S32DS v3.5   Best Regards, Robin ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------

K32W061/JN5189: Thread support for ‘Enhanced Frame Pending' (EFP)? Which version of Thread is supported by the current NXP SDK (v2.6.13)? I'm asking because we want to use the Enhanced Frame Pending (EFP) feature introduced in Thread v1.2. If already supported by the SDK, then how do we activate this feature? Re: K32W061/JN5189: Thread support for ‘Enhanced Frame Pending' (EFP)? Hello, Hope you are doing well. The OpenThread middleware is not included on the SDK. You need to get it from the GitHub - NXP/ot-nxp: OpenThread on NXP examples. Please check the information of each release directly: Releases · NXP/ot-nxp · GitHub Regards, Ricardo

S32G3 - HSE FW Install directly without IVT Hello, My goal is to be able to flash the HSE and then test the crypto services. I need to flash the HSE directly using the Lauterbach debugger without the need to flash/create an IVT. When i tried to directly flash the bin/hex file of the HSE, i find that the dedicated area for the HSE is not accessible (??s in T32 window) -> Address 0x22000000 Is there a way to enable the HSE memory area (maybe with a cmm script) so that i can flash it accordingly? Thank you, Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA,  I'm glad to know that the information answers your question. Thanks for letting me know and thanks for accepting my reply as a solution. Best regards, Alejandro Re: S32G3 - HSE FW Install directly without IVT Hello @alejandro_e ,  Yes actually that answers my question.  I was just wondering if there was a way to access the HSE directly, but now i just have to flash it with a blob image as mentioned in the documentation. Thank You,  Sahar Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA, It is not possible to access HSE memory, as you can see in the memory map attached to the S32G3 Reference manual: The steps I mentioned before will help you debugging your HSE application, but you cannot write the HSE FW directly like it is done in the S32K microcontrollers. Let me know if this information answers your questions. Re: S32G3 - HSE FW Install directly without IVT Hello @alejandro_e ,  From what i understand, we can boot the board either from RAM or from QSPI. Booting from QSPI needs a blob image, such that the HSE and Application would then be loaded to the RAM. The other way is flashing directly to the RAM using a debugger, which I'm currently doing.  For the Application, i can directly flash it with the debugger in the desired memory address. But for the HSE, the memory region is not accessible by the debugger. so i guess the HSE partition starting address 0x22000000 needs to be enabled somehow, like with a cmm script enabling the clock or something. I saw some other ways where the HSE can be flashed without the IVT but on other targets like the DCF options in S32K, so i'm wondering if there is a similar way but for S32G3 Thank You, Sahar. Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA, If I understood your problem correctly, you should be able to load and debug an application using the crypto services following the instructions in  AN14070 - How to Run HSE Demo Application, please check section How to load the HSE demo .elf to the SRAM. Let me know if this information solves your problem. Best regards, Alejandro

S32G3 - 无需 IVT 直接安装 HSE FW 您好，我的目标是能够刷新 HSE，然后测试加密服务。 我需要使用 Lauterbach 调试器直接刷新 HSE，而无需刷新/创建 IVT。 当我尝试直接刷新 HSE 的 bin/hex 文件时，我发现无法访问 HSE 的专用区域（在 T32 窗口中）-> 地址 0x22000000 有没有办法启用 HSE 内存区域（也许使用 cmm 脚本）以便我可以相应地刷新它？ 谢谢！

s32K118 Emulated EEPROM Testing with the debugger Hello, I am testing emulated EEPROM functionality on S32K118 eval board. While testing it with the on board debugger, every time I flash the new firmware I assum that it erases all flash sections so EEPROM Area is cleared as well. Is there way to keep Emulated EEPROM area while flashing the firmware (with debugger)? Re: s32K118 Emulated EEPROM Testing with the debugger Hi@zubizeratta you can refer to this post https://community.nxp.com/t5/S32-Design-Studio/How-to-disable-quot-erase-all-data-quot-option-before-flashing/td-p/915417

使用S32k146的定制硬件上的闪存问题 大家好， 我在定制的车辆控制单元上使用 S32k146 微机，编写了一个应用程序代码，我使用 S32Design Studio for ARM 软件上的 RAM 调试对其进行了调试，该应用程序代码是基于 S3k14x EAR SDK v0.8.6 的 Hello World 示例代码的默认设置构建的。我完成了代码编写，并使用 RAM 调试成功对其进行了测试/调试，但是当我想使用闪存进行调试时，出现了如下所示的错误。我用于调试的硬件是 Jlink。有人可以评估错误并帮助我如何才能成功使用 flash SEGGER J-Link GDB Server V7.94c Command Line Version JLinkARM.dll V7.94c (DLL compiled Jan 3 2024 15:20:10) Command line: -if swd -device S32K146 -endian little -speed 1000 -port 2331 -swoport 2332 -telnetport 2333 -vd -ir -localhostonly 1 -singlerun -strict -timeout 0 -nogui -----GDB Server start settings----- GDBInit file: none GDB Server Listening port: 2331 SWO raw output listening port: 2332 Terminal I/O port: 2333 Accept remote connection: localhost only Generate logfile: off Verify download: on Init regs on start: on Silent mode: off Single run mode: on Target connection timeout: 0 ms ------J-Link related settings------ J-Link Host interface: USB J-Link script: none J-Link settings file: none ------Target related settings------ Target device: S32K146 Target device parameters: none Target interface: SWD Target interface speed: 1000kHz Target endian: little Connecting to J-Link... J-Link is connected. Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46 Hardware: V8.00 Feature(s): RDI,FlashDL,FlashBP,JFlash,GDB Checking target voltage... Target voltage: 3.29 V Listening on TCP/IP port 2331 Connecting to target... Initializing CPU registers...Connected to target Waiting for GDB connection...Connected to 127.0.0.1 GDB client (conn. 988) requested target.xml from GDB Server Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000 Read register 'r1' (4 bytes) from hardware: 0x00000000 Read register 'r2' (4 bytes) from hardware: 0x00000000 Read register 'r3' (4 bytes) from hardware: 0x00000000 Read register 'r4' (4 bytes) from hardware: 0x00000000 Read register 'r5' (4 bytes) from hardware: 0x00000000 Read register 'r6' (4 bytes) from hardware: 0x00000000 Read register 'r7' (4 bytes) from hardware: 0x00000000 Read register 'r8' (4 bytes) from hardware: 0x00000000 Read register 'r9' (4 bytes) from hardware: 0x00000000 Read register 'r10' (4 bytes) from hardware: 0x00000000 Read register 'r11' (4 bytes) from hardware: 0x00000000 Read register 'r12' (4 bytes) from hardware: 0x00000000 Read register 'sp' (4 bytes) from hardware: 0x00000000 Read register 'lr' (4 bytes) from hardware: 0x00000000 Read register 'pc' (4 bytes) from hardware: 0x00000000 Read register 'xpsr' (4 bytes) from hardware: 0x00000001 Read 4 bytes @ address 0x00000000 (Data = 0xFFFFFFFF) Received monitor command: speed 1000 Target interface speed set to 1000 kHz Received monitor command: clrbp Received monitor command: reset Resetting target Received monitor command: halt Halting target CPU... ...Target halted (PC = 0xFFFFFFFE) Received monitor command: regs R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000 R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000 R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000 R12= 00000000, R13= FFFFFFFC, MSP= FFFFFFFC, PSP= 00000000 R14(LR) = FFFFFFFF, R15(PC) = FFFFFFFE XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000 CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00 Security extension regs: MSP_S = 00000000, MSPLIM_S = 00000000 PSP_S = 00000000, PSPLIM_S = 00000000 MSP_NS = FFFFFFFC, MSPLIM_NS = 00000000 PSP_NS = 00000000, PSPLIM_NS = 00000000 CONTROL_S 00, FAULTMASK_S 00, BASEPRI_S 00, PRIMASK_S 00 CONTROL_NS 00, FAULTMASK_NS 00, BASEPRI_NS 00, PRIMASK_NS 00 Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000 Read register 'r1' (4 bytes) from hardware: 0x00000000 Read register 'r2' (4 bytes) from hardware: 0x00000000 Read register 'r3' (4 bytes) from hardware: 0x00000000 Read register 'r4' (4 bytes) from hardware: 0x00000000 Read register 'r5' (4 bytes) from hardware: 0x00000000 Read register 'r6' (4 bytes) from hardware: 0x00000000 Read register 'r7' (4 bytes) from hardware: 0x00000000 Read register 'r8' (4 bytes) from hardware: 0x00000000 Read register 'r9' (4 bytes) from hardware: 0x00000000 Read register 'r10' (4 bytes) from hardware: 0x00000000 Read register 'r11' (4 bytes) from hardware: 0x00000000 Read register 'r12' (4 bytes) from hardware: 0x00000000 Read register 'sp' (4 bytes) from hardware: 0xFCFFFFFF Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF Read register 'pc' (4 bytes) from hardware: 0xFEFFFFFF Read register 'xpsr' (4 bytes) from hardware: 0x00000001 WARNING: Failed to read memory @ address 0xFFFFFFFE Received monitor command: speed auto Select auto target interface speed (2000 kHz) Received monitor command: flash breakpoints 1 Flash breakpoints enabled Received monitor command: semihosting enable Semi-hosting enabled (Handle on breakpoint instruction hit) Received monitor command: semihosting IOClient 1 Semihosting I/O set to TELNET Client Received monitor command: SWO DisableTarget 0xFFFFFFFF SWO disabled successfully. Received monitor command: SWO EnableTarget 0 0 0x1 0 ERROR: Failed to restore original RAM content after CPU clock frequency detection! Failed to enable SWO. Could not measure target CPU frequency. WARNING: Failed to read memory @ address 0xFFFFFFFE Downloading 1024 bytes @ address 0x00000000 - Verified OK Downloading 16 bytes @ address 0x00000400 - Verified OK Downloading 4096 bytes @ address 0x00000410 - Verified OK Downloading 4096 bytes @ address 0x00001410 - Verified OK Downloading 4096 bytes @ address 0x00002410 - Verified OK Downloading 4096 bytes @ address 0x00003410 - Verified OK Downloading 2752 bytes @ address 0x00004410 - Verified OK Downloading 4 bytes @ address 0x00004ED0 - Verified OK Downloading 4 bytes @ address 0x00004ED4 - Verified OK Downloading 3452 bytes @ address 0x00004ED8 - Verified OK Writing register 'pc' = 0x0000046C ERROR: Failed to preserve target RAM @ 0x1FFF0000-0x2000EFFF. Failed to prepare for programming. Cannot read register 16 (XPSR) while CPU is running Cannot read register 20 (CFBP) while CPU is running Cannot read register 0 (R0) while CPU is running Cannot read register 1 (R1) while CPU is running Cannot read register 2 (R2) while CPU is running Cannot read register 3 (R3) while CPU is running Cannot read register 4 (R4) while CPU is running Cannot read register 5 (R5) while CPU is running Cannot read register 6 (R6) while CPU is running Cannot read register 7 (R7) while CPU is running Cannot read register 8 (R8) while CPU is running Cannot read register 9 (R9) while CPU is running Cannot read register 10 (R10) while CPU is running Cannot read register 11 (R11) while CPU is running Cannot read register 12 (R12) while CPU is running Cannot read register 14 (R14) while CPU is running Cannot read register 15 (R15) while CPU is running Cannot read register 17 (MSP) while CPU is running Cannot read register 18 (PSP) whi Read 4 bytes @ address 0x0000046C (Data = 0x00000000) Read 2 bytes @ address 0x00000854 (Data = 0x0000) WARNING: Failed to read memory @ address 0x00000854 Read 2 bytes @ address 0x000004F2 (Data = 0x0000) WARNING: Failed to read memory @ address 0x00000518 Read 2 bytes @ address 0x00000676 (Data = 0x0000) Read 2 bytes @ address 0x00000676 (Data = 0x0000) Read 2 bytes @ address 0x0000058A (Data = 0x0000) Read 2 bytes @ address 0x0000058A (Data = 0x0000) Received monitor command: clrbp Received monitor command: reset Resetting target Received monitor command: halt Halting target CPU... ...Target halted (PC = 0xFFFFFFFE) Read 2 bytes @ address 0x00000854 (Data = 0xFFFF) Read 2 bytes @ address 0x00000854 (Data = 0xFFFF) Read 2 bytes @ address 0x00000854 (Data = 0xFFFF) Received monitor command: regs R0 = 00000000, R1 = 00000000, R2 = 00000000, R3 = 00000000 R4 = 00000000, R5 = 00000000, R6 = 00000000, R7 = 00000000 R8 = 00000000, R9 = 00000000, R10= 00000000, R11= 00000000 R12= 00000000, R13= FFFFFFFC, MSP= FFFFFFFC, PSP= 00000000 R14(LR) = FFFFFFFF, R15(PC) = FFFFFFFE XPSR 01000000, APSR 00000000, EPSR 01000000, IPSR 00000000 CFBP 00000000, CONTROL 00, FAULTMASK 00, BASEPRI 00, PRIMASK 00 Security extension regs: MSP_S = 00000000, MSPLIM_S = 00000000 PSP_S = 00000000, PSPLIM_S = 00000000 MSP_NS = FFFFFFFC, MSPLIM_NS = 00000000 PSP_NS = 00000000, PSPLIM_NS = 00000000 CONTROL_S 00, FAULTMASK_S 00, BASEPRI_S 00, PRIMASK_S 00 CONTROL_NS 00, FAULTMASK_NS 00, BASEPRI_NS 00, PRIMASK_NS 00 Reading common registers: Read register 'r0' (4 bytes) from hardware: 0x00000000 Read register 'r1' (4 bytes) from hardware: 0x00000000 Read register 'r2' (4 bytes) from hardware: 0x00000000 Read register 'r3' (4 bytes) from hardware: 0x00000000 Read register 'r4' (4 bytes) from hardware: 0x00000000 Read register 'r5' (4 bytes) from hardware: 0x00000000 Read register 'r6' (4 bytes) from hardware: 0x00000000 Read register 'r7' (4 bytes) from hardware: 0x00000000 Read register 'r8' (4 bytes) from hardware: 0x00000000 Read register 'r9' (4 bytes) from hardware: 0x00000000 Read register 'r10' (4 bytes) from hardware: 0x00000000 Read register 'r11' (4 bytes) from hardware: 0x00000000 Read register 'r12' (4 bytes) from hardware: 0x00000000 Read register 'sp' (4 bytes) from hardware: 0xFCFFFFFF Read register 'lr' (4 bytes) from hardware: 0xFFFFFFFF Read register 'pc' (4 bytes) from hardware: 0xFEFFFFFF Read register 'xpsr' (4 bytes) from hardware: 0x00000001 WARNING: Failed to read memory @ address 0xFFFFFFFE Setting breakpoint @ address 0x00000854, Kind = 2, Type = THUMB, BPHandle = 0x0001 Starting target CPU... Debugger requested to halt target... Reading common registers: ERROR: Cannot read register 0 (R0) while CPU is running Read register 'r0' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 1 (R1) while CPU is running Read register 'r1' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 2 (R2) while CPU is running Read register 'r2' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 3 (R3) while CPU is running Read register 'r3' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 4 (R4) while CPU is running Read register 'r4' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 5 (R5) while CPU is running Read register 'r5' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 6 (R6) while CPU is running Read register 'r6' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 7 (R7) while CPU is running Read register 'r7' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 8 (R8) while CPU is running Read register 'r8' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 9 (R9) while CPU is running Read register 'r9' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 10 (R10) while CPU is running Read register 'r10' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 11 (R11) while CPU is running Read register 'r11' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 12 (R12) while CPU is running Read register 'r12' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 13 (R13) while CPU is running Read register 'sp' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 14 (R14) while CPU is running Read register 'lr' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 15 (R15) while CPU is running Read register 'pc' (4 bytes) from hardware: 0xEFBEADDE ERROR: Cannot read register 16 (XPSR) while CPU is running Read register 'xpsr' (4 bytes) from hardware: 0xEFBEADDE WARNING: Failed to read memory @ address 0xDEADBEEE Removing breakpoint @ address 0x00000854, Size = 2 Starting target CPU... 回复：使用S32k146的定制硬件上的闪存问题 就我而言，问题是由基于 S32K144 MCU 的定制硬件引起的。我们的设置中有一个 FS2303 SBC，它每 0.7 秒重置一次——更多详情请参阅我同事的帖子——S32K144 + FS2303 SBC 重置未发布 - NXP 社区。移除 SBC 并直接给 MCU 供电后，调试器工作正常。

XTALI/XTALO公差 i.MX RT1050のデータシート(消費者製品用RT1050クロスオーバープロセッサデータシート、Rev.2、2021年3月 i.MX 16ページ)には、XTALI/XTALOについて次のように記載されています。 このクロックをUSBの基準として使用する場合、厳密な周波数許容誤差とジッターがあります 必要条件。詳細については、OSC24Mの章および関連するインターフェース仕様の章を参照してください。 GW開発ガイドのリファレンスマニュアルであるデータシートに関する情報が見つかりません。 どなたかこの情報を提供していただけますか? 日時:XTALI / XTALO公差 迅速な返信ありがとうございます! 日時:XTALI / XTALO公差 これは以前のバージョンのHW開発ガイドで言及されていましたが、さまざまなアプリケーションに固有の許容要件がある可能性があるため、削除されたと思います。 イーサネットには+-50ppmの精度が必要ですが、USBには+-100ppmの精度が必要ですが、これは4桁のRT用です。 よろしくお願いいたします オマル 日時:XTALI / XTALO公差 そしてもちろん、HW開発ガイドi.s.o.のことですか?GW開発ガイド

S32K3 - NXP RTOSのライセンスは何ですか? S32K3リファレンスソフトウェア-NXP RTOSのライセンスを問い合わせてもいいですか、商用利用は無料ですか?

imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hello Sir,     I have tested build latest yocto 6.6.3 BSP for imx6ullevk board, here are my steps: repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-nanbield -m imx-6.6.3-1.0.0.xml repo sync DISTRO=fsl-imx-xwayland MACHINE=imx6ull14x14evk source imx-setup-release.sh -b imx6ullevk-xwayland bitbake -k imx-image-full bitbake -k imx-image-full -c populate_sdk When I tried to bitbake -k imx-image-full -c populate_sdk, I encounter some bitbake fails like bellow: ERROR: Task (/home/researcher01/workspace/imx-yocto-bsp/sources/meta-qt6/recipes-qt/qt6/qtdatavis3d_git.bb:do_install) failed with exit code '1' ERROR: Task (/home/researcher01/workspace/imx-yocto-bsp/sources/meta-qt6/recipes-qt/qt6/qt3d_git.bb:do_install) failed with exit code '1' The 2 fail courses are same: Change Dir: '/home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qt3d/6.5.3/build' | | Run Build Command(s): ninja -v -j 16 install | ninja: error: unknown target 'install' | Change Dir: '/home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qtdatavis3d/6.5.3/build' | | Run Build Command(s): ninja -v -j 16 install | ninja: error: unknown target 'install' So I tried to bitbake them alternatively to see what happend, and I found the question: bitbake -k qt3d -c devshell cd ../build cmake ../git/ Skipping the build as the condition "QT_FEATURE_opengl AND NOT WASM" is not met. -- Configuring done (1.2s) -- Generating done (0.0s) -- Build files have been written to: /home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qt3d/6.5.3/build bitbake -k qtdatavis3d -c devshell cd ../build cmake ../git/ -- Could NOT find Qt6OpenGL (missing: Qt6OpenGL_DIR) CMake Warning at /home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qtdatavis3d/6.5.3/recipe-sysroot/usr/lib/cmake/Qt6/Qt6Config.cmake:224 (message): Failed to find optional Qt component "OpenGL". Expected Config file at "/home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qtdatavis3d/6.5.3/recipe-sysroot/usr/lib/cmake/Qt6OpenGL/Qt6OpenGLConfig.cmake" does NOT exist Call Stack (most recent call first): CMakeLists.txt:15 (find_package) Skipping the build as the condition "TARGET Qt::OpenGL" is not met. -- Configuring done (1.2s) -- Generating done (0.0s) -- Build files have been written to: /home/researcher01/workspace/imx-yocto-bsp/imx6ullevk-xwayland/tmp/work/cortexa7t2hf-neon-poky-linux-gnueabi/qtdatavis3d/6.5.3/build Both of these 2 receipes are not configured properly, However when I tried bitbake another board imx93-11x11-evk with the same bsp, these 2 receipes bitbake workflow works well and do not have the error above, I think there must be some missing configuration should be added to imx6ull bitbake workflow as imx93 does, I have been looking insight for days, comparing meta-imx and meta-freescale codebase, however I did not find any clear clue, please help! Best Regards! i.MX6UL Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP i.MX6ULL doesn't have GPU, for other imx6 chip has GPU, you don't need to add these two lines. So you need generate two SDKs, one support GPU,  one for chips like i.MX6ULL without GPU. And i don't shutdown GPU, these two lines just remove opengl flags when configure qt3d. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @Zhiming_Liu  Thank you very much for your reply. Is there any way not to shut down GPU? In product use, we need to use GPU to reduce the problem of high CPU usage caused by Qt program. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Temporary solutions for imx6 without GPU require conf/distro/poky.conf DISTRO = "imx-nxp" DISTRO_NAME = "NXP i.MX Release Distro" DISTRO_VERSION = "6.6-nanbield" DISTROOVERRIDES = "fsl" MAINTAINER = "NXP " POKY_DEFAULT_DISTRO_FEATURES:remove = "${POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE}" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE ?= "wayland" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx6-nxp-bsp ?= "wayland vulkan" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx7-nxp-bsp ?= "wayland vulkan" DISTRO_FEATURES:remove = "pulseaudio" POKY_DEFAULT_DISTRO_FEATURES:append = " ${POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND}" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND ?= "jailhouse" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx6-nxp-bsp ?= "" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx7-nxp-bsp ?= "" DISTRO_FEATURES:append:mx8-nxp-bsp = " virtualization" SKIP_META_VIRT_SANITY_CHECK = "1" SKIP_META_SECURITY_SANITY_CHECK = "1" SKIP_META_TPM_SANITY_CHECK = "1" # Set a more generic tuning for code reuse across parts DEFAULTTUNE:mx8-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8m-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8qm-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8x-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8ulp-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx9-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx91p-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx93-nxp-bsp ?= "armv8a-crc-crypto" PACKAGECONFIG:append:pn-gstreamer1.0-plugins-ugly = " x264" PACKAGECONFIG:append:pn-pulseaudio = " autospawn-for-root" PACKAGECONFIG:append:class-target:pn-qtquick3d = " examples" PACKAGECONFIG:append:class-target:pn-qtwebengine = " examples" PACKAGECONFIG:append:pn-systemd = " unmanaged-network" PACKAGECONFIG:append:mx93-nxp-bsp:pn-qtbase = " gles2" PACKAGECONFIG:remove:mx93-nxp-bsp:pn-qtbase = "no-opengl linuxfb" PACKAGECONFIG:append:mx6-nxp-bsp:pn-qtbase = " gles2" PACKAGECONFIG:remove:mx6-nxp-bsp:pn-qtbase = "no-opengl linuxfb" Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @2458332461  I am testing. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @Zhiming_Liu  Excuse me, is there any way to solve this problem, now the project needs to use Qt, but now linux6.6.3 can not get Qt cross-compilation chain. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @Zhiming_Liu  As you mentioned, I made the changes according to the picture, but when I executed the command "bitbake -k imx-image-full -c populate_sdk" 、 "bitbake -k imx-image-full"   ERROR: Task (/home/zmj/imx-yocto-bsp/sources/meta-qt6/recipes-qt/qt6/qtdatavis3d_git.bb:do_install) failed with exit code '1' ERROR: Task (/home/zmj/imx-yocto-bsp/sources/meta-qt6/recipes-qt/qt6/qt3d_git.bb:do_install) failed with exit code '1' zmj@ubuntu:~/imx-yocto-bsp/sources/meta-imx/meta-imx-sdk/conf/distro/include$ cat fsl-imx-base.inc_cp require conf/distro/poky.conf DISTRO = "imx-nxp" DISTRO_NAME = "NXP i.MX Release Distro" DISTRO_VERSION = "6.6-nanbield" DISTROOVERRIDES = "fsl" MAINTAINER = "NXP " POKY_DEFAULT_DISTRO_FEATURES:remove = "${POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE}" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE ?= "wayland" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx6-nxp-bsp ?= "wayland vulkan" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx7-nxp-bsp ?= "wayland vulkan" DISTRO_FEATURES:remove = "pulseaudio" POKY_DEFAULT_DISTRO_FEATURES:append = " ${POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND}" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND ?= "jailhouse" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx6-nxp-bsp ?= "" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx7-nxp-bsp ?= "" DISTRO_FEATURES:append:mx8-nxp-bsp = " virtualization" SKIP_META_VIRT_SANITY_CHECK = "1" SKIP_META_SECURITY_SANITY_CHECK = "1" SKIP_META_TPM_SANITY_CHECK = "1" # Set a more generic tuning for code reuse across parts DEFAULTTUNE:mx8-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8m-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8qm-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8x-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8ulp-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx9-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx91p-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx93-nxp-bsp ?= "armv8a-crc-crypto" PACKAGECONFIG:append:pn-gstreamer1.0-plugins-ugly = " x264" PACKAGECONFIG:append:pn-pulseaudio = " autospawn-for-root" PACKAGECONFIG:append:class-target:pn-qtquick3d = " examples" PACKAGECONFIG:append:class-target:pn-qtwebengine = " examples" PACKAGECONFIG:append:pn-systemd = " unmanaged-network" PACKAGECONFIG:append:mx93-nxp-bsp:pn-qtbase = " gles2" PACKAGECONFIG:remove:mx93-nxp-bsp:pn-qtbase = "no-opengl linuxfb" zmj@ubuntu:~/imx-yocto-bsp/sources/meta-imx/meta-imx-sdk/conf/distro/include$ cat fsl-imx-base.inc require conf/distro/poky.conf DISTRO = "imx-nxp" DISTRO_NAME = "NXP i.MX Release Distro" DISTRO_VERSION = "6.6-nanbield" DISTROOVERRIDES = "fsl" MAINTAINER = "NXP " POKY_DEFAULT_DISTRO_FEATURES:remove = "${POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE}" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE ?= "wayland" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx6-nxp-bsp ?= "wayland vulkan" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx7-nxp-bsp ?= "wayland vulkan" DISTRO_FEATURES:remove = "pulseaudio" POKY_DEFAULT_DISTRO_FEATURES:append = " ${POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND}" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND ?= "jailhouse" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx6-nxp-bsp ?= "" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx7-nxp-bsp ?= "" DISTRO_FEATURES:append:mx8-nxp-bsp = " virtualization" SKIP_META_VIRT_SANITY_CHECK = "1" SKIP_META_SECURITY_SANITY_CHECK = "1" SKIP_META_TPM_SANITY_CHECK = "1" # Set a more generic tuning for code reuse across parts DEFAULTTUNE:mx8-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8m-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8qm-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8x-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8ulp-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx9-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx91-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx93-nxp-bsp ?= "armv8a-crc-crypto" PACKAGECONFIG:append:pn-gstreamer1.0-plugins-ugly = " x264" PACKAGECONFIG:append:pn-pulseaudio = " autospawn-for-root" PACKAGECONFIG:append:class-target:pn-qtquick3d = " examples" PACKAGECONFIG:append:class-target:pn-qtwebengine = " examples" PACKAGECONFIG:append:pn-systemd = " unmanaged-network" PACKAGECONFIG:append:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_QTBASE_WAYLAND_APPEND}', '', d)}" PACKAGECONFIG:remove:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_QTBASE_WAYLAND_REMOVE}', '', d)}" PACKAGECONFIG_QTBASE_WAYLAND_APPEND = "" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE = "" PACKAGECONFIG_QTBASE_WAYLAND_APPEND:imx-nxp-bsp = " gles2 eglfs" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE:imx-nxp-bsp = "no-opengl linuxfb'" PACKAGECONFIG_QTBASE_WAYLAND_APPEND:imxgpu = "" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE:imxgpu = "" PACKAGECONFIG_GRAPHICS:remove:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE}', '', d)}" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE = "" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE:imx-nxp-bsp = "gl" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE:imxgpu = "" repo init -u https://github.com/nxp-imx/imx-manifest -b imx-linux-nanbield -m imx-6.6.3-1.0.0.xml repo sync DISTRO=fsl-imx-fb MACHINE=imx6ull14x14evk source imx-setup-release.sh -b imx-yocto-bsp bitbake -k imx-image-full -c populate_sdk Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP The previous patch is only for i.MX93. L6.6.23 will fix this issue for all platforms. For i.MX6ULL and other, need patch again. Please replace meta-imx-sdk/conf/distro/include/fsl-imx-base.inc with below content directly. Then reserve DISTRO_VERSION, this DISTRO_VERSION is for L6.6.23. require conf/distro/poky.conf DISTRO = "imx-nxp" DISTRO_NAME = "NXP i.MX Release Distro" DISTRO_VERSION = "6.6-scarthgap" DISTROOVERRIDES = "fsl" MAINTAINER = "NXP " POKY_DEFAULT_DISTRO_FEATURES:remove = "${POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE}" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE ?= "wayland" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx6-nxp-bsp ?= "wayland vulkan" POKY_DEFAULT_DISTRO_FEATURES_IMX_REMOVE:mx7-nxp-bsp ?= "wayland vulkan" DISTRO_FEATURES:remove = "pulseaudio" POKY_DEFAULT_DISTRO_FEATURES:append = " ${POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND}" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND ?= "jailhouse" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx6-nxp-bsp ?= "" POKY_DEFAULT_DISTRO_FEATURES_IMX_APPEND:mx7-nxp-bsp ?= "" DISTRO_FEATURES:append:mx8-nxp-bsp = " virtualization" SKIP_META_VIRT_SANITY_CHECK = "1" SKIP_META_SECURITY_SANITY_CHECK = "1" SKIP_META_TPM_SANITY_CHECK = "1" # Set a more generic tuning for code reuse across parts DEFAULTTUNE:mx8-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8m-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8qm-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8x-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx8ulp-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx9-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx91-nxp-bsp ?= "armv8a-crc-crypto" DEFAULTTUNE:mx93-nxp-bsp ?= "armv8a-crc-crypto" PACKAGECONFIG:append:pn-gstreamer1.0-plugins-ugly = " x264" PACKAGECONFIG:append:pn-pulseaudio = " autospawn-for-root" PACKAGECONFIG:append:class-target:pn-qtquick3d = " examples" PACKAGECONFIG:append:class-target:pn-qtwebengine = " examples" PACKAGECONFIG:append:pn-systemd = " unmanaged-network" PACKAGECONFIG:append:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_QTBASE_WAYLAND_APPEND}', '', d)}" PACKAGECONFIG:remove:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_QTBASE_WAYLAND_REMOVE}', '', d)}" PACKAGECONFIG_QTBASE_WAYLAND_APPEND = "" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE = "" PACKAGECONFIG_QTBASE_WAYLAND_APPEND:imx-nxp-bsp = " gles2 eglfs" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE:imx-nxp-bsp = "no-opengl linuxfb'" PACKAGECONFIG_QTBASE_WAYLAND_APPEND:imxgpu = "" PACKAGECONFIG_QTBASE_WAYLAND_REMOVE:imxgpu = "" PACKAGECONFIG_GRAPHICS:remove:pn-qtbase = \ "${@bb.utils.contains('DISTRO_FEATURES', 'wayland', '${PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE}', '', d)}" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE = "" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE:imx-nxp-bsp = "gl" PACKAGECONFIG_GRAPHICS_QTBASE_WAYLAND_REMOVE:imxgpu = "" Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi  @Zhiming_Liu  As you mentioned, I made the changes according to the picture, but when I executed the command "bitbake -k imx-image-full -c populate_sdk" or "bitbake -k imx-image-full", the error in the following picture would appear. Even using "bitbake-c cleanall qtdeclarative" does not resolve the error. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP If you are using i.MX93, you need modify below file The same issue about other i.MX product which doesn't support opengl will be fixed in next BSP. Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @zhimingqiu  I tried to do this but still got the same error generating the sdk phase.I think that approach is wrong, Two FAE in China also encountered the same problem     Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hii, Im compiling sdk for iMX93 Linux 6.1.22 and also i followed the same method that i have added those two lines in conf/local.conf file of my build folder but the error still exists. Below are the two errors error1 ====== ERROR: qtdatavis3d-6.5.0-r0 do_install: ExecutionError('/mnt/xvdb1/Maruti/PRHUZ/imx-yocto-bsp/build-imx93-sodimm/tmp/work/armv8a-poky-linux/qtdatavis3d/6.5.0-r0/temp/run.do_install.3523202', 1, None, None) ERROR: Logfile of failure stored in: /mnt/xvdb1/Maruti/PRHUZ/imx-yocto-bsp/build-imx93-sodimm/tmp/work/armv8a-poky-linux/qtdatavis3d/6.5.0-r0/temp/log.do_install.3523202 error2 ===== ERROR: Task (/mnt/xvdb1/Maruti/PRHUZ/imx-yocto-bsp/sources/meta-qt6/recipes-qt/qt6/qtdatavis3d_git.bb:do_install) failed with exit code '1' ERROR: qt3d-6.5.0-r0 do_install: ExecutionError('/mnt/xvdb1/Maruti/PRHUZ/imx-yocto-bsp/build-imx93-sodimm/tmp/work/armv8a-poky-linux/qt3d/6.5.0-r0/temp/run.do_install.3523275', 1, None, None) ERROR: Logfile of failure stored in: /mnt/xvdb1/Maruti/PRHUZ/imx-yocto-bsp/build-imx93-sodimm/tmp/work/armv8a-poky-linux/qt3d/6.5.0-r0/temp/log.do_install.3523275 Can you please suggest some better method. Thanks, Maruti Naik Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @2458332461  You can remove these packages in sdk and image. They require opengl. IMAGE_INSTALL:remove = "qt3d" TOOLCHAIN_TARGET_TASK:remove = "qt3d" Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hello Sir, Following your method of modification, this error still exists.   Re: imx6ull bitbake qt3d failed with latest yocto 6.6.3 BSP Hi @Nobita  This could relate to this flag, as i.MX93 has g2d, so 'no-opengl' flag will work. You can try to add it in PACKAGECONFIG_PLATFORM = ""

Guaranteed manufacturing lifetime When we first chose to use the mc9s12xep100 many years ago, part of that choice was based on a guaranteed availablility of supply of at least 15 years. 15 years has now passed, and I'm trying to check on if that has been updated - how much longer can I rely on the mc9s12xep100 being available for purchase as a current part? Re: Guaranteed manufacturing lifetime Dear Grant Kassell, Product Longevity | NXP Semiconductors   ... A Life status after defined period will still depends on the market. The last stage when ctm should be careful is Not Recommended for New Design (now it is good to contact Distributor if you still want to use them in future). followed by Last Order Date and finally End of Life.    Best regards, Ladislav  

[S32Z] VKMS for HSE-H/M firmware Hi NXP Team! I noticed that S32K has support for VKMS (vehicle key management system). See this post and the application note "an744410 - K3_SecurityWorkshop_VKMS__29Mar2022.pdf (1.0).pdf". Is VKMS (core) also available for the HSE-H/M firmware used for S32Z? Best regards, Philipp Sommer Re: [S32Z] VKMS for HSE-H/M firmware Hi, We understand that all S32Z/E related information is under control of distribution, for which we can recommend contacting your local NXP FAE/DFAE/representative. We do apologize for the inconvenience. Please, let us know. Re: [S32Z] VKMS for HSE-H/M firmware I think we can move this to S32Z2 - NXP Community

How to use PFE function of S32G-VNP-RDB3 (s32g399a) based on RTOS? We are developing S32G-VNP-RDB3 (s32g399a) based on RTOS. I know we need to use PFE to use more than one Ethernet port, but PFE requires a separate driver to be applied, and I don't know how to do that. To rephrase my question, it is as follows. 1. How to use PFE function in S32G-VNP-RDB3(s32g399a)? 2. is there any demo file for PFE's PTP and TIME Aware Shaper features? If anyone knows how to use it, please help me.... Please help... Re: How to use PFE function of S32G-VNP-RDB3 (s32g399a) based on RTOS? Hi ! Thank you very much for your response. about Q1 When I got the tresos from that page (link: S32G3 Safe and Secure Vehicle Network Processor | NXP Semiconductors), I could not get any confirmation regarding the license. Instead, I downloaded version 29 from the place where you can download different versions, checked the activation code, activated it, and am using it. About Q2 and Q3 I'm having trouble using and developing it due to the lack of documentation. I will try to check the related release notes. Thank you for your help. For additional questions, I will create a new session to ask. Re: How to use PFE function of S32G-VNP-RDB3 (s32g399a) based on RTOS? Hi, Below will be some comments on regards of your questions: Q1. Is it mandatory to use Tresos to use PFE FW? [DA]: We understand that the PFE MCAL driver is only to be used with EB Tresos. As for the license error, did you activate EB Tresos itself? Q2. Do you know any documentation explaining how to use PFE FW in S32 Design Studio? [DA]: At this moment, there is no up-to-date documentation for PFE MCAL under S32DS. We do apologize. Q3. Is PFE FW used in conjunction with PFE MCAL Driver? [DA]: We understand that there is indeed a requirement for PFE MCAL with PFE FW, since it details under the respective release notes that uses both RTD package and PFE FW. Please, let us know. Re: How to use PFE function of S32G-VNP-RDB3 (s32g399a) based on RTOS? I am very grateful for your response. I went to the site you told me about and downloaded the Dirver and Firmware for PFE, and I had additional questions in the process. Q1. Is it mandatory to use Tresos to use PFE FW?   Q1.1. I installed the PFE FW plugin from Tresos, but when I open it in Tresos, I get a license error like in the attached picture. Q2. Do you know any documentation explaining how to use PFE FW in S32 Design Studio? Q3. Is PFE FW used in conjunction with PFE MCAL Driver? Re: How to use PFE function of S32G-VNP-RDB3 (s32g399a) based on RTOS? Hi, On regards of PFE usage under the M7 core (which we assume is the one being used with RTOS), there is a PFE Driver for M7 MCAL, which should be available under the Automotive Software Package Manager inside the S32G3 product page (link: S32G3 Safe and Secure Vehicle Network Processor | NXP Semiconductors). The specific version needs to be paired with an specific version of RTD, which should be also available under the Automotive Software Package Manager. As for the specifics of being implemented with RTOS, we understand that the available examples do not use RTOS. As for the specific features, we understand that they are not implemented under the available examples. We do apologize. Please, let us know.

CAN Reception and transmission hi, For our application we are using CAN ISO 15765-2, to transmit and receive huge data , So ISO 15765-2 says that CAN ID is dependent on SOURCE AND TARGET address as below image frame format. Since addressing ISO 15765-2 format Both transmitter and receiver CAN ID will be the same. ECU CAN ID:0x08DA01F1 PC CAN ID:0x08DA01F1 I tried with above ID's loopback is happening, so due to this i am not able to receive data ecu to pc, how to overcome this scenario can we send and receive with a same CAN ID? If yes how ? @kerryzhou @diego_charles  Regards, Sandeep C Re: CAN Reception and transmission Great to here that! Re: CAN Reception and transmission Thank you, I found solution, it was problem with some blocking delay, address mapping issue. it resolved Thank you Re: CAN Reception and transmission Hi  @sandeepc  Thanks for your questions, I tried to understanding from my side, please correct me if something wrong. There is confusion about the connection between the CAN ISO 15765-2 standard and the following issues(loopback),  acutlly the CAN of MCU (RT product name?) can work in loopback mode and only MCU send and recevie by itself, so no any data will be received from PC. Would you please help give some block diagram to show how they are working? Thansk in advance. Have a nice day! Sam

GUIDER编译时出现这种错误 error: invalid storage class for function 'scrSetting1_btnClose_event_handler'是怎么回事？ GUI_GUIDER编译时出现以下错误，请问是什么原因造成的？ "Compiling C:/NXP/GUI-Guider-Projects/TSVWI_V1.7.2_240517/lvgl-simulator/../generated/events_init.c" C:/NXP/GUI-Guider-Projects/TSVWI_V1.7.2_240517/lvgl-simulator/../generated/events_init.c: In function 'scrSetting1_btnDigiENT_event_handler': C:/NXP/GUI-Guider-Projects/TSVWI_V1.7.2_240517/lvgl-simulator/../generated/events_init.c:6352:13: error: invalid storage class for function 'scrSetting1_btnClose_event_handler' 6352 | static void scrSetting1_btnClose_event_handler (lv_event_t *e) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ C:/NXP/GUI-Guider-Projects/TSVWI_V1.7.2_240517/lvgl-simulator/../generated/events_init.c:8067:1: error: expected declaration or statement at end of input 8067 | } | ^ Makefile:102: recipe for target 'build/object/generated/events_init.o' failed mingw32-make: *** [build/object/generated/events_init.o] Error 1 mingw32-make: *** Waiting for unfinished jobs.... 回复： GUIDER编译时出现这种错误 error: invalid storage class for function 'scrSetting1_btnClose_event_handler'是怎 原因找到了，有个事件函数里缺少了一个括号“}”。