RT1176远程升级遇到的问题 当我按照论坛中的另一个帖子（帖子链接在最后），进行远程升级时，我遇到了一个问题，在SBL文件的配置和生成过程是很顺利的，随后我使用MCUXpresso IDE生成了一个HELLO_WORLD APP，并且为这个APP生成了与SBL相匹配的头，按照教程我将APP通过NXP-MCUBootUtility烧写到0x30100000地址下，对板卡进行复位，SBL成功启动，并且能够引导APP程序，串口可以打印出HELLO信息 随后我尝试使用Keil生成一个HELLO_WORLD APP，并对这个APP配置了与上面相同的SBL头，并也将APP通过通过NXP-MCUBootUtility烧写到0x30100000地址下，对板卡进行复位，SBL成功启动，并且能够引导APP程序，但串口无任何打印信息 我认为这样的现象是SBL正常、且对于APP配置的头也正常，这样才能对APP进行正确的引导，但是APP内容或配置不正常，导致的无法正常输出打印信息 我对比了我用MCUXpresso编译APP时和用keil编译APP时的操作 对于MCUXpresso来说，我去掉了FCB头，并且配置了FLASH地址偏移到了0x30100400 对于Keil来说，我同样去掉了FCB头，并且配置了FLASH地址偏移到了0x30100400 但最后，keil生成出的bin加上引导头后，经过SBL引导，并不能成功打印出，但MCUXpresso的却可以成功打印，请帮忙看看是哪里出了问题，谢谢 PS：帖子链接如下 https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs-Knowledge/RT1170-SBL-ISP-download-SDRAM-APP/ta-p/1767982 i.MX-RT1170  Re: RT1176远程升级遇到的问题 非常感谢您的答复，按照您所说的，我修改了分散加载文件后，目前已经可以成功引导了，感谢！

sCheck 之后需要再次进行哪些初始化 你好，我发现在 s32k312 上执行 sCheck 之后必须再次调用 Platform_Init()，否则 intm 可能无法工作。我认为 sCheck 可能会更改检查的一些设置并保持不变。我是否应该调用所有初始化函数来重置外围设备？如Mcu_Init()、Mcl_Init()、Rm_Init()。

LPC5536 SDK 2.15.100 Ladies and Gentlemen, I'd like to inform You, that something is wrong with the SDK for LPC5536. Version 2.15.100 (today the newest) doesn't compile, when I create a whole new C project in MCUXpresso. I saw some error message during project creation, but I didn't make a screenshot. After the project succesfully created, there's a "virgin" source code which doesn't compile. Some includes are missing: stdio.h, pin_mux.h, LPC5536.h. Excuse me, I'm focusing on my own project, I couldn't make a deeper study to this failure. I tried to construct a new project more times, and I saw always the same symptom. With 2.14, it is OK, everything works properly. LPC55xx Re: LPC5536 SDK 2.15.100 Hello @Bela1  Thanks for your reporting. I created a new project based on MCUXpressso IDE v11.9.0, SDK2.15. Not find the issue after compile. I attached the steps. BR Alice

Boot T1022 from other locations in SPI NOR flash Hello All, I have a custom T1022 child board wherein the processor boots up from the uboot stored in SPI NOR Flash. I am planning to store multiple uboot(s) in the said NOR flash so that the processor boots up according to the parent board in which this child board is mounted. So my questions are: 1) Is it possible to do so? (Currently I have tried copying uboot between locations, but it is too slow) 2) As per the .cmm file, the uboot is always stored at location 0. Why is that? Can we change this location somewhere so that it asks the user for the uboot location? Any suggestions regarding this is welcome. Thanks and Regards, Souvik Re: Boot T1022 from other locations in SPI NOR flash You are welcome. Re: Boot T1022 from other locations in SPI NOR flash Ok. Thank you for your help. Re: Boot T1022 from other locations in SPI NOR flash Because you have to fetch different RCW from IFC NOR, you would have to manipulate the address lines going towards the IFC NOR. Example - IFC NOR is divided into virtual banks, and there is a logic with which we select a particular bank. you can go through the hardware design guide once for this. So you would need either a CPLD or an external controller that lets you switch the banks in the IFC NOR. So that different RCW present in different banks can be fetched by the PBL using that logic. So this needs a hardware design modification. Re: Boot T1022 from other locations in SPI NOR flash Investigating. Re: Boot T1022 from other locations in SPI NOR flash Ok . Thank you. I understood the way. Last question. How can we ensure that PBL fetches from a different location of the IFC NOR? I couldn't find any field wherein we set the fetching location. Re: Boot T1022 from other locations in SPI NOR flash you want to change the gpio and serdes configuration of child board right ? then you have to keep 3 different RCW on IFC NOR of child board. RCW is fetched by the PBL. Uboot comes later than the PBL stage so Uboot will not be able to handle this Re: Boot T1022 from other locations in SPI NOR flash Will back to you Re: Boot T1022 from other locations in SPI NOR flash In this case, we have to keep the IFC NOR FLASH on the parent boards instead of the child card. Am I correct? If we keep the NOR flash on the child card instead, how can we ensure that the RCW loads from different partitions? Can the partition locations be written on the uboot stored in SPI flash? Re: Boot T1022 from other locations in SPI NOR flash So here's what you would need :- RCW has the gpio and serdes configuration. So depending upon the 3 parent cards, you need 3 different RCW having the desired configuration. At power-on reset, PBL[Pre-bootloader] fetches this RCW from one of the desired non-volatile sources[IFC NOR, eSDHC,NAND flash] and loads this configuration. One of the possible solutions is to use IFC NOR as a source. IFC NOR would have 3 different RCWs present in 3 different memory partitions. The parent card has to be designed in such a way that when the child board is connected to Parent card A, the RCW gets fetched from partition A in the IFC NOR. when the child board is connected to Parent card B, the RCW gets fetched from partition B in the IFC NOR. similarly for the third Parent card. Re: Boot T1022 from other locations in SPI NOR flash Will discuss with the AE team. Re: Boot T1022 from other locations in SPI NOR flash When you say "you could load your image with that specific dtb.", do you mean that the parent cards keep their respective dtbs and when the processor boots up it loads the dtb stored in the parent card? If what I have understood is correct, this could be a possible solution alternative if the dtb is able to change the serdes configuration. In my case, consider a parent card A wherein we need the SRDS_PRTCL to be 0x86 and another parent card B wherein the SRDS_PRTCL is required to be 0x81 and we have a single processor child card. How can we ensure that the processor boots up as per the SRDS_PRTCLs for each board. In my opinion, dtb fetching starts after uboot has executed. But I need the uboot to be changed as per the parent card. Re: Boot T1022 from other locations in SPI NOR flash Can you not make 3 different device tree binaries that will have different gpio configurations depending upon the parent card? And when needed, you could load your image with that specific dtb. these 3 parent cards are built out of same application processor? Re: Boot T1022 from other locations in SPI NOR flash Got it. Re: Boot T1022 from other locations in SPI NOR flash Hello, I have designed a T processor child card. Currently, I have 3 different parent cards onto which this child card is to be mounted. Now, these 3 cards have different SRDS_PRTCL, different GPIO configurations, etc. I was thinking if we could by any change have a card-dependent boot-up instead of programming uboot multiple times whenever we change the parent board. Hence the requirement. Hope I am clear in my requirement. Thanks, Souvik Re: Boot T1022 from other locations in SPI NOR flash Please refer to the following update from the AE team. Regarding multiple Uboot(s) in the NOR flash. Can you please tell us a bit more about the requirement as to why you would need 2 Uboot in the NOR flash? "the processor boots up according to the parent board in which this child board is mounted" -- please elaborate on this. Re: Boot T1022 from other locations in SPI NOR flash I have escalated this case to the AE team, am waiting for the feedback from them now. Re: Boot T1022 from other locations in SPI NOR flash Hello, Any help with this?  Re: Boot T1022 from other locations in SPI NOR flash Discussing with the AE team.

EB Tresos activation failed Hello, I was trying to download and activate a copy of EB Tresos by using EB Client License Administrator V1.5.1 with the following activation code: 91F7-FFEF-9986-7233 (valid until 09/30/2024) as reported on the NXP website. Anyway the activation fails repeatedly, with the following error messages: ERROR: flxActAppActivationSend (50040,41147,10249) Unable to get lock: ELKB, CertificateQuantity, 195760501 Connection to FlexNet Operations Server failed. or, also: ERROR: flxActAppActivationSend (50040,41147,10248) The quantity specified exceeds maximum quantity allowed (0). Connection to FlexNet Operations Server failed. Could you please help me to understand what is going on? Other colleagues were able to insert that same code in the past days and activate the EB Tresos license successfully. Thanks. Kind Regards, Aldo #s32k3 #EBTresos Re: EB Tresos activation failed I'm having the same issue. With the B25C-AEBB-4319-BAB1 (valid until 06/30/2026) license . Re: EB Tresos activation failed I am having the same issue with the following error when trying to activate the EB Tresos license listed in the s32k3 standard software link: The quantity specified exceeds maximum quantity allowed (0). Connection to FlexNet Operations Server failed. Re: EB Tresos activation failed Hi， I also face this issue during active EB Tresos for S32K144. Could you PLS help me？ thanks Activating NodeLocked License AF8D-412B-31B4-C414, Number Of Licenses: 1 Status: 4, Creating request Status: 5, Request created Status: 6, Context created Status: 7, Connected to remote server Status: 8, Request Sent Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 10, Waiting for response Status: 9, Polling for response Status: 11, Done ERROR: flxActAppActivationSend (50040,41147,10248) The quantity specified exceeds maximum quantity allowed (0). Connection to FlexNet Operations Server failed. Re: EB Tresos activation failed me too Re: EB Tresos activation failed Hi,all:     Today,i refreshed the EB Tresos download screen, the key was updated, and then I reactivated it and it's now activated! Re: EB Tresos activation failed me too... Re: EB Tresos activation failed me too 回复： EB Tresos activation failed me too 回复： EB Tresos activation failed me too,And my offline activation also fails Re: EB Tresos activation failed Me too Re: EB Tresos activation failed me too Re: EB Tresos activation failed Me too Re: EB Tresos activation failed The quantity specified exceeds maximum quantity allowed (0). Re: EB Tresos activation failed The specified quantity exceeds the maximum quantity allowed (0). I also Re: EB Tresos activation failed Same issue appears: The specified quantity exceeds the maximum quantity allowed (0). Re: EB Tresos activation failed i'm have the same issue also now, have you resolute this problem?

SPDIF Rx Clock (SPDIF_SR_CLK) pulse rate I'm planning to use the SPDIF from the i.MX RT 1060. The reference manual (IMXRT1060RM.pdf) has the following explanation in 40.3.1.7: > After DPLL has locked, the pulses are generated, and the average pulse rate is 128 x the sampling frequency.(For a 44.1 Khz input sampling frequency, the average pulse rate = 128 x 44.1 Khz.) When the SPDIF input is 44100Hz, 88200Hz, or 176400Hz, I want to get an output of 22,579,200Hz. When the SPDIF input is 48000Hz, 96000Hz, or 19200Hz, I want to get an output of 22,579,200Hz. To achieve this I want to change the multiplier to x128. Is it possible to change the x128 magnification? Re: SPDIF Rx Clock (SPDIF_SR_CLK) pulse rate Hi @yoshida_satoru  Thank you for your interest in the NXP MIMXRT product, I would  like to provide service for you. As you mentioned in IMXRT1060RM reference manual, It describe "After DPLL has locked, the pulses are generated, and the average pulse rate is 128 x the sampling frequency." I don't think It is possible to change the x128 magnification. The SPDIF interface of  i.MX RT1060 chip is designed as a fixed multiplier of x128, and user can not be configured to use a different multiplier. Wish it helps you. If you still have question about it, please kindly let me know. BR mayliu

Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error HI,  I'm using erpc in a frdm board and found that opening the ERPC_MESSAGE_LOGGING macro reported an error. The attached image shows the detailed error message. MCXN Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello @yzs , You are welcome. If that reply answers your question, please click the "ACCEPT AS SOLUTION" button. Thank you! BRs, Celeste Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello, Thank you for answering that question. BRs, yzs Re: Using erpc in a frdmmcxn947, opening the ERPC_MESSAGE_LOGGING macro reported an error Hello @yzs , Thanks for letting us know about this issue.  I have indeed reproduced your issue. The `logMessage` function expects a parameter of the `MessageBuffer *` pointer type. However, the previous error message indicated that it was not possible to convert an ordinary `erpc::MessageBuffer` object into an `erpc::MessageBuffer*` pointer type. Therefore, the following workaround can be considered to solve this type mismatch problem: obtain a reference using the `getBufferRef` function and then pass the pointer by taking the address. The code modification is as follows: In erpc_client_manager.cpp: By modifying the above code, it can be compiled successfully. However, this approach may not be the optimal solution. I will submit a Jira ticket to the SW Team to further investigate this issue. Thanks again for your post. Have a nice day~ BRs, Celeste

Codewarrior Flash Programmer Icon Not coming in software Hi, I am using codewarrior Studio Qoirq LS series software to flash uboot on NOR flash, I am able to connect through code warrior TAP debugger but I am not able to use the flash programmer which is disabled in the software which I downloaded from NXP site. I have attached the JPEG image with red circle. I am not sure what I am missing here. Please help me. I am trying to flash the UBOOT(.PBL), combination of other binaries to Nor flash. red circle flash icon not workingred circle flash icon not working Thanks, Gopi Krishna M Re: Codewarrior Flash Programmer Icon Not coming in software Hi @gkrishna, Just to let you know that I working on your issue, When I have any update I will let you know Regards

i.mx93 jtag disable Hello, I'm starting evaluating i.mx93 board. I'd like to run WIN 10 IoT OS. I'm wondering what is the best way to disable JTAG in production. The result to achieve is that no one can estabilish a jtag connection and read memory. Is there a way to do so? Thanks. Evaluation Board Re: i.mx93 jtag disable Hi @marco95! No, all made for Windows 10 are something confidential due to the licenses that Windows has. If you need support to customize Windows 10 for your product should be under pro support. Sorry for the mistake! Best Regards! Chavira Re: i.mx93 jtag disable Hello, is there a guide explaining how to set-up the "password based autenthication" for JTAGC? Re: i.mx93 jtag disable Hi @marco95! We have the next user guide for iMX Windows 10: https://www.nxp.com/docs/en/user-guide/IMXWGU.pdf Best Regards! Chavira Re: i.mx93 jtag disable Hello, you mean "i.MX 93 Applications Processir Security Reference Manual"? I attached an image of the description found. How can I get more about the description? Are there any resource example to get started? Thanks Re: i.mx93 jtag disable Hi @marco95! Thank you for contacting NXP Support! You can consult the iMX93 Secure Reference Manual in the chapter "Secure Debug" to consult the best way to protect the SOC. Best Regards! Chavira

There was an error during the import process of the S32K396 PWM example routine into EB I am getting an error message when attempting to import the S32K396 PWM example into EB. Could you please assist me in troubleshooting this issue? Re: There was an error during the import process of the S32K396 PWM example routine into EB Hi@qingwang_a This is a problem with your RTD version. For the new version, please read the “readme.text” in the DEMO project. You need to make some modifications. Re: There was an error during the import process of the S32K396 PWM example routine into EB I have already installed the latest eTPU library, but the installed version is ETPU_TS_T40D34M10I0R0, and the so-called ETPU_TS_T40D34M40I0R0 does not exist. I'm not sure if this is a bug in the ETPU library. @Senlent  Re: There was an error during the import process of the S32K396 PWM example routine into EB Hi@qingwang_a According to the error message, you need to install the eTPU library You can find eTPU library in the path below. https://nxp.flexnetoperations.com/control/frse/product?plneID=830607

How to Assign GPIO and Clock for Bring-up Testing in S32K314 Hello, I am using the S32K314 MCU, and I would like to assign clocks and GPIOs for bring-up testing. However, I want to achieve this by writing code, without using the configurator. Most of the reference documents I’ve found rely on the configurator to generate the code. Do you have any sample code that simply checks GPIO IN/OUT? Or is there any tutorial available for resolving this? Thank you. Re: How to Assign GPIO and Clock for Bring-up Testing in S32K314 thank you! Re: How to Assign GPIO and Clock for Bring-up Testing in S32K314 Hi @malove  Check the following community thread and training presentation. There is information related to this topic that may be useful to you. How to switch clock source from FIRC to PLL_PHI0 for S32K3?  S32K3xx Pins and Clocks with RTD - Training BR, VaneB

MCUXPresso Secure Provisioning Tool V5の「HAB Closed」オプション 「HABオープン/クローズ」設定が何をするのかを理解しようとしています。「Closed, HAB Enabled」設定では、HAB は常に署名付きイメージを要求するように強制されますか?ROMブートローダは常に実行されるように強制されますか?

s32kでSOGとはどういう意味ですか? 私はs32kのデータシートを読んでいます、 そして、SOGというブロックを1つ見つけました。 しかし、説明はありません。 教えていただけますか? どうもありがとうございました! Re:s32kでSOGとはどういう意味ですか? ありがとうございます~ 私は多くのことを学ぶべきだと思います- -

Unified Bootloader for S12ZVLA128 Hello NXP Community, I am currently working on a project involving the S12ZVLA128 microcontroller, and I am looking for more details about the Unified Bootloader, specifically regarding the flash loader part. From my understanding, the bootloader receives the flash loader through UDS (Unified Diagnostic Services). However, I would like to know if there are any configurations or options that would allow me to use a flash loader that is directly loaded into the flash memory, rather than receiving it via UDS. Could you please provide some guidance or documentation on how to configure the bootloader for this scenario? Any example configurations or references would be greatly appreciated. Thank you for your assistance! Re: Unified Bootloader for S12ZVLA128 Hello @MassimilianoPegaso, I’m sorry to say that Unified bootloader shared on the community is a demo only provided AS IS with no guarantees and no support. Currently we do not have resources to support this demo. We apologize for the inconvenience. https://community.nxp.com/t5/S32K-Knowledge-Base/Unified-bootloader-Demo/ta-p/1423099 BR, Daniel

T2081 SD card boot Hi,   We have a custom board using T2081. We are trying to bring up the board using SD card. As given in document, we prepared the SD card with RCW, uboot-spl and u-boot. We are unable to progress because what we think SD card is not responding. We see activity on CMD line but not much beyond that. In order to debug this we plan to run uboot-spl in SRAM and the full u-boot from SD card. Can you let us know how to do this especially u-boot-spl from SRAM. We searched various forums and documents, but we did not get enough information. Re: T2081 SD card boot If configuring the target board to fetch RCW from SD card first, then run CodeWarrior SRAM project successfully(without using JTAG configuration file overriding RCW function), it means there is no problem to fetch RCW from SD card now. Probably you need to use CodeWarrior to debug SD u-boot, please refer to the following application note. https://community.nxp.com/t5/CodeWarrior-Development-Tools/CodeWarrior-U-Boot-Debugging/ta-p/1121398 Re: T2081 SD card boot Hii Yipingwang, below attached image  is of schematics, connecting buffer to SD card . Re: T2081 SD card boot Hii Yipingwang, I’m currently working on configuring my target board to fetch the RCW from an SD card. I’ve successfully created a SRAM project in CodeWarrior, and it runs without issues. However, I’m having trouble when attempting to boot from the SD card. after buffer we placed a pullup resistor on sd_clk with 10k(resistor value) Observations: I inserted the SD card into the board and monitored the sd_clk line before and after the buffer, as well as the sd_data0 line. Here are the details of the buffer I’m using: Part Number: MAX13035EETE+T. for your reference below i am attaching images is there any modifications needed please suggest. Re: T2081 SD card boot First, please configure the target board fetching RCW from SD card. Then use CodeWarrior to create a SRAM project and check whether this CodeWarrior SRAM project can run successfully. Use this method, you can verify whether RCW deployed in SD card is correct.

Hardfault handler exception The jumptouserapplication() function is going to hardfault handler in NXP Kinetis Bootloader 2.0.0 Tried debugging but couldnt resolve. Kindly help Kinetis L Series MCUs Re: Hardfault handler exception Set the application start address in flash in MCU settings which resolved the issue Re: Hardfault handler exception Hello, my name is Pavel, and I will be supporting your case, but I´m following your 3 cases, I will continue this in the internal where you upload some images. Best regards, Pavel

LLCE CAN Controller can not be working in LLCE_CAN_STARTED but is always in LLCE_CAN_START_PENDING I am integrating LLCE  1.0.8 on s32g274a device with SW32G_RTD_4.4_4.0.2_P03，but have encountered a problem：after firmware was loaded and started successfully, then Can_43_LLCE_Init was  running ok and the state Can_43_LLCE_eDriverStatus  came to be CAN_43_LLCE_READY,  when Can_43_LLCE_SetControllerMode was called with parameter CAN_CS_STARTED, the firmware executed the cmd LLCE_CAN_CMD_GETCONTROLLERMODE successfully, then Can_Llce_GetControllerMode was called and firmware returned LLCE_FW_SUCCESS, but the returned controller state was always LLCE_CAN_START_PENDING,  I'm not sure what was wrong, so I want to get some useful solutions Re: LLCE CAN Controller can not be working in LLCE_CAN_STARTED but is always in LLCE_CAN_START_PEND Hi, Thanks for your feedback. As for the questions: it's required that the llce can controller have to be connected to the can tranceiver which was be enabled correctly in order to get the CAN bus voltage levels,  is that right ? That is correct. This is a HW requirement by the CAN standard itself, the following is shown under the Integration Manual for LLCE-CAN: "The CAN physical interface should be connected to the CAN-LLCE module pins in order to get the CAN bus voltage levels. There has to be at least another CAN node present on the CAN bus in order to get the CAN bus synchronized." Please, let us know. Re: LLCE CAN Controller can not be working in LLCE_CAN_STARTED but is always in LLCE_CAN_START_PEND Thanks, I'm using a custom board and our custom application, but configures the llce can by referring to the llce_sample_app_af examples, now I have resolved this problem, it was caused by the can timeout parameters: (Can Timeout Method) and (Can Timeout Duration)； On our custom board, the llce_can0 and llce_can2 hardware channel doesn't work without can transceiver attached, but llce_can1 and llce_can3 is working normally with TJA1403 being enabled correctly; In our costom application, (Can Timeout Method) and (Can Timeout Duration)  was set with OSIF_COUNTER_DUMMY and 65，during firstly enabling llce_can0 ,application was always looping with calling Can_Llce_MainFunctionMode, but after (Can Timeout Method) and (Can Timeout Duration)  was set with OSIF_COUNTER_DUMMY and 0.1, enabling llce_can0 to llce_can3  was normal, and only llce_can1 and llce_can3 were started successfully. Referring to  5.3 Peripheral Hardware Requirements  of the Integration Manual, it's required that the llce can controller have to be connected to the can tranceiver which was be enabled correctly in order to get the CAN bus voltage levels,  is that right ? Re: LLCE CAN Controller can not be working in LLCE_CAN_STARTED but is always in LLCE_CAN_START_PEND Hi, Is this a custom board? Or is this with an NXP reference board? Also, are you using any NXP examples? Or is this a custom application? We are not able to see the behavior you are describing. Can you share images of the behavior you are seeing? Please, let us know.

Register access protection Hello, Regarding access protection registers (PCNS, PCNP, ICNS, and ICNP) for the MCX A microcontroller, they are mentioned in the user manual, but not described. Would it be available a description for these registers? Thanks! MCXA Re: Register access protection OK. Thanks! Re: Register access protection Hello JosG, Update: As TrustZone is not present on this device, these registers are not used. We will request to correct RM Thanks, Jun Zhang

nxpimage: how to accept input file on command line instead of config entry Hi, .bd file has the following entry: sources { elfFile = extern(0); } doing this nxpimage expects the name of the input file on the command line. How can I achieve the same behavior using .yaml files? regards Max Re: nxpimage: how to accept input file on command line instead of config entry Hi @mastupristi , The nxpimage -> hab application supports both bd files and YAML configuration files. The bd file support is primarily intended as a backward compatibility solution for customers transitioning from elftosb to spsdk. I recommend using YAML configurations, as this is the standard format across all spsdk applications. Unfortunately, passing the input image via the command line when using YAML configuration is not currently supported. However, we are exploring the possibility of allowing users to override any configuration parameter across all spsdk applications. If implemented, this would enable you to specify the elfFile as a command line parameter when using a YAML file. Please note that this feature has not yet been developed. Let me know if you need any further adjustments!

LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard Hello to NXP Community,  i am trying to Bring-up  Digiwise's 13-070WMLBIAG1- C  7" display with TechNexion EDM-G-IMX8MM and WB baseboard  custom board.  The changes i did in .dts and panel-simple.c as per datasheet mentioned here. The source code is Android - 11 by https://github.com/technexion-android/. DTS file : ... / dts/freescale/overlays/imx8mm-edm-g-wb-sn65dsi84-vl10112880-overlay.dts fragment@1 { target = <&mipi_dsi>; __overlay__ { status = "okay"; #address-cells = <1>; #size-cells = <0>; panel@0 { reg = <0>; compatible = "tn,dsi2lvds-panel"; backlight = <&lvds_backlight>; power-supply = <&reg_lvds_pwr>; dsi,flags = <0x0007>; dsi,format = <2>; dsi,lanes = <4>; panel-width-mm = <152>; panel-height-mm = <91>; bus-format = <0x1009>; /* MEDIA_BUS_FMT_RGB666_1X18 */ bus-flags = <1>; refresh-rate = <60>; rotate = <0>; /* horz-flip; */ /* vert-flip; */ panel-timing { clock-frequency = <33300000>; hactive = <800>; vactive = <480>; hfront-porch = <204>; hsync-len = <6>; hback-porch = <46>; vfront-porch = <22>; vsync-len = <3>; vback-porch = <23>; /* flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH */ vsync-active = <1>; hsync-active = <1>; }; }; }; };   And in .... / drivers/gpu/drm/panel/panel-simple.c static const struct display_timing dsi2lvds_panel_timing = { .pixelclock = { 26400000, 33300000, 46800000}, .hactive = { 800, 800, 800}, .hfront_porch = { 16, 204, 354 }, .hback_porch = { 46, 46, 46 }, .hsync_len = { 1, 6, 40 }, .vactive = { 480, 480, 480 }, .vfront_porch = { 7, 22, 147 }, .vback_porch = { 23, 23, 23 }, .vsync_len = { 1, 3, 20 }, .flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH, }; /* * @modes: Pointer to array of fixed modes appropriate for this panel. If * only one mode then this can just be the address of this the mode. * NOTE: cannot be used with "timings" and also if this is specified * then you cannot override the mode in the device tree. * @num_modes: Number of elements in modes array. * @timings: Pointer to array of display timings. NOTE: cannot be used with * "modes" and also these will be used to validate a device tree * override if one is present. * @num_timings: Number of elements in timings array. * @bpc: Bits per color. * @size: Structure containing the physical size of this panel. * @delay: Structure containing various delay values for this panel. * @bus_format: See MEDIA_BUS_FMT_... defines. * @bus_flags: See DRM_BUS_FLAG_... defines. * @refresh_rate: Refresh rate, e.g. 60MHz * @rotate: Rotation, e.g. 0, 90, 180, 270 degrees * @hflip: Horizontal flip, e.g. flip horizontally * @vflip: Vertical flip, e.g. flip vertically */ static const struct panel_desc_dsi dsi2lvds_panel = { .desc = { .timings = &dsi2lvds_panel_timing, .num_timings = 1, .bpc = 6, .size = { .width = 152, .height = 91,}, .bus_flags = DRM_BUS_FLAG_DE_LOW, }, .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS, .format = MIPI_DSI_FMT_RGB666, .lanes = 4, }; in result adb shell  >> dmesg  edm_g_imx8mm:/ # dmesg | grep -i dsi [ 0.625461] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl [ 0.625627] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200 [ 0.625913] imx_sec_dsim_drv 32e10000.mipi_dsi: Failed to attach bridge: 32e10000.mipi_dsi [ 0.634275] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to bind sec dsim bridge: -517 [ 0.916209] sn65dsi84 0-002d: Valid sn65dsi84 chip id [ 0.952430] sn65dsi84 0-002d: Soft reset to default [ 1.080725] imx_sec_dsim_drv 32e10000.mipi_dsi: failed to get blk_ctl [ 1.080853] imx_sec_dsim_drv 32e10000.mipi_dsi: version number is 0x1060200 [ 1.081031] panel-simple-dsi 32e10000.mipi_dsi.0: >>>>Initial DSI config: flags = 1025, format = 1, lanes = 4 [ 1.081040] panel-simple-dsi 32e10000.mipi_dsi.0: >>>>Final DSI config: flags = 7, format = 2, lanes = 4 [ 1.081045] panel-simple-dsi 32e10000.mipi_dsi.0: panel-desc-dsi setting overridden from dt [ 1.081057] panel-simple-dsi 32e10000.mipi_dsi.0: panel-desc setting overridden from dt [ 1.081187] panel-simple-dsi 32e10000.mipi_dsi.0: Found suitable override. [ 1.081251] imx-drm soc@0:bus@32c00000:display-subsystem: bound 32e10000.mipi_dsi (ops imx_sec_dsim_ops) [ 1.084469] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 1.084479] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 1.106707] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 1.106713] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 14.191421] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 14.191432] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 15.078433] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 15.078442] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 [ 15.528918] imx_sec_dsim_drv 32e10000.mipi_dsi: >>>DSI format: 4105, DSI clock = 33300 [ 15.528927] imx_sec_dsim_drv 32e10000.mipi_dsi: Chirag ==> imx_sec_dsim_encoder_helper_atomic_check:144 display_info->bus_formats[i]: 4105 bus_format:4105 num_bus_formats: 1 and here is screenshot :  * >>> However below mentioned changes in  panel-simple.c  :  static const struct panel_desc_dsi dsi2lvds_panel = { .desc = { .timings = &dsi2lvds_panel_timing, .num_timings = 1, .bpc = 8, .size = { .width = 165, .height = 105, .width = 152, .height = 91, }, .bus_flags = DRM_BUS_FLAG_DE_LOW, }, static const struct panel_desc_dsi dsi2lvds_panel = { .format = MIPI_DSI_FMT_RGB888, .lanes = 4, }; i got this result :  Despite this, I am facing issues with display initialization, and the panel does not seem to power up as expected. Could someone please assist me in reviewing the device tree configuration or suggest any required changes in the driver code (panel-simple.c) or other areas to help resolve this issue?  Additionally, any insights on changes that may be required in the SN65DSI84 bridge configuration or the DRM driver (panel-simple.c) would be appreciated. Thank you for your support! Best regards,  Ajaysinh.  Android Graphics & Display HW-Open-Source i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Linux Re: LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard The display issue was resolved by configuring the pixel format to RGB888 and setting the SN65DSI84 bridge register at 0x18 to a value of 0x72. This setup aligned the display's colour depth and timing parameters correctly, providing stable and accurate display output. thanks to @ Chavira for look at this ticket.  Re: LVDS not working as per datasheet timing-parameter with TechNexion EDM-G-IMX8MM and WB baseboard Hi @ajaysinh9484! Thank you for contacting NXP Support! For this case I recommend to contacting Technexion support they should have a patch or device tree using that display. Best Regards! Alejandro