K32W061/JN5189: 'Enhanced Frame Pending' (EFP) のスレッドサポート? 現在のNXP SDK(v2.6.13)でサポートされているThreadのバージョンはどれですか? Thread v1.2で導入されたEnhanced Frame Pending(EFP)機能を使用したいので、質問しています。 SDK で既にサポートされている場合、この機能をどのようにアクティブ化しますか?

Using Freelink MIMXRT1170-EVK kit interface to program/debug a RT1052's custom kit Hi, I have a MIMXRT1170-EVK devkit with its circuit isolation jumpers for the target microcontroller. I have another I.MX RT1052 custom devkit that only contains the connector for the JTAG probe, and I wanted to use the Freelink interface from the RT1170 kit. The idea is to be able to test a kit that does not contain the built-in interface for building a customized board. There is an open topic on the community with the similar question, but, even though it was on a different devkit than mine, I tried to follow the tutorial, but I still wasn't successful (Link of topic). When I don't connect the Reset pin to rt1052 kit, the MCUXpresso IDE identifies the probe (even though, when activating the debug, other errors appear), but the opposite doesn't work. The file containing the Freelink MIMXRT1170-EVK interface I am referring to is attached (SPF-32171_C3, pag. 26). The JTAG connector of rt1052 custom kit is below: Also, the rt1052 devkit contains SWD connectors, if this can help with that. How can I connect the isolation jumpers to another kit that only contains the connector for the JTAG probe? Thanks in advance! Re: Using Freelink MIMXRT1170-EVK kit interface to program/debug a RT1052's custom kit Hi @eng08hry ,   Thank you for your interest in the NXP MIMXRT product, I would like to provide serivce for you.   As I know, the EVK on board debugger is not designed for the external chip, to the EVK, it can use the external debugger, or the on board debugger.   But to the on board debugger, it can't disconnect the on board chip, so, you can't use it to program the external MCU.   So, I highly recommend you find a specific debugger, eg, Segger JLINK, or the NXP MCU-LINK Pro: https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcu-link-pro-debug-probe:MCU-LINK-PRO That will make things more easy. If you must to use the EVK on board debugger to program the extenral board, you may need to remove the on board RT chip, I don't think that is a good choice. So, still recommend you use the external debugger to program your customer RT1050 kit. Wish it helps you! If you still have question about it, please kindly let me know. If your question is solved, please help me to mark the correct answer, just to close this case, thanks. Any new issues, welcome to create the new question post, thanks. Best Regards, kerry

MPC5777C - Why should I not store executable code in the flash? Hello! In the PFLASH chapter of the Reference Manual, there is a note saying that "EEPROM should be avoided for storage of executable code". Why? Best regards, Matheus. Re: MPC5777C - Why should I not store executable code in the flash? I just founded I was dealing with this topic several years ago. Pay attention to following thread: https://community.nxp.com/t5/MPC5xxx/EEPROM-not-suitable-storing-executable-code/td-p/897165

AN13720 引用的 cryptoWrapperReference.py 在哪里用于共享 PN7642 安全密钥模式的数据 我找不到 \Host_Software\Scripts 中引用的脚本。这是 MCUXpresso 的 PN7642 SDK 的一部分还是其他文件？我可以在哪里找到要下载的文件并在里面找到这些脚本？

HSE_B模块双核 您好，我的公司正在进行一个项目，其中有嵌入了 HSE_B 模块的 MWCT2D1xS uC 系列（与 S32K3xx uC 系列中的相同）。 由于它是双核架构，我想知道 HSE_B 模块是否能够处理来自两个应用程序运行的并发请求，以免请求丢失、不会发生冲突等。 您能确认 HSE_B 模块可以管理这个吗？

S32G3 - HSE FW Install directly without IVT Hello, My goal is to be able to flash the HSE and then test the crypto services. I need to flash the HSE directly using the Lauterbach debugger without the need to flash/create an IVT. When i tried to directly flash the bin/hex file of the HSE, i find that the dedicated area for the HSE is not accessible (??s in T32 window) -> Address 0x22000000 Is there a way to enable the HSE memory area (maybe with a cmm script) so that i can flash it accordingly? Thank you, Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA,  I'm glad to know that the information answers your question. Thanks for letting me know and thanks for accepting my reply as a solution. Best regards, Alejandro Re: S32G3 - HSE FW Install directly without IVT Hello @alejandro_e ,  Yes actually that answers my question.  I was just wondering if there was a way to access the HSE directly, but now i just have to flash it with a blob image as mentioned in the documentation. Thank You,  Sahar Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA, It is not possible to access HSE memory, as you can see in the memory map attached to the S32G3 Reference manual: The steps I mentioned before will help you debugging your HSE application, but you cannot write the HSE FW directly like it is done in the S32K microcontrollers. Let me know if this information answers your questions. Re: S32G3 - HSE FW Install directly without IVT Hello @alejandro_e ,  From what i understand, we can boot the board either from RAM or from QSPI. Booting from QSPI needs a blob image, such that the HSE and Application would then be loaded to the RAM. The other way is flashing directly to the RAM using a debugger, which I'm currently doing.  For the Application, i can directly flash it with the debugger in the desired memory address. But for the HSE, the memory region is not accessible by the debugger. so i guess the HSE partition starting address 0x22000000 needs to be enabled somehow, like with a cmm script enabling the clock or something. I saw some other ways where the HSE can be flashed without the IVT but on other targets like the DCF options in S32K, so i'm wondering if there is a similar way but for S32G3 Thank You, Sahar. Re: S32G3 - HSE FW Install directly without IVT Hello @SahaarA, If I understood your problem correctly, you should be able to load and debug an application using the crypto services following the instructions in  AN14070 - How to Run HSE Demo Application, please check section How to load the HSE demo .elf to the SRAM. Let me know if this information solves your problem. Best regards, Alejandro

S32G3 - 无需 IVT 直接安装 HSE FW 您好，我的目标是能够刷新 HSE，然后测试加密服务。 我需要使用 Lauterbach 调试器直接刷新 HSE，而无需刷新/创建 IVT。 当我尝试直接刷新 HSE 的 bin/hex 文件时，我发现无法访问 HSE 的专用区域（在 T32 窗口中）-> 地址 0x22000000 有没有办法启用 HSE 内存区域（也许使用 cmm 脚本）以便我可以相应地刷新它？ 谢谢！

The MPC5746R does not work at a 200 MHz main frequency I am currently developing with the MPC5746R (252-pin). I am using a graphical programming interface to initialize the project. I encountered a problem with the clock configuration. When using the default configuration with a 100 MHz core frequency, the chip works normally. However, when I increase the main frequency of the chip to 200 MHz, the chip stops working. Should I add a "wait cycle" setting during initialization? I hope to configure it using the library functions provided by the SDK. Thank you for your help! One more thing: this image represents the default configuration, but the relationships between the numbers seem to be incorrect. Re: The MPC5746R does not work at a 200 MHz main frequency Hello, I have just used the example from S32DS with SDK. Hello world. There is 200MHz default. It will working with no issues: Furthermore you can refer to chapter 23.7.2 Clock configuration of reference manual for correct calculation equations: And for example to this code, where I use 200MHz PLL of 20MHz XTAL. https://community.nxp.com/docs/DOC-341615 Best regards, Peter

HSE_B module dual core Hello, my company is working on a project having MWCT2D1xS uC family with HSE_B module embedded (the same as the ones in S32K3xx uC family).  Since it is a Dual Core architecture, I'm wondering if the HSE_B module is able to handle concurrent request from two application running such that requests are not lost, do not collide, etc. May you confirm the HSE_B module can manage this? Re: HSE_B module dual core Hi @ale_di_vi  All the information related to the HSE-B is under NDA (Non-Disclosure Agreement) the information is not public, and we cannot share it due to the security levels when working with an automotive part such as this. You can access the available information through S32K3 Microcontrollers for Automotive General Purpose > Secure Files > Documentation -> Secure Files -> HSE-B Firmware Reference Manual - V2.3 and others. If you have never accessed the secure files refer to this file: How to request the safety documentation Support Information.  B.R. VaneB Re: HSE_B module dual core Ok, clear. Do you know where I can find additional information from the HSE_B / S32K3xx Reference Manual ? Re: HSE_B module dual core Yes HSE_B is capable. Communication with the HSE happens over MU_0 and MU_1, both of which have 4 channels that can be used for service requests. Typically, you may assign each MU exclusively to a core. HSE will queue jobs from both MUs. Shorter jobs will take priority and preempt longer jobs, but longer jobs (for example, asymmetric operations) will be given a guaranteed execution time as to not be starved completely.

Where is cryptoWrapperReference.py referenced by AN13720 for data to share PN7642 Secure Key Mode I can't find the scripts referenced at  \Host_Software\Scripts. Is that part of the PN7642 SDK for MCUXpresso or another file? Where can I find the file to download and find these scripts inside? Re: Where is cryptoWrapperReference.py referenced by AN13720 for data to share PN7642 Secure Key Mod Hi @bacre  The scripts is a secured document sw810311, need NDA to get it.  You can request this scripts from PN7642 product page. https://www.nxp.com/products/rfid-nfc/nfc-hf/nfc-readers/single-chip-solution-with-high-performance-nfc-reader-customizable-mcu-and-security-toolbox:PN7642 Regards Daniel

S32G3 - HSE FW IVT なしで直接インストール こんにちは、私の目標は、HSEをフラッシュしてから暗号サービスをテストできるようにすることです。 IVTをフラッシュ/作成せずに、ローターバッハデバッガを使用してHSEを直接フラッシュする必要があります。 HSEのビン/ヘックスファイルを直接フラッシュしようとすると、HSEの専用領域にアクセスできないことがわかりました(?T32 ウィンドウの s) -> アドレス 0x22000000 HSEメモリ領域を有効にする方法はありますか(おそらくcmmスクリプトを使用)それに応じてフラッシュできるようにする方法はありますか? ありがとうございました。

S32K312 About SPI Issues Hello: Use FreeRTOS_Toggle_Led_Example_S32K312 routine (DS3.4+RTD2.0.0) on S32K312 EVB, add SPI transmission function, master: LPSPI_2, Salve: Flexio_SPI, currently both the master and slave ends cannot receive data, please help check whether it is a configuration problem or a code problem. Add SPI function reference Lpspi_Flexio_Ip_Transfer_S32K344 (DS3.5_RTD3.0.0, DS3.5 comes with routines, because you need to configure master: LPSPI_2, Salve: Flexio_SPI, so refer to this demo). Add the example code as the attachment: FreeRTOS_Toggle_Led_Example_S32K312_SPI_1119.zip The following are the current issues to be eliminated: 1. The wiring problem has been ruled out because Lpspi_Flexio_Ip_Transfer_S32K312 (DS3.4 In the built-in routine, FlexIO is the master and LPSPI_2 is the slave) and it can be received normally. However, in the Lpspi_Flexio_Ip_Transfer_S32K312 demo, FlexIO is the slave and LPSPI_2 is the master. It is found that neither the master nor the slave can receive data. So please help check the FreeRTOS_Toggle_Led_Example_S32K312_SPI_1119.zip demo code, or change the Lpspi_Flexio_Ip_Transfer_S32K312 demo code to master:LPSPI_2, Salve:Flexio_SPI mode. Lpspi_Flexio_Ip_Transfer_S32K312 demo code is attached. Thanks, Re: S32K312 SPI issue So if S32K312 is used for development, a combination of DS3.5 and RTD3.0.0 is required? Re: S32K312 about SPI issue Hi, The current progress of the problem is as follows: DS3.5+RTD3.00 Configuration master: LPSPI_2, Salve: Flexio_SPI transmission and reception are normal. With the same configuration in DS3.4+RTD2.00, only the Slave end can receive data, while the master end RX cannot receive data. The routine is as follows. Please help check what is the cause? Many thanks!

[imx8mn lpddr4] 如何在 android 14.0.0_2.2.0 上用我的更改替换内核 亲爱的NXP 例如， 我已修改如下 imx-android-14.0.0_2.2.0/android_build/vendor/nxp-opensource/kernel_imx$ vi arch/arm64/kernel/setup.c +97 pr_info(“ BCooting Linux 在... 然后执行如下 ./imx-make.sh内核 ./imx-make.sh 启动映像 fastboot flash boot_a boot.img 但启动时并未出现BCooting 。 如何应用内核修改？ 提前致谢 回复：[imx8mn lpddr4] 如何在 android 14.0.0_2.2.0 上用我的更改替换内核 感谢您的评论。 您能分享一份关于如何修改 GKI 以外的内核的文档吗？例如，是否有关于如何修改vendor_boot.img源代码的文档？

Code generation needs not to carry out on real-time!! Hi, For example, I'm configuraing 'PDU' in CanIf module in S32DS. Whenever I change the name of the PDU, S32DS generates the code. It makes S32DS stops temporarily. It's very annoying as I configure lots of PDU in CanIf. Would it impossible to change that code generation is executed when I choose 'Update Code'? Please save me out of configuration hell. Re: Code generation needs not to carry out on real-time!! Hi @eddy_bts, I imagine you are referring to the "Code Preview" window within the configuration tools? If yes, you can disable it from "ConfigTools > Configuration Preferences > Enable Code Preview" Best regards, Julián

how to improve S32k3 interrupt callback execute speed? hello! I'm migrate project from microchip's PIC series to S32K312. In PIC chips, set 1us timer -> start timer -> hit timer interrupt  -> toggle pin, can see 1us toggle wave in scope.  But in S32k3, it's not worked. the minimal toggle time is 6.2us,  I'm confused that why mcu running 120Mhz, but can't interrupt in 1us. here's scope's 6.2us wave(set pit 1us interrupt) and test project(modified by pit example) Re: how to improve S32k3 interrupt callback execute speed? Hi @Vandarkholme, Some SW overhead is always expected, but especially with the RTD. Have a look at Pit_Ip_ProcessCommonInterrupt() in Pit_Ip.c. This function is called from the PIT interrupt handler before the callback notification is called where you toggle the pin. Regards, Daniel

[imx8mn lpddr4] how to replace kernel with my changes on android 14.0.0_2.2.0 dear nxp  For example,  I have modified as below imx-android-14.0.0_2.2.0/android_build/vendor/nxp-opensource/kernel_imx$ vi arch/arm64/kernel/setup.c +97 pr_info("BCooting Linux on ... then, executed below ./imx-make.sh kernel ./imx-make.sh bootimage fastboot flash boot_a boot.img But BCooting did not be presented at booting. How do I apply kernel modifications? Thanks in advanced Re: [imx8mn lpddr4] how to replace kernel with my changes on android 14.0.0_2.2.0 dear Dhaval_Shiroya First, thanks for your comments. I have changes `arch/arm64/kernel/setup.c` and arch/arm64/boot/dts/freescale/imx8mn-evk.dts as below.    pr_info("BBBCooting Linux    model = "N_NXP i.MX8MNano EVK board"; then,  Compile kernel, dtb and flash as below. rm -rf out ./imx-make.sh kernel ./imx-make.sh dtboimage adb reboot bootloader fastboot flash boot boot.img fastboot flash dtbo_a dtbo-imx8mn.img then adb logcat -b all | grep -i "N_NXP" 01-01 00:00:00.000 0 0 I Machine model: N_NXP i.MX8MNano EVK board but  adb logcat -b all | grep -i "BBBCooting"  <- it can't  be founded so, In summary It seems that Google's boot.img not being modified. Thanks, Bryan Re: [imx8mn lpddr4] how to replace kernel with my changes on android 14.0.0_2.2.0 Hello, Yes, it is possible to modify the kernel, and the changes are reflected in the boot.img. After building, the boot.img file can be found in the following directory: /imx-android-14.0.0_2.2.0/android_build/out/target/product/evk_8mn/boot.img The boot.img is a composite image that includes the kernel and boot parameters. When you rebuild the kernel source code your changes are incorporated into this image. Steps to Rebuild and Verify: Ensure Your Changes Are Saved: After modifying the kernel source file (e.g., setup.c), save the changes. Verify the modification by reopening the file: vim arch/arm64/kernel/setup.c Rebuild the Kernel and Boot Image: Clean and rebuild the kernel and boot image to ensure the changes are applied: ./imx-make.sh clean   ./imx-make.sh kernel   ./imx-make.sh bootimage   Flash the Updated Boot Image: Flash the newly built boot.img to the device: fastboot flash boot boot.img   fastboot reboot   Verify the Modification: Use ADB logcat to confirm the pr_info() message is visible at boot time: adb logcat -b all | grep -i "BCooting"   Alternatively, connect via Minicom serial communication to check the logs directly during boot.   Your modification "BCooting Linux on ..." should now appear in the logs if all the steps are followed correctly. Re: [imx8mn lpddr4] how to replace kernel with my changes on android 14.0.0_2.2.0 thanks for your comments. Could you share a document on how to modify kernels other than GKI? For example, is there a document on how to modify the source code for the vendor_boot.img? Re: [imx8mn lpddr4] how to replace kernel with my changes on android 14.0.0_2.2.0 Hi @bryan_hong  The modifications in your code is in boot.img.   it is under folder /imx-android-14.0.0_2.2.0/android_build/out/target/product/evk_8mn boot.img is a composite image, which includes the AOSP generic Kernel image and boot parameters. The boot.img is from google, you can not change it.   By default, fastboot only program the default image from google. Regards Daniel

NFC pn532 Hi all, I have a small query which requires your help.  PN532 provide:  I2C,SPI,UART as host interface. I am looking for an alternate for PN532. consideration point: 1. UART host interface must. if UART interface not available then what are the options.  NFC Frontend Solutions Re: NFC pn532 Thanks for the opinion Re: NFC pn532 Hello @Arjun_Bansal  Yes, if the UART is not the mandatory needs, PN7160 is a good choice. Re: NFC pn532 Hi @KaiLi , Thanks for the suggestion, I have reviewed PN7160 as well, which of CLRC663 and PN7160 would be good if i exclude the UART interface factor. Re: NFC pn532 Hello @Arjun_Bansal  CLRC663 plus recommends to you. Please log in the product page for the details: https://www.nxp.com/products/rfid-nfc/nfc-hf/nfc-readers/clrc663-iplus-i-family-high-performance-nfc-frontends:CLRC66303HN

S32K312 关于SPI问题 你好： 在S32K312 EVB上使用FreeRTOS_Toggle_Led_Example_S32K312例程（DS3.4+RTD2.0.0），添加SPI传输功能 ，master:LPSPI_2,  Salve : Flexio_SPI, 目前master 端和slave端都接收不到数据，请帮忙检查一下是配置问题还是code问题。 添加SPI功能参考Lpspi_Flexio_Ip_Transfer_S32K344（DS3.5_RTD3.0.0,DS3.5中自带例程，因为要配制master:LPSPI_2,  Salve : Flexio_SPI，所以参考此demo)。 添加例程如附件：FreeRTOS_Toggle_Led_Example_S32K312_SPI_1119.zip 目前排除问题如下： 1.接线问题已排除，因为使用Lpspi_Flexio_Ip_Transfer_S32K312（DS3.4 自带例程，FlexIO为master，LPSPI_2为slave）能够正常接收。但是将Lpspi_Flexio_Ip_Transfer_S32K312 demo中将FlexIO为slave，LPSPI_2为master发现master 端和slave端也是都接收不到数据的。 所以请帮查看FreeRTOS_Toggle_Led_Example_S32K312_SPI_1119.zip demo code问题，或是将Lpspi_Flexio_Ip_Transfer_S32K312 demo code 改为master:LPSPI_2,  Salve : Flexio_SPI 模式。 Lpspi_Flexio_Ip_Transfer_S32K312 demo code 如附件。 多谢， Re: S32K312 关于SPI问题 Hi@Bert2023 不一定是RTD 3.0.0呀，现在的版本已经出到5点几了。如果是新开发的，用RTD2.0.0肯定是太旧了吧，没有任何理由还用旧版本吧。 Re: S32K312 关于SPI问题 所以如果S32K312做开发，需要DS3.5+RTD3.0.0 这样的搭配? Re: S32K312 关于SPI问题 Hi@Bert2023 我在使用RTD 2.0.0配置S32K312的FlexIO的DMA的时候总会遇到些问题，这个版本太老了可能存在些问题， 我在RTD 3.0.0 P07上做了一个S32K312的demo，我测了下没什么问题。 其实在RTD 3.0.0上已经提供了SPI作为主机，FlexIO作为从机的例程，但是其基于S32K344制作的，我也是 参考这个demo测试的。 Re: S32K312 关于SPI问题 Hi@Bert2023 抱歉回复你的有点迟，我正在处理你的问题，我还需要点时间 回复： S32K312 关于SPI问题 Hi,你好： 目前问题进展如下： DS3.5+RTD3.00  配置master:LPSPI_2,  Salve : Flexio_SPI 收发正常，同样的配置在DS3.4+RTD2.00 时只有Slave 端能接收到数据，而master端RX接收不到数据，例程如下，请帮忙check一下，是什么原因导致的？ 多谢!

IMX8MN u-boot 2024.04 SPL DTS issue. I am working on an uplift from kirkstone (uboot-imx 2022.04) to scarthgap using IMX BSP. System is custom based on the IMX8MN with LPDDR4. The commit in branch of uboot-imx which is based on: commit de16f4f17221b2ff72b8cb18c28cd8a29f3c2710 (HEAD -> lf_v2024.04, tag: lf-6.6.36-2.1.0, tag: android-14.0.0_2.2.0, origin/lf_v2024.04) Trying to start SPL for flashing via uuu gives. 3:3>Start Cmd:SDPS: boot -f >/nix/store/dljgvki41iynrwc2l5an6l99v5pnzx2g-sign-all-the-things/flash.bin 15%3:3>Fail HID(W):LIBUSB_ERROR_TIMEOUT(1.045s) And reading the uart output says: U-Boot SPL 2024.04-imx_v2024.04_6.6.36-2.1.0+gde16f4f1722+p0 (Sep 02 2024 - 10:44:35 +0000) Failed to find clock node. Check device tree Adding some more debug to u-boot gives additional information: clock-controller@30380000: could not find phandle, phandle: 20, cur_index: 0 clk_get_by_index_tail: Node 'clock-controller@30380000', property 'clocks', failed to request CLK index 1: -22 Failed to find clock node. Check device tree The probe of fsl,imx8mn-ccm fails when trying to find osc_24m in DTB. Code (clk-imx8mn.c) ret = clk_get_by_name(dev, "osc_24m", &osc_24m_clk);    if (ret) {      return ret;    } Code: (fdtdec.c) if (cells_name || cur_index == index) {     node = fdt_node_offset_by_phandle(blob, phandle);     if (node < 0) {        printf("%s: could not find phandle, phandle: %d, cur_index: %d\n",        fdt_get_name(blob, src_node, NULL), phandle, cur_index);        goto err;     } } So if I modify clk-uclass.c to not use cell_name, #clock-cells, it will proceed a bit further but fail at other points. This is obviously not the way forward but perhaps can shed some light at whats wrong? clk_get_by_index_nodev(ofnode node, int index, struct clk *clk) {     struct ofnode_phandle_args args;     int ret;      ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,      index, &args); The DTS code adjacent to the error is as follows: imx8mn.dtsi: clk: clock-controller@30380000 {     compatible = "fsl,imx8mn-ccm";     reg = <0x30380000 0x10000>;     #clock-cells = <1>;     clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,              <&clk_ext3>, <&clk_ext4>;     clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",                   "clk_ext3", "clk_ext4";     assigned-clocks = <&clk IMX8MN_CLK_A53_SRC>,                       <&clk IMX8MN_CLK_A53_CORE>,                       <&clk IMX8MN_CLK_NOC>,                       <&clk IMX8MN_CLK_AUDIO_AHB>,                       <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>,                       <&clk IMX8MN_SYS_PLL3>,                       <&clk IMX8MN_VIDEO_PLL1>,                       <&clk IMX8MN_AUDIO_PLL1>,                       <&clk IMX8MN_AUDIO_PLL2>;     assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>,                              <&clk IMX8MN_ARM_PLL_OUT>,                              <&clk IMX8MN_SYS_PLL3_OUT>,                              <&clk IMX8MN_SYS_PLL1_800M>;     assigned-clock-rates = <0>, <0>, <0>,                            <400000000>,                            <400000000>,                            <600000000>,                            <1039500000>,                            <393216000>,                            <361267200>; };   From custom device tree usage of the same node via phandle: &clk {   bootph-pre-ram;   bootph-all;   /delete-property/ assigned-clocks;   /delete-property/ assigned-clock-parents;   /delete-property/ assigned-clock-rates; }; &osc_24m {   bootph-pre-ram;   bootph-all; }; Something is obviously missing in this migration. I am attaching the DTS sources. What is the problem? Is there some official migration guide to follow 2022->2024? Thanks! i.MX 8M | i.MX 8M Mini | i.MX 8M Nano Yocto Project Re: IMX8MN u-boot 2024.04 SPL DTS issue. Hi, AldoG, thanks for your reply and interest in the issue. The code is as already stated from the uboot-imx repo pointed to from scarthgap yocto release. : ./build/tmp/work/xbrain-poky-linux/u-boot-imx/2024.04/git $ git status On branch lf_v2024.04 Your branch is up to date with 'origin/lf_v2024.04'. no changes added to commit (use "git add" and/or "git commit -a") $ git remote -vv origin https://github.com/nxp-imx/uboot-imx.git (fetch) origin https://github.com/nxp-imx/uboot-imx.git (push) latest commit: commit de16f4f17221b2ff72b8cb18c28cd8a29f3c2710 (HEAD -> lf_v2024.04, tag: lf-6.6.36-2.1.0, tag: android-14.0.0_2.2.0, origin/lf_v2024.04) Anyways, I found out what the problem was yesterday. You need to specify all the clocks as bootph-all, bootph-reram in your custom DTS when cells-name is assigned. If you dont you get the issue above. The DTS code in u-boot verifies that all the clocks in the list are active. This wasnt mandatory in 2022.04 obviously. It would be good to know all these pitfalls before a BSP migration. DTS custom code now: &clk { bootph-pre-ram; bootph-all; /delete-property/ assigned-clocks; /delete-property/ assigned-clock-parents; /delete-property/ assigned-clock-rates; }; &osc_24m { bootph-pre-ram; bootph-all; }; +&osc_32k { + bootph-pre-ram; + bootph-all; +}; + +&clk_ext1 { + bootph-pre-ram; + bootph-all; +}; + +&clk_ext2 { + bootph-pre-ram; + bootph-all; +}; + +&clk_ext3 { + bootph-pre-ram; + bootph-all; +}; + +&clk_ext4 { + bootph-pre-ram; + bootph-all; +}; + This might serve for others facing the same issue. Re: IMX8MN u-boot 2024.04 SPL DTS issue. Hello, Could you share how you are creating/building your boot image? Also, from where are you getting the source code? Best regards/Saludos, Aldo.

[imx8mn lpddr4] Android 14.0.0_2.2.0でカーネルを私の変更に置き換える方法 親愛なるNXPの様 例えば 私は以下のように変更しました imx-android-14.0.0_2.2.0/android_build/vendor/nxp-opensource/kernel_imx$ vi arch/arm64/kernel/setup.c +97 pr_info ("BCooting Linux on ... 次に、以下で実行します ./imx-make.sh カーネル ./imx-make.sh ブートイメージ fastboot フラッシュ boot_a boot.img しかし、BCootingは起動時に表示されませんでした。 カーネルの変更を適用するにはどうすればよいですか? 高度な感謝 日時:[imx8mn lpddr4]カーネルをAndroid 14.0.0_2.2.0の変更に置き換える方法 コメントありがとうございます。 GKI以外のカーネルを変更する方法についてのドキュメントを共有していただけますか?たとえば、vendor_boot.img のソースコードを変更する方法に関するドキュメントはありますか?