S32G399a u-boot hang at Loading Environment from MMC... OK Hello NXP experts I am using bsp41.0 ro debug s32g399a board, selet nor-flash boot mode, refer your user manual, modify ATF CLOCK config from 1.4G to 1.2G, #elif defined(PLAT_s32g3) #define S32GEN1_A53_MAX_FREQ (1300 * MHZ) #define S32GEN1_A53_MIN_FREQ (48 * MHZ) #define S32GEN1_ARM_PLL_VCO_MAX_FREQ (2400 * MHZ) #define S32GEN1_ARM_PLL_PHI0_MAX_FREQ (1200 * MHZ) #define S32GEN1_A53_FREQ (1200 * MHZ) #define S32GEN1_ARM_PLL_VCO_FREQ (2600 * MHZ) #define S32GEN1_ARM_PLL_PHI0_FREQ (1200 * MHZ) #define S32GEN1_XBAR_2X_FREQ (800 * MHZ) #define S32GEN1_PERIPH_PLL_PHI0_MIN_FREQ (100 * MHZ) #define S32GEN1_PERIPH_PLL_PHI2_MIN_FREQ (40 * MHZ) and align from 16 to 64 test step: 1. burn M7 bootloader(with de_init configuration) to nor-flash 2. select nor-flash boot mode 3. download bin file to nor-flash will FT tool 4. burn to SD-CARD with below command, dd if=fip.s32 of=/dev/sdb bs=512 skip=1 seek=1 conv=fsync,notrunc 5. power up, u-boot hang at below lines, NOTICE: Reset status: Power-On Reset NOTICE: BL2: v2.10.0 (release):bsp41.0-2.10-dirty NOTICE: BL2: Built : 09:36:29, Oct 24 2024 NOTICE: BL2: Booting BL31 U-Boot 2022.04+g4744d0e2c8+p0 (Oct 24 2024 - 17:47:25 +0800) SoC: NXP S32G399A rev. 1.1 CPU: ARM Cortex-A53 r0p4 @ max 1300 MHz Model: NXP S32G399A-RDB3 DRAM: 3.5 GiB Core: 306 devices, 25 uclasses, devicetree: board MMC: FSL_SDHC: 0 Loading Environment from MMC... OK please help to check from your side, thanks. 回复： S32G399a u-boot hang at Loading Environment from MMC... OK hi,xlfd_1981
Thank you for your reply and finding out the problem.
BR
Joey 回复： S32G399a u-boot hang at Loading Environment from MMC... OK thanks i have fixed this issue, your user manual have some mistake, the correct config is below, #define S32GEN1_A53_MAX_FREQ (1300 * MHZ) #define S32GEN1_A53_MIN_FREQ (48 * MHZ) #define S32GEN1_ARM_PLL_VCO_MAX_FREQ (2600 * MHZ) #define S32GEN1_ARM_PLL_PHI0_MAX_FREQ (1200 * MHZ) #define S32GEN1_A53_FREQ (1200 * MHZ) #define S32GEN1_ARM_PLL_VCO_FREQ (2400 * MHZ) #define S32GEN1_ARM_PLL_PHI0_FREQ (1200 * MHZ) #define S32GEN1_XBAR_2X_FREQ (800 * MHZ) #define S32GEN1_PERIPH_PLL_PHI0_MIN_FREQ (100 * MHZ) #define S32GEN1_PERIPH_PLL_PHI2_MIN_FREQ (40 * MHZ) 回复： S32G399a u-boot hang at Loading Environment from MMC... OK hi,xlfd_1981
Thank you for your interest in NXP Semiconductor products and the opportunity to serve you, I will gladly help you with this.
you are using the Logger Demo and S32G_Bootloader_G3_LLCELOGGER_V1_2023_12_06.pdf? Please check the following configuration settings during operation.
1. Regarding the clk_enable() function leading to U-Boot hanging at Loading Environment from MMC. Please check if the LLCE Logger Demo has already removed CLOCK INIT. The bootloader has already been configured for clock, so reconfiguring the MCA L driver may cause conflicts. You can refer to the S32G_Bootloader_G3_LLCELOGGER_V1_2023_12_06 document, section 2.5/3.5, for a solution to resolve the clock conflicts between the bootloader, MCA L driver, and Linux.
2. Additionally, please check if there is any conflict between the SRAM mirrored load run address and the diagram below.
Wish it helps you.
If you still have question about it,please kindly let me know.
BR
Joey
回复： S32G399a u-boot hang at Loading Environment from MMC... OK Nxp Experts please help analyze this issue,thanks your user manual only mention about ATF codes updated, not mention uboot and kernel, so uboot and kernel need updated? How to update? 回复： S32G399a u-boot hang at Loading Environment from MMC... OK pls, we config m7 bootloader clock confict referring to S32G_Bootloader_G3_LLCELOGGER_V1_2023_12_06 documents, and I found the serdes module clk_enable() function leading u-boot hang at Loading Environment from MMC... OK, so may be clock confict between m7 abnd a53, looking forward to your response, thanks.
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