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S32 Design Studio: Add FreeMASTER Lite Configuration to Existing UART Project using AI Introduction In Tutorial 2, the application was extended to cycle the FRDM-A-S32K312 board's RGB LED through red, green, and blue, while sending corresponding status messages to a serial terminal. This third article shows how to add a FreeMASTER Lite server configuration using S32 Design Studio AI Support to an existing UART project on the FRDM-A-S32K312 board and create a browser dashboard that displays the current LED color – replacing the plain UART color echo.   Estimated time: ~20 minutes. System Architecture Add FreeMASTER to existing UART project – system architecture overview   The components involved are:   FRDM-A-S32K312 – Target evaluation board. Runs the existing UART project extended with FreeMASTER TSA, streaming the LED colour variable to the host over USB at 115200 baud. Host PC – Runs FreeMASTER Lite (fmlite.exe) on the board's COM port, 115200 baud, port 8090. Serves the LED colour dashboard to the browser. Prerequisites   What you need before starting   Tutorial 2 completed — the GPIO Blinking LED Demo with UART must already be imported and building in S32 Design Studio One FRDM-A-S32K312 evaluation board + USB cable Download and install FreeMASTER Lite (fmlite.exe) from LINK  Any modern browser (Chrome / Edge / Firefox) S32 Design Studio AI Support configured in your agent (download, install and configure it following the instruction from Installation & Usage Guide)    Note: This tutorial uses these paths: S32 Design Studio Installation: C:\NXP\2026\K3_kit\S32DS_3.6.8 Workspace: C:\NXP\2026\K3_kit\workspace_S32DS_3.6.8_K3_kit FreeMASTER Installation: C:\NXP\2026\K3_kit\FM_32 You can use any location. If you do, update the paths in the prompt to match. Connect the FRDM-A-S32K312 board to the PC via USB, open Device Manager → Ports (COM & LPT) and note the virtual COM port number. You must know this port before sending the prompt below — replace every COM# in the prompt with your own port (for example COM7), otherwise FreeMASTER Lite cannot open the serial connection to the board. Steps   Send the following prompt to your AI assistant. It is a complete, self-contained instruction. Replace COM# with the COM port of your board before sending.   Step 1 – Create FreeMaster Lite dashboard and server configuration Using FreeMaster Lite create a self contained web dashboard and the server configuration file in the project folder called dashboard. FreeMaster Lite is installed at c:\NXP\2026\K3_kit\FM_32\FreeMASTER Lite\fmlite.exe The dashboard should have a volatile variable that will be used to reflect the color of the RGB LED At the top should have the controls for the board serial connection, default: connection name "S32K312 RGB Board", COM#, 115200 baud, 8 data bits, no parity, 1 stop bit The board is connected on COM# - use this serial port for the FreeMaster Lite connection The project is a plain GPIO demo with no FreeMASTER driver - add whatever is needed on the target side so it can talk to FreeMaster Lite, then build and flash it in S32DS and confirm the color actually changes from the dashboard. Start FreeMaster server and run the dashboard at the end Use the s32ds-agentic-ai MCP server; if the MCP server disconnects at any point, stop immediately and notify user. AI will:   Create a self-contained web dashboard in the dashboard project folder Create a FreeMASTER Lite server configuration file in the same folder Add a volatile variable to reflect the RGB LED colour in the dashboard Add serial connection controls at the top (name: S32K312 RGB Board, COM#, 115200 baud, 8N1) Start the FreeMASTER Lite server and open the dashboard in the browser Stop and notify the user immediately if the s32ds-agentic-ai server disconnects Verifying the Result   Work through this final check to confirm that the prompt completed successfully.   Final check FreeMASTER Lite server is running with no errors. Open http://localhost:8090 in your browser. The LED colour dashboard loads and shows the current LED colour within ~5 seconds. The displayed colour changes in sync with the physical LED on the board. Troubleshooting   Symptom Fix ReadTSA returns count=0 TSA not enabled (FMSTR_USE_TSA 1) or FMSTR_Poll() missing. StartComm times out Wrong COM port in .fmcfg, baud mismatch, or board not powered. fmlite.exe exits immediately Activation code not entered, or path has spaces — wrap in quotes. LPUART0 baud rate wrong or peripheral not running Open Peripherals Tool. Verify LPUART0 is enabled and its clock source is set to AIPS_PLAT_CLK. Regenerate code if you change anything. LPUART0 absent at runtime Open Peripherals Tool › McuPartition. Enable LPUART0 in the partition configuration, then regenerate. FreeMASTER host times out or drops connection FMSTR_Poll() must be called frequently — place it in the main loop or a fast periodic task. The host requires low-latency responses. LPUART6 interrupts conflict with FreeMASTER Open Peripherals Tool (Platform). Disable LPUART6 interrupts — FreeMASTER operates in polling mode and does not use interrupt-driven UART. File Reference     File Step Description dashboard/led_color.html 1 LED colour dashboard dashboard/board_115200.fmcfg 1 FreeMASTER Lite server configuration src/main.c 1 Firmware with FreeMASTER TSA and LED colour variable   Add the FreeMASTER Lite configuration and dashboard – watch your board's LED colour live in the browser in about 20 minutes. Examples
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S32 Design Studio: Import, Build, and Monitor a Motor Control Project using AI Introduction This tutorial demonstrates an end-to-end, AI-assisted motor control workflow using S32 Design Studio AI Support. You'll find a motor control application for the FRDM-A-S32K312 on the NXP Application Code Hub, import it into S32 Design Studio, generate code, build and flash the project, and then create a FreeMASTER dashboard with motor controls, speed selection, and live parameter monitoring. The tutorial uses the NXP PMSM Low Voltage Motor Control Accessory Kit as the motor hardware.   Everything is done through two prompts – jump straight to the steps if you already have the tools installed.   Estimated time: ~35 minutes. System Architecture S32K312 Motor Control + FreeMASTER – system architecture overview   The components involved are:   Motor – NXP PMSM Low Voltage Motor Control Accessory Kit is connected to the FRDM-A-S32K312 board. The Motor is driven by PWM output from the MCU. FRDM-A-S32K312 – Runs motor control firmware with FreeMASTER TSA enabled. Streams live data to the host PC over USB (UART). Host PC – Runs FreeMASTER Lite (fmlite.exe) on COM#, 115200 baud, port 51234. Serves the HTML5 dashboard to the browser. Prerequisites   What you need before starting   Download the FRDM Automotive S32K3 + S32M27 Board Installation Package from the Automotive Package Manager – LINK Install S32 Design Studio (version 3.6.5 or newer) from the above bundle along with the S32K3 SDK  Install the S32 Design Studio MCP REST Server (bundled with S32 Design Studio 3.6.11+ or available for installation via Extensions and Updates in older versions starting with 3.6.5) Install the AMMCLIB for S32K3xx/S32M27x (Automotive Math and Motor Control Library) using S32DS Extensions and Updates required by the motor control demo Install the NXP GCC for Arm Embedded Processors v10.2 toolchain using S32DS Extensions and Updates — this is the toolchain used to build the motor control example Install FreeMASTER Lite into your working directory – download from LINK One FRDM-A-S32K312 evaluation board + USB cable One NXP PMSM Low Voltage Motor Control Accessory Kit (motor and driver hardware for the FRDM-A-S32K312) Connect the board to the PC via USB and find out which COM port it was assigned — open Device Manager → Ports (COM & LPT) and note the port of the board's USB-serial interface (it can be any COMx ). You will hand this value to the AI agent, which uses it for the FreeMASTER Lite serial connection Any modern browser (Chrome / Edge / Firefox) Download, install and configure your agent to use the S32 Design Studio AI Support following the Installation & Usage Guide   Note: This tutorial uses these paths: S32 Design Studio Installation: C:\NXP\2026\K3_kit\S32DS_3.6.8 Workspace: C:\NXP\2026\K3_kit\workspace_S32DS_3.6.8_K3_kit FreeMASTER Installation: C:\NXP\2026\K3_kit\FM_32 You can use any location. If you do, update the paths in the prompt to match. Connect the FRDM-A-S32K312 board to the PC via USB before starting, then tell the agent the COM port of the board — for example: "the board is connected on COM7, use it for FreeMASTER Lite". Everywhere this tutorial shows COMx , replace it with your own port number. The AI will search the Application Code Hub and select the most suitable motor control demo automatically. Steps   Send the following prompts to your AI assistant in order. Each is a complete, self-contained instruction.   Step 1 – Import motor control demo, build and run You are a software developer that needs to use S32K312 FRDM board to control a motor. I have the NXP PMSM Low Voltage Motor Control Accessory Kit available for my application. Check NXP Application Code Hub for an application that can be used and import the selected application into S32 Design Studio IDE. S32DS is installed at C:\NXP\2026\K3_kit\S32DS_3.6.8. Run S32 Configuration Tools to generate code, build it, load into the flash memory and run the project. Use the s32ds-agentic-ai MCP server; if the MCP server disconnects at any point, stop immediately and notify user. AI will:   Search NXP Application Code Hub for a motor control application suitable for the FRDM-A-S32K312 and compatible with the NXP PMSM Low Voltage Motor Control Accessory Kit Import the selected project into S32 Design Studio at C:\NXP\2026\K3_kit\S32DS_3.6.8 Open S32 Configuration Tools and click Generate Code (Pins, Clocks, Peripherals) Build the project and confirm zero errors Flash the .elf binary into the board's flash memory and run the project Stop and notify the user immediately if the s32ds-agentic-ai MCP server disconnects   Step 2 – Create FreeMASTER dashboard and run it Using FreeMaster Lite create a self contained web dashboard and the server configuration file in the project folder called dashboard. FreeMaster Lite is installed at c:\NXP\2026\K3_kit\FM_32\FreeMASTER Lite\fmlite.exe The dashboard should define and connect all the variables for the 4 panels and contained components: - top panel: contains the controls for the board serial connection, default: connection name "S32K312 Board", COM#, 115200 baud, 8 data bits, no parity, 1 stop bit - left panel: contains the motor control panel: motor state (on/off), actual RPM and desired RPM, slider for selecting the RPMs in both directions, a 0 RPM button, and +- 10/100 RPMs buttons - middle panel: contains a graphical representation of the motor, spinning the NXP logo in sync with the motor actual speed - right panel: contains all the board\motor parameters that you can find relevant Start FreeMaster server and run the dashboard at the end Once the JS client confirms that the board is connected it should start reading desired and actual RPMs Use the s32ds-agentic-ai MCP server; if the MCP server disconnects at any point, stop immediately and notify user. AI will:   Create a FreeMASTER configuration file in the project subfolder dashboard/: COM#, 115200 baud, 8 data bits, no parity, 1 stop bit, connection name "S32K312 Board" Generate a self-contained HTML5 dashboard saved to the project subfolder dashboard/ with all FreeMASTER variables defined, organised in four panels Once the JS client confirms the board is connected, automatically start reading desired and actual RPMs Start the FreeMASTER server and open the dashboard in the browser Stop and notify the user immediately if the s32ds-agentic-ai MCP server disconnects   Verifying the Result   Work through this final check to confirm that both prompts completed successfully.   Final check Motor control project imported and visible in S32DS Project Explorer. S32 Configuration Tools ran – code generated with no errors. Build completes with zero errors. Firmware flashed and running – motor responds as expected. PMSM kit connected and motor responds to commands from the dashboard. FreeMASTER configuration file created in dashboard/: COM#, 115200 baud, 8 data bits, no parity, 1 stop bit, connection name "S32K312 Board". FreeMASTER server is running. Dashboard opens in browser – all four panels visible. Once connected, the dashboard automatically starts reading desired and actual RPMs. Left panel shows motor on/off state, actual and desired RPM, slider for both directions, 0 RPM button, and ±10/100 RPM buttons. Middle panel shows the NXP logo spinning in sync with the actual motor speed. Right panel shows all relevant board/motor parameters updating in real time. Troubleshooting   Symptom Fix No motor control demo found on ACH Try broader search terms such as "motor", "PWM", or "BLDC". Confirm the s32ds-agentic-ai server is connected. Import fails or project missing from Project Explorer Try File › Import › Existing Projects into Workspace manually. Confirm S32DS path is C:\NXP\2026\K3_kit\S32DS_3.6.8. S32 Configuration Tools does not open Double-click the .mex file. Ensure the S32K3 SDK is installed and the project SDK is correctly configured. Generate Code produces errors Check Pins, Clocks, and Peripherals tabs for red validation markers. Resolve conflicts before regenerating. Build errors after Generate Code Ensure the generated src/ folder is in the build path. Try Project › Clean then rebuild. Motor does not respond after flashing Check hardware connections between board and motor driver. Verify correct PWM output pins per the demo schematic. FreeMASTER dashboard does not connect Confirm the FreeMASTER server is running and COM# / 115200 baud / port 51234 match the configuration file. Check that the board is powered and running. Dashboard does not auto-read RPMs after connect Check the JS connect callback in the dashboard HTML. Ensure the ReadVariable calls for desired and actual RPM are triggered after the WebSocket StartComm response confirms success. Actual/desired RPM shows 0 or stale Verify the variable names match those in the FreeMASTER project. Check that FMSTR_Poll() is called in the main loop and TSA is enabled. Right panel parameters not updating Verify FreeMASTER TSA is enabled (FMSTR_USE_TSA 1) and FMSTR_Poll() is called in the main loop. s32ds-agentic-ai MCP server disconnects Stop immediately and restart the MCP server following the Installation & Usage Guide. File Reference   File Step Description src/main.c 1 Main firmware – motor control loop with FreeMASTER TSA *.mex 1 S32 Configuration Tools project file (Pins, Clocks, Peripherals) generate/src/ 1 Auto-generated peripheral initialisation source files generate/include/ 1 Auto-generated peripheral configuration headers dashboard/board_115200.fmcfg 2 FreeMASTER server configuration: COM#, 115200 baud, 8 data bits, no parity, 1 stop bit, "S32K312 Board" dashboard/motor_dashboard.html 2 Self-contained HTML5 dashboard with all FreeMASTER variables, 4 panels (top: serial connection; left: motor control with slider, 0 RPM button, ±10/100 RPM buttons; middle: NXP logo spinning in sync with actual speed; right: board/motor parameters), auto-read on connect   Import the demo, build it and let your AI assistant generate the FreeMASTER dashboard – a complete motor control setup in about 35 minutes. Examples
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Several gpu crashes/invalid output, when running opengl es cts Hi, For over three years we have been shipping a device on i.MX6QuadPlus, built on Yocto hardknott with Qt 6.3.2 on Weston. As the product grew we started getting more and more crash reports from users, and we could not find a cause in our own code or in Qt. Some of it we did fix - by retuning the DDR timings, disabling shadows in certain views, increasing some internal buffer sizes, and by running the app with GPU_VIV_EXT_RESOLVE=0 - but we still get reports, and a good part of them are GPU related and show up in the log like this: kernel: *** GPU DRV CONFIG *** kernel: Galcore version 6.4.3.336687 kernel: Galcore options: ... kernel: [galcore]: Stop driver to keep scene. That is the driver's own hang report - the monitor timer sees no progress, gckKERNEL_Recovery dumps the GPU state, and since recovery=0 the driver stops serving instead of resetting the core(recovery=1 is not an options for us, due needing to restart every gui application). The screen is frozen for good, Weston often cannot be killed even with SIGKILL, and the only way out is a power cut - which is quite bad for our customers. Since we had already tried a great many things at the Qt and application level and only got workarounds out of it, I decided to stop testing high-level functionality and test the OpenGL ES entry points directly instead - if they behave correctly the fault is ours, and if they do not then it is the driver/hardware fault(at least partial). I did that with VK-GL-CTS (https://github.com/KhronosGroup/VK-GL-CTS), first ported to Rust to make cross-compiling easy(still in progress, so only about half of the relevant cases could be checked so far). Case names are identical to upstream deqp-gles2/gles3/gles31, and everything passes on Mesa llvmpipe and on casual laptop on Ubuntu 24.04 with also mesa driver, so a failure on the board is a statement about the board. I ran it on the hardware over a weekend and with help of AI I was able to find and minimise 14 distinct defects, each now a standalone reproducer: a plain Rust project with no dependencies, cargo build and nothing else, GLSL in its own file.  (just run - runs locally, you can extract just arm parts, into only building step, to gather binary(you need to install first cargo install --locked cargo-zigbuild) Problems still present on 6.4.11.p4, the newest driver we can build for this part: 0001 GPU lockup - synchronization.inter_invocation.ssbo_atomic_read_write, alone, on a freshly booted board. Only a reboot clears it, and the process is unkillable so the reboot itself takes 8-10 minutes. 0002 GPU lockup - synchronization.inter_invocation.ssbo_atomic_overwrite, on its own. 0003 GPU lockup - ten of the twenty synchronization.inter_invocation.* cases hang alone, the other ten do not, so it is a boundary and not "compute is broken". All the atomic ssbo/image variants. All twenty swept ten runs each, every run from its own reboot. 0010 Link failure - 7 ubo cases where both stages read 47 members of the same std140 block. Either stage alone links, together they do not, glGetProgramInfoLog is empty, and nothing is near a limit the driver itself reports (3 blocks per stage vs 16, 704 bytes vs 65536). 47 reads is the least that does it, 46 links. 0011 Wrong result - shaders.invariance.highp.loop_*: two shaders computing invariant gl_Position from the same expression disagree by a few pixels of depth. 0013 Wrong status enum - fbo.completeness.size.distinct: a context requested as ES 2.0 reports ES 3.1, then answers completeness by the ES 2.0 rule and returns an enum ES 3.x does not define. Fixed by the 6.4.3.p2 -> 6.4.11.p4 jump: 0004 GPU lockup - image_load_store.cube.qualifiers.*_r32f (the r32ui/r32i ones beside them were fine) 0006 GPU lockup - image_load_store.* whenever the image is layered, 8 of 21 layered vs 0 of 7 over 2d, intermittent 0005 Client freeze - compute.indirect_dispatch.gen_in_compute.empty_command: glMapBufferRange never returns 0014 Client freeze - the same, via upload_buffer.empty_command, once a dispatch has already been mapped 0007 Wrong result - a chain of eighteen && in a compute shader that also declares an atomic counter comes out false when every term is true (44 of 2007 ssbo.layout cases) 0008 Compiler - the reserved-word table is for the wrong language version, both ways 0009 Wrong result - vec3 == vec3 false for two equal vectors, for a struct member returned through an inout parameter 0012 Compiler - mediump vec2(1.0, 1.0) compiles, where the ESSL 1.00 grammar has no place for a precision qualifier Tested on same board both times: i.MX6QP silicon rev 1.0, 2 GiB DDR, LVDS 1280x1024@60, Weston on fbdev with use-g2d=1, GL_RENDERER "Vivante GC2000+". old: hardknott, BSP imx-5.10.52-2.1.0, kernel 5.10.52, galcore 6.4.3.p2.336687, imx-gpu-viv 1:6.4.3.p2.2-aarch32, Weston 9.0.0.imx, Qt 6.3.2 new: wrynose, BSP imx-6.18.20-2.0.0, kernel 6.18.20, galcore 6.4.11.p4.1190909, imx-gpu-viv 1:6.4.11.p4.6-aarch32, Weston 10.0.5.imx, Qt 6.11.0 CONFIG_MXC_GPU_VIV=y, recovery=0 and stuckDump=0 on both; the timeout went 20000 -> 30000 ms and 6.4.11.p4 adds softReset=1. So the version bump helps, but some problems survived. We will be moving to i.MX8 soon because of i.MX6 availability, but our installed base keeps the i.MX6 hardware either way, so it would be good to see such problems fixed in future Is there any chance these get fixed in a newer version of the driver, even if that forces us to bump the Yocto version? I am afraid this class of problem may to some extent be present on i.MX8 as well, so has any testing with the Vulkan/OpenGL CTS been done, is it being done now, or is it planned? Because without passing that(plus some fuzzing like random executing of cts functions), I do not think our random crashes are fixable in the layers above the driver Re: Several gpu crashes/invalid output, when running opengl es cts Hello, The latest publicly released driver for i.MX 6/7 is imx-gpu-viv 6.4.11.p4.6 , shipped with the wrynose BSP (imx-6.18.20-2.0.0). The release notes describe that jump as bringing "bug fixes, performance optimizations" for the i.MX 6/7/8 line, which matches your observation that 8 of 14 defects were resolved between .p2 and .p4 . And yes, it is being done — but with important caveats by platform. For i.MX8 with Vivante (VSI) GPU — CTS is running. The internal Linux Factory test pipeline runs both opengl-es-cts and vulkan-cts packages against i.MX8 boards as part of every release candidate cycle. Defects found are tracked in the Linux Factory Jira project CTS on i.MX8M Nano, i.MX95. This means the Vivante GC7000-series GPUs in i.MX8M Plus, i.MX8QuadMax etc. do go through systematic conformance testing before each GA release. For i.MX9 with Mali / OSS Mesa  The release notes explicitly state for i.MX 95/952 with the Mesa OSS GPU stack: "OpenGL ES11, Vulkan 1.4.5, and OpenCL 3.0 basic features are working, but conformance tests are not passed."The Mali DDK default path on i.MX9 does pass CTS, but the open-source Panfrost/PanVK path is still being brought to conformance. For i.MX6 (GC2000+) specifically — CTS coverage is minimal No internal evidence was found of systematic deqp/CTS runs against the GC2000+ in the current Linux Factory pipeline. The GC2000+ only supports OpenGL ES 3.0 (not 3.1/3.2), and the test infrastructure appears to target the newer i.MX8/9 boards. Your work with VK-GL-CTS is the most thorough conformance-level testing of this specific IP that is visible in any internal channel.   The bottom line: a future i.MX6 driver patch is not guaranteed, but providing the standalone reproducers via your open support thread is the correct path. For your i.MX8 migration, the conformance situation for the Vivante GC7000-series is materially better than GC2000+, and systematic CTS testing is part of the release process — though even there, active driver bugs in galcore 6.4.11.p4 are still being discovered and filed.   Regards Re: Several gpu crashes/invalid output, when running opengl es cts I don't see an attachment, so looks that I forgot to add it, so I add it again
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KE18F512VLH16 ECC RAM Single Bit Correction I have a follow up question related to @sean_dvorscak's post the other day (KE1 ECC RAM Single Bit Corrrection). @Celeste_Liu replied, ->> If implementing an optional scrub, please align the access according to the actual access size or scrub granularity, not blindly to the raw MCM_LMFAR value. Also don't use a fixed 4-byte access unless you first align the address appropriately and confirm the access size is valid. Can MCM_LMFATR[PEFSIZE] be used to determine the access size? If so, can this be used in tandem with MCM_LMFAR to implement a read-correct-writeback operation? For example, if MCM_LMFATR[PEFSIZE] is 3'b000 indicating an 8-bit access, can I perform an 8-bit read from the address indicated by MCM_LMFAR then perform an 8-bit write to the same address to correct the error. Similarly, if MCM_LMFATR[PEFSIZE] is 3'b010 indicating a 32-bit access, can I perform a 32-bit write to the address indicated by MCM_LMFAR without worrying about alignment? Re: KE18F512VLH16 ECC RAM Single Bit Correction Hello @rseigle77 , I have seen your post. Let me spend some time investigating this issue, and I will get back to you once I have more information. BR Celeste Re: KE18F512VLH16 ECC RAM Single Bit Correction Hello @rseigle77 , Regarding your question, I need to escalate it to our internal team for further investigation. According to our process, please provide the end application name. Thanks for your cooperation. BR Celeste Re: KE18F512VLH16 ECC RAM Single Bit Correction Hi @Celeste_Liu  - P7 is the name of the end application. Re: KE18F512VLH16 ECC RAM Single Bit Correction Hi @Celeste_Liu, is there any update on this? Re: KE18F512VLH16 ECC RAM Single Bit Correction Hello @rseigle77 , Sorry, I still haven't received a response from the internal yet. I'll follow up with them again and make this my top priority. As soon as I hear anything back, I'll let you know right away. BR Celeste Re: KE18F512VLH16 ECC RAM Single Bit Correction Thanks for the response @Celeste_Liu, but that does not answer my question regarding MCM_LMFATR[PEFSIZE]: "Can MCM_LMFATR[PEFSIZE] be used to determine the access size? If so, can this be used in tandem with MCM_LMFAR to implement a read-correct-writeback operation? For example, if MCM_LMFATR[PEFSIZE] is 3'b000 indicating an 8-bit access, can I perform an 8-bit read from the address indicated by MCM_LMFAR then perform an 8-bit write to the same address to correct the error. Similarly, if MCM_LMFATR[PEFSIZE] is 3'b010 indicating a 32-bit access, can I perform a 32-bit write to the address indicated by MCM_LMFAR without worrying about alignment?" Re: KE18F512VLH16 ECC RAM Single Bit Correction Hello @rseigle77 , Thanks for your patience. I got the reply from the internal. ECC "correction" means returning corrected data to the CPU, not fixing the underlying bit stored in SRAM. Automatic repair requires a separate scrub/write-back mechanism. The recommended flow to use software scrub: ECC corrects data on read. Single-bit error interrupt/status is raised. Refer to RM 6.3.1.1 Determining source of the interrupt. MCM_LMPECR[ER1BR]=1 Software reads the fault address. MCM_LMPEIR[PEELOC] = 5'h08 - a 1-bit correctable ECC event from SRAM_L, MCM_LMFAR indicates fault address. Software rewrites the corrected value back to the same address. New ECC syndrome is generated and stored. BR Celeste
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How do I escalate an AT&T issue? Stuck with an AT&T issue that keeps getting passed around without a real fix? AT&T Escalation Support Team ((USA))
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i.MX95: EdgeLock Enclaveキーインポートエラー - SAB CMD [0x47] Resp [0x1829] (無効な署名) チームの皆さん、こんにちは。 現在、アプリケーションノート AN14898 のガイドラインに従い、 i.MX95 デバイスへの秘密鍵のインポート作業を進めています。 環境と参考文献: 対象デバイス: i.MX95 デモアプリケーション: imx_sec_apps/imx-ele-apps SPSDKバージョン:最新の標準ツールセット これまでに完了した活動: Python、pip、およびSPSDKツールセットをインストールしました。 ホストとデバイスの両方のアプリケーションを無事に構築しました。 device/bin/ele_key_import と device/scripts/run_test_on_board.sh をターゲットのi.MX95ハードウェアにコピーしました。 デバイス側のフローを実行して、nxp_prod_ka_puk.bin を生成しました。 nxp_prod_ka_puk.binをホスト環境に転送しました。 最終的な生産キーがまだ手に入っていないため、SPSDKドキュメントによるとSPSDKユーティリティを使ってSRKキー(secp384r1)を生成しました。 ホスト側で標準キーインポートテンプレート(-kパラメータをsecp384r1に設定)を使用してsigned_msg.binを生成しました。 生成されたsigned_msg.binファイルをi.MX95ハードウェアに転送しました。 署名付きメッセージを生成するために使用したコマンド: nxpimage signed-msg export -c key_exchange_temp.yaml -w assets 参考資料として、key_exchange_temp.yaml ファイルを添付します。 i.MX95ターゲットデバイスでrun_test_on_board.shを実行すると、すべてのファイルは見つかりますが、EdgeLock Enclaveが署名済みメッセージブロックの署名を拒否します。以下はターゲット端末のログです。 nxp_prod_ka_puk.bin が存在します。 oem_public_key.pem が存在します。 signed_msg.bin が存在します。 こんにちは、世界! 2026年7月16日 06:54:40 9547bbd 署名付きメッセージ:728バイト 02d802890200000000000000b8000000000000000000000000000000000000000000000000000000000000000000000000000000e6a7000000004701000000000000000000000000000000004707000000454c45090102090000000000920001010000000040000009010008000000000100000000000070577819deccdf2670d801e8f4291d3539081da49b1e1b63d55039e5993242b30f0000000000000000000000000000000000000000000000000000000000000000011c029000001000b40100000000000000a4015a01000000d7340143e14c00270102000030003000c2a99777d1fc00dc7e14d3d43ac3f68a44d9b52c882d3c09eac0db7fac1901242576bac6143785e5815db546e385d81000000000000000000000000000000000e14c00270102000030003000e358e1159c0cb645e7059c1b04b49e39b3563167472507278245d4dee439dd32e7ce3da413e397cbd7959cf147d25c2300000000000000000000000000000000e14c00270102000030003000482fb4f1ceb6e266221b0a13dbbb04c637a1c238b76b108397e98eb4557cafb2075036e05b9a0ee4fa6aa09a5f3951e500000000000000000000000000000000e14c00270102000030003000c93a6b4881ae912da31da8249e4f58473eb88cc1dc46f5ec6d363dc52b8a5c12c91e711ad726153d382dabbe6bef27cc000000000000000000000000000000000068005d00000000a5e31e11bfb02c62756d9d3ba5152768e5bea9aab8f3f13ccf3bd287a0438e9708088cafc5671e2aaf1bc3b413457b6a59a691dcef672fa65dac12ed328effac963c41ec0200b0a9acf67e0f2755f752872f77d2c20d6987f80e8008ac26de3d006800d800000000f4cf9cc965b3643d5dc5c5070a506196649daf898d328afd18e88eb9ece96e39646bf6385b9d42e1fc2f93f07f66e9c8c914becef9394c0c3cf549766483c7f94b6a9325bea51b79280eb76484e064637570c0ef7387ec0ffb8398ec36966c3a00000000 OEMインポートPUK:65バイト 0451c46d24d30864c5275c634a3a339949654b34c0a4f294a8c107c504360ff4b 55044918b71b16109a7bbfba8fbcf49b91720ad8e9c0109e6b2eed8f6a504ab64 hsm_open_session 成功 hsm_open_key_store_service 成功 hsm_open_key_management_service 成功 SAB エラー: SAB CMD [0x47] Resp [0x1829] - SIGNED メッセージの署名が無効です。 hsm_key_exchange が失敗しました エラー:0xfe 鍵交換に失敗しました: 254 i.MX95の署名検証問題の解決方法について何かご存知でしたら、ぜひご教示ください。 ありがとう、 アンキット・アグラワル Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 SRK生成後にSRKHを焼却するのかどうか疑問に思っています。必要なsign.yamlファイルについては、添付ファイルをご確認ください。 以下のコマンドをお試しください(前提条件としてflash.binファイルが必要です)。システムのブートローダー)を使用してSRKHを生成します。 nxpimage ahab sign -c sign.yaml -b flash.bin -o flash_directsign.bin -fs 出力 出力は以下のようになります。 Jessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.pngJessie_Lee_0-1786699088609.png そしてOuputsフォルダからはbcfファイル(ahab_oem0_srk0_hash_nxpele.bcf)が見えます。 下のフューズコマンド(インデックス128~143)に従って、SRKHでフューズする必要があると説明できます。 # nxpele AHAB SRKH がプログラミングスクリプトを融合 # SPSDK 3.4.0 によって生成されました # ファミリ: mimx9596, Revision: latest # 値: 0xCCC0605919B6400771CF88A002FB6BF27DFA9CE09BAD94516DD7E4D399369A8FF5A6A1A671809DF4A71A7CB208B4EDC009CDF3FF25EC074DECBBEE8300D5D44C # 説明: 4 つの SRK キーのハッシュの SHA512 ハッシュダイジェスト # グループ化されたレジスタ名: SRKH # OTP ID: OEM_SRKH0、値: 0x5960C0CC write-fuse --index 128 --data 0x5960C0CC # OTP ID: OEM_SRKH1、値: 0x0740B619 write-fuse --index 129 --data 0x740B619 # OTP ID: OEM_SRKH2、値: 0xA088CF71 write-fuse --index 130 --data 0xA088CF71 # OTP ID: OEM_SRKH3、値: 0xF26BFB02 write-fuse --index 131 --data 0xF26BFB02 # OTP ID: OEM_SRKH4、値: 0xE09CFA7D write-fuse --index 132 --data 0xE09CFA7D # OTP ID: OEM_SRKH5、値: 0x5194AD9B write-fuse --index 133 --data 0x5194AD9B # OTP ID: OEM_SRKH6、値: 0xD3E4D76D write-fuse --index 134 --data 0xD3E4D76D # OTP ID: OEM_SRKH7、値: 0x8F9A3699 write-fuse --index 135 --data 0x8F9A3699 # OTP ID: OEM_SRKH8、値: 0xA6A1A6F5 write-fuse --index 136 --data 0xA6A1A6F5 # OTP ID: OEM_SRKH9、値: 0xF49D8071 write-fuse --index 137 --data 0xF49D8071 # OTP ID: OEM_SRKH10、値: 0xB27C1AA7 write-fuse --index 138 --data 0xB27C1AA7 # OTP ID: OEM_SRKH11、値: 0xC0EDB408 write-fuse --index 139 --data 0xC0EDB408 # OTP ID: OEM_SRKH12、値: 0xFFF3CD09 write-fuse --index 140 --data 0xFFF3CD09 # OTP ID: OEM_SRKH13、値: 0x4D07EC25 write-fuse --index 141 --data 0x4D07EC25 # OTP ID: OEM_SRKH14、値: 0x83EEBBEC write-fuse --index 142 --data 0x83EEBBEC # OTP ID: OEM_SRKH15、値: 0x4CD4D500 write-fuse --index 143 --data 0x4CD4D500 Below Commandを使ってSRKHを焼くこともできます nxpele -f mimx9596 バッチ出力\ahab_oem0_srk0_hash_nxpele.bcf 既にSRKHを書き込んだものの、下記の無効な署名エラーで失敗した場合は、singed_message.binとSRKH(srkの出力すべてを含む)を弊社までお送りください。 Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 社内チームがお客様の問題を調査しており、進捗状況については追ってご連絡いたします。 その間に、あなたが直面している問題と似た以下のケースをぜひご覧ください。 推奨される解決策は、 fuse_versionが正しく一致していることを確認することです。 https://community.nxp.com/t5/i-MX-Processors/hsm-import-key-returns-with-0xF0-Bad-Signature/td-p/2163777 よろしくお願いします。 よろしくお願いいたします。 リチャード Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 SPSDKを使用してSRKを書き込むには、以下の手順に従ってください。 ステップ1 。デバイスを起動したら、u-bootコンソールで停止し、以下を実行します。 u-boot=> fastboot 0 ステップ2 。SPSDKコンソールでは、以下のコマンドを使ってahabイベント情報が発生していない必要があります。 NXPELE -f mimx9596 get-events ステップ3 。イベントがなければ、今すぐSPSDKコンソールでSRKキーを焼くことができます。 nxpele -f mimx9596 バッチ出力\ahab_oem2_srk0_hash_nxpele.bcf BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Jessie_Lee さん。 情報ありがとうございます。 私たちは フラッシュビン ファイルを取得し、SRKHを生成するために必要な手順を実行できます。 SRKHを生成した後、それをハードウェアに融合させる必要があります。ヒューズ操作を実行するには、ハードウェア/ボードが ファストブートモード。デバイスをFastbootモードに切り替えるのを手伝ってもらえますか? キーの融合を試みた際に、以下のエラーが発生しました。 Ankit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.pngAnkit_Agrawal_0-1787636692485.png デバイスが現在Fastbootモードになっていないようです。ボード上でFastbootモードを有効にする方法についてご教示いただければ幸いです。 ありがとう、 アンキット Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) @Jessie_Lee 下記に示すように、不具合が発生しているとの報告があります。サポートを得ることは可能でしょうか? -------------------------------------------------------------------------------------------------------------- しかし、ヒューズ操作を実行するコマンドを実行すると、以下のエラーが発生します。 ハードウェアのリセットも試してみましたが、依然として同じ問題が発生しています。なぜこうなっているのか、何かアイデアはありますか? rakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.pngrakhyoung_0-1789101296622.png @Ankit_Agrawal 必要であれば、追加の説明を遠慮なく提供してください。 Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) @Ankit_Agrawalさんによると、fastboot に入る際に問題が発生したとのことです。 @rakhyoungあなたもfastbootに入る際に問題が発生しているということですか? 上記で共有した以下のコマンドを試してみましたか?u-bootステージでfastboot 0より下のレベルを実行しようとした際に発生するエラーは何ですか? ステップ1 。デバイスを起動したら、u-bootコンソールで停止し、以下を実行します。 u-boot=> fastboot 0 BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Jessie_Leeさん 返信が遅くなり申し訳ありません。 デバイス側のU-Bootコンソールで正常に停止することに成功しました。しかし、ホスト側から以下のコマンドを使用してキーを融合しようとすると、次のエラーが発生します。 nxpele -f mimx9596 -p /dev/ttyUSB1 batch outputs/ahab_oem2_srk0_hash_nxpele.bcf 以下のエラーが発生しました。 Screenshot from 2026-09-13 21-29-30.pngScreenshot from 2026-09-13 21-29-30.pngScreenshot from 2026-09-13 21-29-30.pngScreenshot from 2026-09-13 21-29-30.pngScreenshot from 2026-09-13 21-29-30.pngScreenshot from 2026-09-13 21-29-30.png2026-09-13 21-29-30 のスクリーンショット.png ハードウェアのリセットも試してみましたが、依然として同じ問題が発生しています。なぜこうなっているのか、何かアイデアはありますか? ありがとう、 アンキット Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Jessie_Lee さん。 添付のログをご確認ください。ご指示いただいた手順を実行しました。 Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawalさん fastbootからuboot(コンソール)に入って、ホスト側でspsdkを実行するまでの全ステップログを共有していただけますか? あなたはu-boot経由でfastbootに入ったのだと思います。右? すべての手順(FastBootの入り、AHABイベントチェック、フューズ試行など)をホスト側のログで共有してください。 スナップショットではなく、ファイルを通してすべてのログを確認できると助かります。 BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは@Jessie_Lee fastbootエントリ、イベント情報やヒューズを確認するホスト側の手順、デバッグログファイルの添付ログをご覧ください。 ありがとう、 アンキット Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawalさん 添付のログからは、Aコアのubootコンソールログは見つかりませんでした。(ターゲットボード)ubootコンソールでfastbootに入るとき、これを確認してもらえますか?PORのubootログ全文を共有してください SPSDKは「=>」文字によってU-Bootコンソールを検出しているようです。 ブート遅延値はいくつですか?(ubootコマンド「printenv bootdelay」で確認できます。)それともubootコマンド「setenv bootdelay 3;saveenv」でbootdelayを追加して、もう一度試してみることはできますか? BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 fastboot が起動しているかどうか、uboot ログを確認していただけないでしょうか。 以下はログの一部で、「不明なコマンド」というログが表示されています。このfastbootはU-Bootコミュニティの機能であり、NXPのBSPにも搭載されていますが、お使いのソフトウェア環境にはありません。 BSPチームがこの機能を削除するかどうかについては、BSPチームと話し合う必要があります。 ちなみに、NXPは最近ELE/V2Xの最新ファームウェアを公開しましたが、あなたのファームウェアは最新版ではないようです。 セキュリティ内部チームと連携して、FW版の同期を依頼してください。(ちなみに、このFWバージョンはfastboot機能のイネーブルメントとは関係ありません) Jessie_Lee_0-1789613044617.pngJessie_Lee_0-1789613044617.png BR ジェシー BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 BSPチームに確認したところ、fastbootはデフォルトのu-bootから削除されているとのことです。 つまり、fastbootモードを直接使ってSRKを融合することはできません。 SRKを燃やすためのSPSDKツールの代わりに、以下のいずれかの方法を使うことができます。ご存知の通り、あなたのチームはすでにfuse_accessアプリケーションを使ってカーネルレベルでのフューズアクセス(読み書き)を処理しています。どんな方法でもSRKを焼くのは問題ないかもしれません。 Jessie_Lee_0-1789713874158.png BR ジェシー Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Jessie_Lee さん。 統合に向けて、引き続きご指導とご支援いただき、誠にありがとうございます。 i.MX95 セキュア・エンクレーブの提案手順と手順を検討しましたが、提案された方法は事前構築または静的設定を必要とするため、現行アーキテクチャでは実現不可能と判断しました。私たちの実装では、実行時に鍵をプロビジョニングおよび管理することが厳密に求められます。 私たちの要件を満たすための代替方法や専用の ランタイムインポートキーAPI があれば教えていただけますか? 参考までに、 インポートキーAPI は2つの特定のユースケースのために実装に必須です。 ランタイム証明書のインストール: フロー中、アプリケーションは暗号化された契約証明書と秘密鍵を受け取ります。アプリケーション側でこれを復号した後、秘密鍵は実行時に動的にインポートまたは保存されなければなりません。 テストと検証: 現在の開発および検証段階では、既存の事前生成されたテストキー(契約証明書やルート証明書キーなど)をアプリケーション側のSecure環境に注入し、エンドツーエンドの通信フローとメッセージ署名を検証する必要があります。 事前構築のセットアップサイクルなしでこのダイナミックインジェクションを実現する方法について、ご意見をいただけるとありがたいです。 よろしくお願いします、 アンキット       Re: i.MX95: EdgeLock Enclave Key Import Error - SAB CMD [0x47] Resp [0x1829] (Invalid Signature) こんにちは、 @Ankit_Agrawal さん。 キーインポート機能の実装方法についてさらに詳しくお伺いしたいのですが、現在の状況を教えていただけますでしょうか?今の方法では、あなたの側でも効果がありますか? キーインポート機能の変更に関するご要望を検討するにあたり、まず相手側の環境を理解する必要があります。あなたの側面の状況を理解する手助けをしてもらえますか? 「エンドツーエンドの保護」が十分に安全であることを理解する必要があります。 例えば、 * 相手側はどのようにしてこの暗号化された契約証明書と秘密鍵を生成するのですか? * あるいは、LG/GM側では、ブロブの暗号化キーはどのように生成されるのでしょうか? * この部品のGM仕様または仕様番号を教えていただけますか?  その後、お客様のコンセプトを理解し、セキュリティコアチームと協議してサポートいたします。  BR ジェシー
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カラー/旧型スクリーン(IVI-SHELL搭載) IMX8QXP - スカースギャップ - L 6.6.52-weston 12-ivishell 更新された画面の前に、カラー/古い画面が表示されます。回避方法/解消方法/削除方法。 weston.ini [コア] #gbm-format=argb8888 アイドルタイム=0 shell=ivi-shell.so # use-g2d=1 ウィンドウの再描画=16 # pageflip-timeout=0 背景色=0x00000000 [libinput] touchscreen_calibrator=true [出力] 名前=LVDS-1 モード=1280x720@60 [アイヴィシェル] ivi-shell-user-interface=weston-ivi-shell-user-interface ivi-input-module=ivi-input-controller.so ivi-id-agent-module=ivi-id-agent.so input-method=ivi-input-controller(入力-コントローラ) ベースレイヤーID=1000 ベースレイヤーIDオフセット=10000 workspace-background-layer-id=2000 workspace-layer-id=3000 application-layer-id=4000 遷移期間=0 [デスクトップアプリデフォルト] デフォルトサーフェスID=2000000 デフォルトサーフェスID最大値=2001000 i.MX 8ファミリ | i.MX 8QuadMax (8QM) | 8QuadPlus Re: Coloured/Old Screen with IVI-SHELL こんにちは、 提案された方法を試してみましたが、状況は変わりませんでした。カラー画面(旧式の画面)がまだ表示されています。 他に何か提案や設定が必要なことはありますか? ありがとうございます。 VKS Re: Coloured/Old Screen with IVI-SHELL こんにちは、 背景色を0x00000000に変更し、gbm-formatのコメントを解除してみてください。 また、WestonのsystemdサービスにPre-startステップを追加して、Westonが初期化する前にディスプレイを消去することもできます: echo 1 > /sys/class/graphics/fbx/blank よろしくお願いいたします。 Re: Coloured/Old Screen with IVI-SHELL こんにちは、 最新情報のご提供ありがとうございます。 この問題は以前のweston-imx-10.0.1で報告されており、このパッチで解決済みです。 diff --git a/libweston/renderer-g2d/g2d-renderer.c b/libweston/renderer-g2d/g2d-renderer.c index 245a50de..d9df8b4e 100644 --- a/libweston/renderer-g2d/g2d-renderer.c +++ b/libweston/renderer-g2d/g2d-renderer.c @@ -2199,6 +2199,7 @@ drm_create_g2d_image(struct g2d_surfaceEx* g2dSurface, buffer->buf_vaddr = vaddr; buffer->buf_size = size; g2dSurface->base.planes[0] = buffer->buf_paddr; + memset(buffer->buf_vaddr, 0x00, size); g2dSurface->base.left = 0; g2dSurface->base.top = 0; g2dSurface->base.right = w; バッファを入手したときにmemsetを追加すれば、Weston開始時にバッファをクリアできます。 最新のweston-imx-15.0.1では、この点が変更され、ポートが必要になります。 社内チームはgl-rendererで問題が発生していないと確認したので、gl-rendererを使って問題を回避できるかどうか確認してもらえますか?(# use-g2d=1)。 また、動作をよりよく理解するために、画面に何が表示されているかを共有していただけると助かります。 よろしくお願いいたします。 Re: Coloured/Old Screen with IVI-SHELL こんにちは、 画像はこちらです。 はい、 use-g2d=1を使用することでカラー画面は回避できました。しかし、フレーム落ちが発生し、動画も再生されませんでした。 それともう一つ、もし私が使ったらuse-g2d=1、これはソフトウェアアクセラレーション用ですよね?でもフレームロスを避けるためにハードウェアアクセラレーションが必要です。確認してください。 ありがとうございます。 VKS
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Moisture detection using NX20P0477UKZ Hello Team, We have developed custom board using P/N: NX20P0477UKZ. We are not able to detect moisture detection. In our design we are using 1.5meter cable to connect Mobile phone. So one end of cable is connected with our custom board and other end of cable is exposed to external world for Mobile connection.  So when we try to detect moisture from cable which is exposed to external world. we are not able to detect moisture. Please guide us to resolve this issue. Thanks Re: Moisture detection using NX20P0477UKZ Hello kadamm Good day! The NX20P0477 is intended to operate when no device is connected, and its main purpose is to prevent connection under moisture conditions by asserting FLAGB beforehand. Once a cable or device is connected (a mobile phone is connected even via a cable), the electrical conditions on the CC lines become more complex, and the presence of water together with an active connection introduces unpredictable behavior. Therefore, the device cannot reliably distinguish or detect moisture events under these conditions. I hope this information has helped you, please let me know if you need help with anything else. Have a great day and best of luck. Re: Moisture detection using NX20P0477UKZ Hello Rafar. Thanks for your quick response. We are performing test without connection of any device. As per our application, we are connecting one of cable to our on board type c connector and other end of cable is left opened. We are dipping opened end of cable into water but Flag pin (C1) is always high and not able to detect moisture.  We are making CP_EN(B2) pin as high to detect moisture. Could you please suggest us how can we validate functionality? Thanks
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imx93 – USB Disconnect During UUU Serial Downloader Boot Dear NXP Team, We are currently debugging our i.MX93 custom board using the MIMX9352AVTXMAC processor. Our board uses LPDDR4 with a two-rank memory configuration. We are trying to program the onboard eMMC using UUU (Universal Update Utility). The board is configured in Serial Downloader / USB boot mode. The i.MX93 is detected correctly by UUU: uuu -lsusb uuu (Universal Update Utility) for nxp imx chips -- libuuu_1.5.243-10-g59c7638 Connected Known USB Devices   Path   Chip   Pro   Vid   Pid   BcdVersion   Serial_no   ====================================================================   3:1   MX93   SDPS:   0x1FC9  0x014E   0x0001   We are using the following command to program the eMMC: sudo uuu -v -b emmc_all \ imx-boot-imx93evk-sd.bin-flash_singleboot \ image-imx93evk-20260905081644.rootfs.wic.zst UUU detects the i.MX93 and starts the SDPS boot command. However, immediately after starting the bootloader transfer, the USB connection is lost. The relevant UUU log is: uuu (Universal Update Utility) for nxp imx chips -- libuuu_1.5.243-10-g59c7638 Build in config:   Pctl   Chip     Vid   Pid   BcdVersion   Serial_No   ==================================================   SDPS:   MX8QXP     0x1fc9   0x012f   [0x0002..0xffff]   SDPS:   MX8QM     0x1fc9   0x0129   [0x0002..0xffff]   SDPS:   MX8DXL     0x1fc9   0x0147   SDPS:   MX28     0x15a2   0x004f   SDPS:   MX815     0x1fc9   0x013e   SDPS:   MX865     0x1fc9   0x0146   SDPS:   MX8ULP     0x1fc9   0x014a   SDPS:   MX8ULP     0x1fc9   0x014b   SDPS:   MX93     0x1fc9   0x014e   SDPS:   MX91     0x1fc9   0x0159   SDPS:   MX95     0x1fc9   0x015d   SDPS:   MX95     0x1fc9   0x015c   SDPS:   MX943     0x1fc9   0x0027   SDPS:   MX952/IMX937   0x1fc9   0x0028   SDP:   MX7D     0x15a2   0x0076   SDP:   MX6Q     0x15a2   0x0054   SDP:   MX6D     0x15a2   0x0061   SDP:   MX6SL     0x15a2   0x0063   SDP:   MX6SX     0x15a2   0x0071   SDP:   MX6UL     0x15a2   0x007d   SDP:   MX6ULL     0x15a2   0x0080   SDP:   MX6SLL     0x1fc9   0x0128   SDP:   MX7ULP     0x1fc9   0x0126   SDP:   MXRT106X   0x1fc9   0x0135   SDP:   MX8MM     0x1fc9   0x0134   SDP:   MX8MQ     0x1fc9   0x012b   SDPU:   SPL     0x0525   0xb4a4   [0x0000..0x04ff]   SDPV:   SPL1     0x0525   0xb4a4   [0x0500..0x9998]   SDPV:   SPL1     0x1fc9   0x0151   [0x0500..0x9998]   SDPU:   SPL     0x0525   0xb4a4   [0x9999..0x9999]   SDPU:   SPL     0x3016   0x1001   [0x0000..0x04ff]   SDPV:   SPL1     0x3016   0x1001   [0x0500..0x9998]   FBK:        0x066f   0x9afe   FBK:        0x066f   0x9bff   FBK:        0x1fc9   0x0153   FB:        0x0525   0xa4a5   FB:        0x18d1   0x0d02   FB:        0x3016   0x0001   FB:        0x1fc9   0x0152   FB:        0x0483   0x0afb   FB:        0x1d6b   0x0104 Run built-in script: uuu_version 1.4.149 # @_flash.bin            | bootloader, which can extract from wic image # @_image   [_flash.bin] | wic image burn to emmc. # This command will be run when i.MX6/7 i.MX8MM, i.MX8MQ SDP: boot -f imx-boot-imx93evk-sd.bin-flash_singleboot -scanlimited 0x800000 # This command will be run when ROM support stream mode # i.MX8QXP, i.MX8QM SDPS: boot -scanterm -f imx-boot-imx93evk-sd.bin-flash_singleboot -scanlimited 0x800000 # These commands will be run when use SPL and will be skipped if no spl # SDPU will be deprecated. please use SDPV instead of SDPU # { SDPU: delay 1000 SDPU: write -f imx-boot-imx93evk-sd.bin-flash_singleboot -offset 0x57c00 SDPU: jump -scanlimited 0x800000 # } # These commands will be run when use SPL and will be skipped if no spl # if (SPL support SDPV) # { SDPV: delay 1000 SDPV: write -f imx-boot-imx93evk-sd.bin-flash_singleboot -skipspl -scanterm -scanlimited 0x800000 SDPV: jump -scanlimited 0x800000 # } FB: ucmd setenv fastboot_dev mmc FB: ucmd setenv mmcdev ${emmc_dev} FB: ucmd mmc dev ${emmc_dev} FB: flash -raw2sparse all imx-boot-imx93evk-sd.bin-flash_singleboot FB: flash -scanterm -scanlimited 0x800000 bootloader imx-boot-imx93evk-sd.bin-flash_singleboot FB: ucmd if env exists emmc_ack; then ; else setenv emmc_ack 0; fi; FB: ucmd mmc partconf ${emmc_dev} ${emmc_ack} 1 0 FB: done Wait for Known USB Device Appear... New USB Device Attached at 3:1-6A440AB426084436 3:1-6A440AB426084436>Start Cmd:SDPS: boot -scanterm -f imx-boot-imx93evk-sd.bin-flash_singleboot -scanlimited 0x800000 3%3:1-6A440AB426084436>Fail HID(W): LIBUSB_ERROR_NO_DEVICE (-4)(0.024s) While sending the boot command, we also monitored the Linux USB messages using dmesg. The i.MX93 USB device is disconnected and then enumerates again, refer the attached screenshot of the dmesg. We would appreciate your guidance on the following questions: Is this USB disconnect/re-enumeration expected during the i.MX93 SDPS bootloader handoff when using UUU? What does the following error indicate in this specific situation? Fail HID(W): LIBUSB_ERROR_NO_DEVICE (-4) Are there any specific requirements for the following signals during the SDPS-to-SPL/U-Boot handoff that we should verify on the custom board? POR_B RESET_B USB_VBUS USB_DP/DM Processor power rails LPDDR4 power rails System/reference clocks   Could you please provide a reference design, or software/boot configuration example for the i.MX93 MIMX9352AVTXMAC with a two-rank LPDDR4 memory configuration? In particular, we would like to confirm the recommended LPDDR4 device configuration, memory initialization/training configuration, and corresponding IMX_BOOT/SPL configuration for a two-rank memory design. We would appreciate your guidance on the above issue and request you to provide the relevant details, recommended configuration, and reference design/code for the two-rank LPDDR4 configuration. Thanks & Regards, Abishek Re: imx93 – USB Disconnect During UUU Serial Downloader Boot Hi @pengyong_zhang , Please refer the attached LPDDR4 schematics and configuration .mex for your reference. Regards, Abishek Re: imx93 – USB Disconnect During UUU Serial Downloader Boot Hi @AbishekDevan  1. This is not the expected behavior. 2. This error occurred because the device disconnected during the flashing process. please share the customer's DDR schematic file and configuration page. B.R Re: imx93 – USB Disconnect During UUU Serial Downloader Boot Hi @AbishekDevan  i cannot import your .mex file successfully. Please share a screenshot of your DDR configuration page. B.R
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LPC55S0x CANFDは1Mbps(仲裁段階)および8Mbps(データ段階)をサポートできますか? こんにちは、NXPさん。 LPC55S0xは仲裁段階で1Mbps、データ段階で8Mbpsをサポートできますか? LPC55S0xのデータシートには見つかりません。 ありがとうございました。 LPC55xx Re: Can LPC55S0x CANFD support 1Mbps (arbitartion stage) and 8Mbps(data stage) こんにちは、ハリーさん。 わかった。 ありがとう。 Re: Can LPC55S0x CANFD support 1Mbps (arbitartion stage) and 8Mbps(data stage) こんにちは、 @jimmyli はい、LPC55S0x CAN-FDコントローラは、MCAN機能クロックが96 MHzで、外部CAN-FDトランシーバーおよび物理ネットワークが8 Mbit/sをサポートしている場合、1 Mbit/sの仲裁と8 Mbit/sのデータに設定可能です。 データシートにこれが直接記載されていない理由は、ビットレートが固定の最大値として指定されているのではなく、MCANクロックとNBTP/DBTPタイミングレジスタから導出されるためです。CANクロックはCANCLKDIV = 0(割り算)で、LPC55S0xの最大クロック周波数は96 MHzで、main_clkを使用できます。 BR ハリー
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AT&Tで問題をエスカレートさせるにはどうすればよいですか? 誰も解決してくれないAT&Tの問題に悩まされていませんか?AT&Tエスカレーション サポート チーム(米国)
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S32K118EVB2Q048:ADCの読み取り値が選択されたMCUの電源電圧と一致しない こんにちは、NXPチームの皆様、 私はS32K118EVB2Q048ボード(回路図SCH-47530 Rev A1)を使用してADCをテストしています。入力電圧が約3.3Vを超えると、誤った測定値が表示されます。 セットアップ: - MCU:S32K118(48-LQFP) - IDE:[S32 Design Studio版] - ドライバ:[RTDバージョン/SDKバージョン/ベアメタル] - ADCチャネル:[例:PTA7 – ADC0_SE3] - 解像度:12ビット - 入力:[外部直流電源/搭載ポテンショメータ] - ジャンパー:J10 = 2-3(5V)、J107、J15 - 基板電源:[USB / 12V] 問題: J10を2-3に設定してMCUを5Vで動作させています。 - 入力 4.10 V: 生データ = 4095。5Vの基準電圧であれば、約3358を期待していました。 - 4V~5Vの入力:常に4095(フルスケール)。 - 5Vで計算すると、入力電圧が高くなるにつれて誤差が大きくなります。 質問: SCH-47530 Rev A1では、J10を2~3に設定するだけでVDDAとADCの基準電圧が5Vになりますか?それとも他に何か変更する必要はありますか(J15、J107、抵抗など)? このEVBの動作するS32K118 ADCの例を5Vの基準でテストしたものを共有してもらえますか?また、解像度のために異なる異なる計算範囲も教えてもらえますか? Re: S32K118EVB2Q048: ADC readings do not match the selected MCU supply voltage こんにちは どのRTD/SDKバージョンを使っているか教えてもらえますか? また、PTA7を使っているのはわかりますが、ADC_POTも言及されていましたね。ADC_POTは接続されていません。なぜならR761はEVBに登録されていないからです: あなたはJ3.1ヘッダーを介してPTA7を使用しているものと想定します。 J10とJ107の両方が2-3に設定されていることを確認し、VDDを測定して、実際に5Vに設定されていることを確認してください。 RTDパッケージの Adc_Pdb_Ip_example_S32K118 を使い、メインをループに改造して SW 変換を始めるだけです: while(1) { /* Start a software trigger conversion */ Adc_Ip_StartConversion(ADCHWUNIT_0_VS_0_INSTANCE, ADC_IP_INPUTCHAN_EXT2, TRUE); /* Wait for the notification to be triggered and read the data */ while (notif_triggered != TRUE); notif_triggered = FALSE; delay(1000); } その後、電源ユニットで0Vから5Vの間で測定し、正しい値が確認できました。 ADC0_SE2 @3.3V: ADC0_SE2 @5V: 最後に、ADC_SC2[REFSEL]でREFSELが正しく設定されているか確認してください。 よろしくお願いします、 ジュリアン
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IoT ToolboxアプリがKW45-EVK – NXP OTAPサンプル使用時にOTAPメニューでクラッシュする こんにちは、 現在、 NXP OTAPのサンプルプロジェクト を KW45-EVK ボード 上で 実行 し、 NXP IoT Toolbox モバイルアプリケーションをOTAPプロセスに 使 おうとしています。 しかし、 OTAPメニュー のIoT Toolboxアプリで問題が発生しています 。 問題 IoT ToolboxアプリでOTAPメニューを開いてスキャンを開始すると: スマホで 位置情報がオフの場合 、 スキャン ボタンを押すと 読み込み/スキャン表示が表示されますが、アプリはデバイスを見つけられません。 位置情報がオンの場合、 OTAPメニュー中にアプリケーションがクラッシュします。 複数のAndroid端末 で試 しました が、問題は変わりませんでした。 まれに、KW45-EVKデバイスがスキャン結果に一瞬だけ現れるのを一瞬だけ見かけることがあり、その後アプリケーションがクラッシュします。 私が試したこと 複数のスマートフォンでテスト済み。 位置情報サービスのオン/オフ両方でテストしました。 スキャンを複数回繰り返した。 KW45-EVKがNXP OTAPのサンプルプログラムを実行していることを確認しました。 私がテストしたすべてのスマートフォンで、この現象は再現可能です。 NXP IoT ToolboxのOTAPアプリケーションとKW45-EVK で同様の問題を経験した方はいらっし ゃいますか? これをさらにデバッグしたり、IoT Toolboxアプリを使ってOTAPをうまく実行する方法について、何かアドバイスがあれば教えてください。 よろしくお願いします! Re: IoT Toolbox app crashes in OTAP menu when using KW45-EVK – NXP OTAP example こんにちは、お元気でお過ごしでしょうか。 ご報告ありがとうございます。同様の問題を再現できたため、現在社内チームと調査を進めております。 その間に、以下の情報を教えていただけますか? どのモデルとAndroidバージョンのデバイスでテストしましたか?どのバージョンのIoT Toolboxでテストしましたか?Androidで「およその位置」と「正確な位置」を使う場合、挙動に違いを感じますか? 補足として、iPhoneデバイスでこの問題は発生しなかったため、これはAndroid特有の挙動であることが確認されました。 今のところ、可能であればiPhoneデバイスを使用するか、ボード間接続を利用することをお勧めします。詳しい情報が入り次第、すぐにお知らせします。 よろしくお願いします、 ソフィア。 Re: IoT Toolbox app crashes in OTAP menu when using KW45-EVK – NXP OTAP example Androidバージョン:13 IOT Toolboxの最新バージョン 「AndroidでApproximate LocationとPrecise Locationを使っている場合、挙動に違いを感じますか?」 検査はしていません。
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About S32 Design Stdio's Functional Safety Evaluation Hello community: In the assessment of the project, I encountered some problems, and I would like to ask for help: one of the functional safety assessment is the confidence assessment of tools, and we need to assess whether the relevant tools in the software development process can meet the requirements of ASIL level, and how to ensure that S32DS, as a default tool that comes with the free software, can meet the functional safety level of software development? Is there any corresponding certificate or certification? Re: 关于S32 Design Stdio的功能安全评估 Hello Mike    We also meet this problem, can you share the documents to me.     Email: [email protected]  Re: 关于S32 Design Stdio的功能安全评估 Hi,  I sent you requested document via private message.  Re: 关于S32 Design Stdio的功能安全评估 Hi Mike,         If possible, could you please send the tool chain Classification report and Safety Manual to me?thanks; My email address:[email protected]; Re: 关于S32 Design Stdio的功能安全评估 Could you send my E-mail for the Tool Chain Classification Report and Tool Chain Safety Manual? Thank you very much. My E-mail is jiandong.chao @d aisch.com Re: 关于S32 Design Stdio的功能安全评估 Hi Mike, Can you send me the TCR and TSM documents to me [email protected]. Thank you. Shoubing Re: 关于S32 Design Stdio的功能安全评估 Could you send my E-mail? Thank you very much. My E-mail is [email protected] Re: 关于S32 Design Stdio的功能安全评估 Hi Mike, Could you send me a copy if you can? I'm also currently experiencing a problem regarding the functional safety assessment of the S32 DS, thanks! Re: 关于S32 Design Stdio的功能安全评估 Hello Derrick, We are only willing to provide the TCR and TSM documents at this time. Best regards, Mike Re: 关于S32 Design Stdio的功能安全评估 Hi Derrick, I need to check with my source for the documentation. I currently don't have access to the documents you requested. Best Regards, Mik Re: 关于S32 Design Stdio的功能安全评估 Hi,Mike: on this?I don't quite understand.Could you be more specific? Thanks! BR Derrick Re: 关于S32 Design Stdio的功能安全评估 Checking on this. Re: 关于S32 Design Stdio的功能安全评估 Hi,Mike: Can you send me the TCQR file and other files? thank you! BR! Derrick Re: 关于S32 Design Stdio的功能安全评估 I also need this document, please help to forward me a copy, thank you! [email protected] Re: 关于S32 Design Stdio的功能安全评估 Hi Derrick, I sent you the files on PM. Best Regards, Mike Re: 关于S32 Design Stdio的功能安全评估 Hi Mike, If possible, could you please send it to me.thanks BR! Derrick Re: 关于S32 Design Stdio的功能安全评估 Hello Derrick, There is no functional safety certified version of S32DS or the NXP GCC compiler. We have a Tool Chain Classification Report and a Tool Chain Safety Manual available if you are interested. Best Regards, Mike Re: 关于S32 Design Stdio的功能安全评估 Hi Mike, Thanks for the update. We have the same concern in our functional safety project and need tool assessment for S32DS 3.5. Could you please provide the corresponding Tool Chain Classification Report and Tool Chain Safety Manual? They will be very helpful for us to finish the S32DS tool assessment. Please send the documents to my email: [email protected]. Best regards, Lee
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How Do I Escalate an Issue with AT&T? Stuck with an AT&T issue that nobody seems to resolve? AT&T Escalation Support Team ((USA))
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IoT Toolbox app crashes in OTAP menu when using KW45-EVK – NXP OTAP example Hi, I am currently trying to run the NXP OTAP example project on a KW45-EVK board and use the NXP IoT Toolbox mobile application for the OTAP process. However, I am facing an issue with the IoT Toolbox app in the OTAP menu. Issue When I open the OTAP menu in the IoT Toolbox app and start scanning: If Location is OFF on my phone, pressing Scan shows the loading/scanning indication, but the application does not seem to find the device. If Location is ON, the application crashes while in the OTAP menu. I have tested this with multiple Android phones, but the issue remains the same. In rare cases, I can briefly see my KW45-EVK device appear in the scan results for a fraction of a second, after which the application crashes. What I have tried Tested with multiple phones. Tested with Location ON and OFF. Repeated the scan multiple times. Confirmed that the KW45-EVK is running the NXP OTAP example. The behavior is reproducible across the phones I have tested. Has anyone experienced a similar issue with the NXP IoT Toolbox OTAP application and KW45-EVK? Any suggestions on how I can debug this further or successfully perform OTAP using the IoT Toolbox app would be appreciated. Thanks! Re: IoT Toolbox app crashes in OTAP menu when using KW45-EVK – NXP OTAP example Hello, hope you are doing well. Thank you for your report, I have replicated a similar issue and we are currently investigating this with the internal team. In the meantime, could you help us with the following information? Which model and Android version devices did you test with? Which version of the IOT Toolbox did you test with? Do you notice any difference in behavior when using Approximate location vs Precise location on Android? As an additional note, I have tested this on an iPhone device and the issue does not occur, which confirms this is Android-specific behavior. For now, I would recommend if possible, to use an iPhone device or a board-to-board setup. I will let you know as soon as I have more infromation available. Best regards, Sofia. Re: IoT Toolbox app crashes in OTAP menu when using KW45-EVK – NXP OTAP example Android version: 13 Latest version of IOT Toolbox "Do you notice any difference in behavior when using Approximate location vs Precise location on Android?" Didn't test.
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JCOP4 P71 — AES-GCM and AES-CCM return NO_SUCH_ALGORITHM I am working with an NXP JCOP4 P71 card and am trying to understand why neither AES-GCM nor AES-CCM appears to be available. Card details: JCOP 4 P71 JCOP version: 4.7 R1.01.4 Platform ID: J3R3510236310400 ATR: 3BFA180000910131FE454A33523331302D333535FF JCOP Tools 6.15.0.11 Java Card Classic 3.0.5 Other crypto functionality such as AES-128 ECB, SHA-256, RSA, and secure random generation works correctly. However: * AES-GCM returns CryptoException.NO_SUCH_ALGORITHM * CryptoBaseX.ALG_AES_GCM also returns NO_SUCH_ALGORITHM * AEADCipher.ALG_AES_CCM also returns NO_SUCH_ALGORITHM Could someone clarify whether GCM and CCM are expected to be supported on this specific JCOP4 P71 configuration? In particular: 1. Are AES-GCM and AES-CCM supported for Platform ID J3R3510236310400? 2. Are these algorithms dependent on the specific OEF / card configuration? 3. Can they be enabled after issuance, or would a different JCOP4 card configuration be required? 4. Is there documentation showing which crypto algorithms are enabled for a given JCOP4 configuration? I mainly want to determine whether this is expected behavior for this card configuration or whether I am missing something in the setup. Smart Cards Re: JCOP4 P71 — AES-GCM and AES-CCM return NO_SUCH_ALGORITHM Hi @sameer_chawla , Please find the answers below: 1. No, AES-GCM and AES-CCM are not supported in JCOP 4, Platform ID J3R3510236310400 2. No, these algorithms are not supported by any configuration 3. No, they cannot be enabled, customer needs to implement them using the APIs available 4. Yes, "um4695xx - User guidance and administrator manual JCOP4 P71" lists available crypto algorithms There is also another document describing the available crypto algorithms on our JCOP platforms: an7459xx - AN14334 - Comparison between JCOP 4 P71, JCOP 4.5 P71 and JCOP 5 P71 CIPHER_AES_CCM: Not supported on JCOP 4, supported on JCPO 4.5/5 CIPHER_AES_GCM: Not supported on JCOP 4/4.5/5 Hope that helps, Have a great day, Kan ------------------------------------------------------------------------------- Note: - If this post answers your question, please click the "Mark Correct" button. Thank you! - We are following threads for 7 weeks after the last post, later replies are ignored Please open a new thread and refer to the closed one, if you have a related question at a later point in time. -------------------------------------------------------------------------------
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S32K118EVB2Q048: ADC readings do not match the selected MCU supply voltage Hi NXP team, I'm using the S32K118EVB2Q048 board (schematic SCH-47530 Rev A1) and testing the ADC. I'm getting wrong readings when the input voltage goes above about 3.3 V. Setup: - MCU: S32K118 (48-LQFP) - IDE: [S32 Design Studio version] - Driver: [RTD version / SDK version / bare-metal] - ADC channel: [e.g. PTA7 – ADC0_SE3] - Resolution: 12-bit - Input: [external DC power supply / on-board potentiometer] - Jumpers: J10 = 2-3 (5V), J107, J15  - Board powered from: [USB / 12V] Issue: I set J10 to 2-3 so the MCU runs at 5V. - Input 4.10 V: raw = 4095. With a 5V reference I expected about 3358. - Any input from 4 V to 5 V: always 4095 (full scale). - When I calculate with 5V, the error increases as the input voltage increases. Questions: On SCH-47530 Rev A1, is setting J10 to 2-3 enough to make VDDA and the ADC reference 5V, or do I need to change anything else (J15, J107, any resistor)? Can you share a working S32K118 ADC example for this EVB, tested with a 5V reference , can u also give ur calculated range for different for resolution  Re: S32K118EVB2Q048: ADC readings do not match the selected MCU supply voltage Hello  Can you share which RTD/SDK version you are using? Also, I can see you are using PTA7, however, you mentioned ADC_POT. ADC_POT is not connected as R761 is not populated on the EVB: I assume you are using PTA7 through the J3.1 header. Please confirm both J10, and J107 are set 2-3, and try to measure VDD to make sure it is indeed set at 5V. I used Adc_Pdb_Ip_example_S32K118 from RTD package, and simply modified main to loop and start a SW conversion: while(1) { /* Start a software trigger conversion */ Adc_Ip_StartConversion(ADCHWUNIT_0_VS_0_INSTANCE, ADC_IP_INPUTCHAN_EXT2, TRUE); /* Wait for the notification to be triggered and read the data */ while (notif_triggered != TRUE); notif_triggered = FALSE; delay(1000); } After this, I used a power supply to measure between 0 and 5V, and I could see the correct values. ADC0_SE2 @3.3V: ADC0_SE2 @5V: Lastly, check if REFSEL is correctly set in ADC_SC2[REFSEL]: Best regards, Julián
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MPXV7002DP compatibility with LPG and Propane Hello, i am a student in my final year. i am currently working on a project where i have to measure the pressure difference in household LPG line. the normal pressure in the line is around 2.30 kPa to 3.60 kPa . i checked the data sheet of it but there is nothing clear about LPG compatibility. So if anyone tried this in past or any technical official can tell me about it . thanks . Re: MPXV7002DP compatibility with LPG and Propane Hello, As of February 2, 2026, the NXP MEMS Sensor products have been transferred to STMicroelectronics. Please reach out to STMicroelectronics for further information and support.
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如何升级我的AT&T问题? 遇到AT&T的问题,一直被推来推去却始终得不到真正的解决?AT&T升级支持团队(美国)
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