S32K344- Interrupt based PWM generation

[Er_AK]

Requirement is like, want to generate two PWM signals and one PWM signal should start to generate other signal rising edge and stop at falling edge. To achieve this, Is any library or supported document available?

[dragostoma]

Hi, @Er_AK,

We appreciate your interest in the S32K3 Model-Based Design Toolbox.

I understand that you are trying to generate 2 PWM signals, where the first PWM signal starts at the rising edge and stops at the falling edge of the second PWM signal.

The latest version of toolbox (1.5.0) introduced support for the ICU (Input Capture Unit) component, and also a model example that you can use as a reference in your application - s32k3xx_icu_signal_edge_detect_ebt. This model uses the Signal Edge Detect operating mode and uses the SIUL2 module to detect edges of an input signal.

Now, to achieve your goal in your application, you should use eMIOS (Enhanced Modular Input Output Subsystem) module which is highly suitable for generating PWM signals due to its flexibility and functionality designed specifically for such tasks. You can configure eMIOS to generate both of your required PWM signals with precise control over their parameters like frequency and duty cycle. 

Moreover, SIUL2 (System Integration Unit Lite 2) can be used effectively for detecting edges (rising and falling) on the second PWM signal. Since SIUL2 is capable of configuring external interrupt lines based on specific edge detection, it can be set up to monitor the second PWM signal and generate interrupts when a rising or falling edge occurs.

I hope this will help you and be a starting point in reaching the goal of your application.

Regards,

Dragos

[Er_AK]

Hi, @dragostoma ,

Thanks for the reply. Went through the example. My understanding from the example is that we have to feed one PWM as input and the second one generate based on the input PWM.

But here, both PWM has to genrate,v ie, no input signal. 

For example, 10KHz PWM signal will generate and feed this to external circuit. The second PWM is 1KHz and the PWM will generate when 10KHz PWM rising edge and will stop on falling edge.

Is the given method will work for the same?

How the edges will detect internally?

[dragostoma · Accepted solution]

Hi, @Er_AK ,

First of all, I apologize for the delayed response. You could find attached a possible solution for your application, which I will describe below:

1. PWM channel 0 configuration

- configured based on instance eMIOS 0 channel 9;

- has a default period set to 64000 ticks;

dragostoma_0-1721649752441.png

- based on the eMIOS instance, has assigned PwmEmiosChannels_9 configuration;

- flag generation is set to Both_Trailing_and_Leading_Edge, meaning that the Interrupt Callback Notification will be triggered at each edge (rising and falling edge);

dragostoma_1-1721649880882.png

- configured based on EmiosCommon_0, which uses a clock divider value of 125;

- uses EmiosMclMasterBus_0 (EMIOS_CH_23), with a default period of 64000;

dragostoma_2-1721649948542.png

2. PWM channel 8 configuration

- configured based on instance eMIOS 2 channel 7;

- has a default period set to 640 ticks;

dragostoma_4-1721650133980.png

- based on the eMIOS instance, has assigned PwmEmiosChannels_7 configuration;

dragostoma_5-1721650298132.png

- configured based on EmiosCommon_2, which uses a clock divider value of 125;

- uses EmiosMclMasterBus_0 (EMIOS_CH_23), with a default period of 640;

dragostoma_3-1721650000679.png

3. Simulink application

dragostoma_6-1721650550576.png

The Simulink application consists of:

3.1. Initialize subsystem where the notifications are enabled for the PWM channels:

dragostoma_7-1721650609864.png

3.2. Main application:

- the PWM Channel 0 generates the signal based on the above configuration;

- the edgeFlag variable is initially set to 0, and its purpose is to detect the edge of the generated PWM;

3.3. Hardware Interrupt Callback:

dragostoma_8-1721650873171.png

- the RGBLED0_BLUE is toggling at each interrupt callback trigger, and its purpose is to follow the PWM signal;

- when the edgeFlag is set to 1, a Rising Edge is detected on the PWM Channel 0, and the PWM Channel 8 starts to generate the signal based on the above configuration; the edgeFlag is set to 0;

dragostoma_9-1721651100011.png

- when the edgeFlag is 0, a FallingEdge was detected on the PWM Channel 0 and the PWM Channel 8 stops the generation of the signal; the edgeFlag is set to 1;

dragostoma_10-1721651220169.png

4. Connections

To be able to validate the results, you should connect the Logic Analyzer to the following pins:

- PTA1: PWM0 set to emios_0_ch_9_ch

- PTD26: PWM8 set to emios_2_ch_7_ch

- PTA31: RGBLED0_BLUE

dragostoma_13-1721652016705.png

5. Results

Based on the above configuration, the PWM signals will be defined as follows:

dragostoma_12-1721651816784.png

dragostoma_14-1721652147087.png

dragostoma_15-1721652162086.png

6. Conclusion

The PWM Channel 0 will generate a PWM signal with a 20 Hz frequency. At each PWM Channel 0 edge change, the RGBLED0_BLUE is toggling, and based on a flag initially set to 0, the PWM edge that triggered the interrupt callback is determined. When a rising edge is detected, PWM Channel 8 starts to generate a PWM signal with a 2 kHz frequency. When a falling edge is detected, PWM Channel 8 stops to generate the PWM signal.

I hope this application helps you achieve your goal.

Best regards,

Dragos