This document gives a basic insight into bit timings relationship and provide easy step-by-step guide to calculate CAN bit timing parameters for desired baudrate.

******************************************************************************** * Detailed Description: * Initializes eQADC module, performs calibration and converts channel 146 * (voltage level of VDD) to check core voltage level and displays it into * terminal window. No external connection required excluding terminal via eSCI. * * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * * The example shows how to initialize 3 submodules to generate 120° phase shift * between submodules. * CNTR register of each submodule is initialized with shifted value when PWM * generators are disabled using FORCE feature. * * ------------------------------------------------------------------------------ * Test HW:  MPC5744P (MPC5744P-257DS + MPC577xx motherboard) * Maskset:  1N15P * Target :  internal_FLASH, RAM * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P8.12    - A[11] .. FlexPWM A[0] output * P8.11    - A[10] .. FlexPWM B[0] output * P8.13    - A[12] .. FlexPWM A[2] output * P8.14    - A[13] .. FlexPWM B[2] output * P10.8    - C[7] .. FlexPWM A[1] output * P10.7    - C[6] .. FlexPWM B[1] output * ********************************************************************************

******************************************************************************** Detailed Description: Example shows configuration of SIUL External interrupts using SDK driver. EIRQ0 (PA3) and EIRQ11 (PE12) are configured for detecting rising edge. Those pins are connected to switches SW1 and SW2 on DEVKIT board. EIRQ1 (PA6) is configured for detecting falling edge. Within its interrupt routines a LEDs are toggled upon edge detecting. See PinSetting component for pins configuration within "Routing" and "Functionals Properties" tabs. To see falling edge on PA6 just connect pin (J2.1) to GND shortly. * ------------------------------------------------------------------------------ * Test HW:         DEVKIT-MPC5748G * MCU:             PPC5748GSMKU6 0N78S * Target:          Debug_FLASH * EVB connection: * Compiler:        S32DS.POWER.2017.R1 * SDK release:     S32_SDK_S32PA_BETA_2.9.0 * Debugger:        S32DS, Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date        Author       Description of Changes 0.1 Jun-13-2019 Petr Stancik Initial version *******************************************************************************/

This simple example shows usage of the FlexPWM module on the TRK board. If a PWM output is connected to the LED you can see its dimming.   Regards, Petr   ******************************************************************************** * Detailed Description: * * This example shows usage of FlexPWM module. * The Submodule0 is set to generate independent PWMA and PWMB signals and vary * its duty cycles. The PWMX is also enabled as output and is set for fixed 50% * duty. *   * You can remove LED_EN jumpers and connect FlexPWM A an B outputs to LEDs to see * its dimming. * * ------------------------------------------------------------------------------ * Test HW: TRK-MPC5604P * Maskset:  0M36W * Target : internal_RAM * Terminal: no * Fsys:     64 MHz with 8 MHz XOSC reference * Debugger: IDCPPCNEXUS * * TRK board connection: * * P4.10 - D[9]  .. FlexPWM X[0] output * P1.11 - A[10] .. FlexPWM B[0] output * P1.12 - A[11] .. FlexPWM A[0] output * *   ********************************************************************************

This simple example shows the ADC setting for the scan mode and usage of Trimmer on TRK-MPC5604P board. Use Trimmer to dim the LED1.   Regards, Petr     ******************************************************************************** * Detailed Description: * * ADC testing and usage of Trimmer on TRK board * * ------------------------------------------------------------------------------ * Test HW:  TRK-MPC5604P * Maskset:  0M36W * Target :  internal_RAM * Terminal: no * Fsys:     64 MHz with 8 MHz XOSC reference * EVB connection: * * Use Trimmer to dim the LED1 * * NOTE! Be sure the ADC is powered, J21 5V jumper ON * ********************************************************************************

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal FLASH (user must choose it in the option at the end of * main function). * Flash over-programming is used to generate a non-correctable (or single-bit) * ECC error in FLASH. The bad data is accessed then, so the IVOR1 exception (or * ERM combined interrupt service routine) is generated and handled. * Example also offers useful macros for EIM and ERM modules. * The example displays notices in the terminal window (USBtoUART bridge J21) * (19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  eSCI_A is USBtoUART bridge (connector J21) * ********************************************************************************

******************************************************************************** * Detailed Description: * * Application performs basic initialization, setup PLLs. * DSPI_A is configured as master using DMA to send/receive 8 words. * * Two DMA descriptors are initialized: * - TCD[32] master transmit * - TCD[33] master receive * * * EVB connection: * * Do external loopback to connect SOUT to SIN * * PM6 ... SCKA * PM7 ... SINA * PM8 ... SOUTA * PM13... PCSA0 ** * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 3N45H * Fsys: PLL1 = core_clk = 260MHz, PLL0 = 200MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * *********************************************************************************

******************************************************************************** * Detailed Description:   * Example shows MCU's temperature measurement with the help of TSENS. * Calibration constants for TSENS are read from TSENS registers and * eQADC is set to measure Vbg and TSENS outputs. eQADC calibration is also done. * Calculated internal temperature can be displayed on the Terminal. * * See results on PC terminal (19200, 8N1, None). You should see following text * (with different values for sure) * *    fsys = 150MHz * *    TSENS temperature calculation * *    Calibration constants read from TSENS registers * *    T_LOW = 25 *    T_HIGH = 145 *    TSENS_CODE_T_LOW = 5441 *    TSENS_CODE_T_HIGH = 7305 *    VBG_CODE_T_LOW = 4010 * * *                 (TSENS_CODE_T*beta - TSENS_CODE_T_LOW)*(T_HIGH - T_LOW) *    T = T_LOW - --------------------------------------------------------- [degC] *                       (TSENS_CODE_T_HIGH - TSENS_CODE_T_LOW) * * *    VBG_CODE_T (ch45)  = 3959 => beta = 1.01288 *    TSENS_CODE_T (ch128) = 5608 * *    Temp = 31.80 degC *    * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed * frequency * * * Mode transition to LPU_STOP is executed. CAN_0 is configured to wake up from *  LPU_STOP to LPU_RUN using message with standard IDE = 0 as a wake up *  preselected matching criteria. After wake up from LPU_STOP, user *  LED1 is blinking.   * * Modified files: mem.ld, sections.ld, startup.s, added file z2_restart.s * * * ------------------------------------------------------------------------------ * Test HW:         MPC5748G-324DS, MPC574xG Motherboard * MCU:             PPC5748GMMN6A 1N81M * Fsys:            PLL0 160MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  Default * * * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminals ECHO. * * * Test HW:        X-MPC5744PE257DC, MPC57xx motherboard * MCU:              PPC5744PFMMM8 1N65H * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys:             200 MHz * Debugger:      Lauterbach Trace32 *                       PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  User LED 1 connected to A0 (P8.0), * ********************************************************************************

Detailed Description:                      This config tool simplifies DCF records calculation for MPC5777C device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!       - Programming more than 104 DCF records on Cut1.0b will result in incorrect device operation (FCCU faults, SSCM[CER] bit set, etc)       BR, Petr

******************************************************************************** * Detailed Description: * * * This example shows synchronization between eTimer, CTU and ADC modules. * The eTimer0 module timer 2 is initialized to generate PWM signal, and rising edge * of this signal is used to generate trigger signal for CTU module. The CTU module * use one command list with 4 ADC_0 channels. Single conversion mode is used, * so ADC0 ch0, ch1, ch2 and ch3 are sampled. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P8.1  - A[0]  .. GPIO output, used to see CTU-ADC ISR period * P9.1     - B[7]  .. ADC0 AN[0] input * P9.2     - B[8]  .. ADC0 AN[1] input * P16.4 - I[3] .. CTU0 EXT TRG output * * see CTU0 EXT TRG output signal (toggle on each trigger) on P16.4 with respect of eTimer PWM signals. * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW:         MPC5777M-512DS, MPC57xx Motherboard * MCU:             PPC5777MQMVA8 0N78H * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_2 * Fsys:               600MHz * * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 connected to P8.0, LED2 connected to P8.1 *                  LED3 connected to P8.2 * ********************************************************************************

******************************************************************************** * Detailed Description: * Example configures Sigma_Delta ADC and periodically converts ANA0_SDA0 input * (EVB's potentiometer can be connected i.e. J53-1 --> PO15) and displays * results in the terminal window (USBtoUART bridge J21). Terminal settings is * 19200-8-no parity-1 stop bit-no flow control on eSCI_A. * Example uses external ADC triggering from eTPU channels, that are for purpose * of this example configured for eTPU GPIO function for all eTPU channels that * can trigger start of SDADC conversion. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *                  eSCI_A is USBtoUART bridge (connector J21) * EVB connection:  For ADC: J53-1 (EVB pot's wiper) --> PO15 (header P22) * ********************************************************************************

******************************************************************************** * Detailed Description: * * Example shows MCU's temperature measurement with the help of TSENS. * Calibartion constants for TSENS0/TSENS1 are read from Test flash and * eQADC is set to measure Vbg and TSENS outputs. eQADC calibration is also done. * Calculated internal temperature can be displayed on the Terminal. * * See results on PC terminal (19200, 8N1, None). You should see following text * (with different values for sure) * *    TSENS0/TSENS1 temperature measurement *     press any key to continue... * *    Calibration constants read from TSENS registers * *    TSENS0                           TSENS1 * *    TSCA_0 = 207                     TSCA_1 = 148 *    TSCB_0 = 7                       TSCB_1 = 19 * *    T = (232 + TSCA * 2^-6) * TSENS_CODE_T / VBG_CODE_T - (273 + TSCB * 2^-4) [degC] * *    VBG_CODE_T   =  997 *    TSENS0_CODE_T = 1325             TSENS1_CODE_T = 1332 * *    TSENS0 temp = 39.19 degC         TSENS1 temp = 38.86 degC * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *                  use USB connector (J21) on minimodule * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * ********************************************************************************

******************************************************************************** * Detailed Description: * * LINFlex UART TXFIFO transmit using DMA * LINFlex UART mode with FIFO receive using DMA * * * EVB connection: * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * See results on PC terminal (baudrate 19200, Data bits 8, Stop bits 1, Parity none). * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH (debug mode, release mode without debugging information) * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

Detailed Description:                      This config tool simplifies DCF records calculation for MPC5748G device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr

******************************************************************************** * File main.c * Owner David Tosenovjan * Version 0.1 * Date May-31-2023 * Classification General Business Information ******************************************************************************** * Detailed Description: * The purpose of this example is show how to keep data in SRAM memory over SW * reset. * INIT_Derivative (file MPC5607B_HWInit.c) is modified to skip ECC RAM * initialization for SW reset source. Linker command file defines my_ram * section, a data being kept over reset are accesses as address pointer to this * location. After initialization SW resets are periodically triggered, * incrementing data on address test_address_3. * * ------------------------------------------------------------------------------ * Test HW: XPC5607B 176LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU: PPC5607BMLUAM03Y * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * Fsys: 64/48 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * EVB connection: none * ********************************************************************************

/******************************************************************************** Detailed Description: Configures the FlexCAN 0 to transmit and receive a CAN message Baudrate to is set to 500kbps. In this config, RXFIFO is used to receive a messages. 8 filter elements are defined in the RXFIFO table. Both standard and extended IDs are used. DMA is enabled in component inspector to read RXFIFO. MB9 is moreover used to receive a message with given standard ID and MB8 is used to transmit a message upon buttons press. The callback function is installed as well and is it called each time message is received in MB9, RXFIFO or message is transmitted. * ------------------------------------------------------------------------------ * Test HW: DEVKIT-MPC5748G * MCU: PPC5748GSMKU6 0N78S * Target: Debug_FLASH * EVB connection: PCAN-View with PCAN-USB Pro connected to CAN port P5 * Compiler: S32DS.Power.2.1 * SDK release: S32_SDK_S32PA_RTM_3.0.3 * Debugger: OpenSDA, Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date Author Description of Changes 1.0 02-May-2023 Petr Stancik Initial version, based on SDK demo example *******************************************************************************/