1.基于CMSIS-DAP的脱机编程工具         飞思卡尔的FRDM开发板都板载OpenSDA仿真器，该仿真器基于MK20DX128VFM5芯片，内部由Bootloader和app所组成，当用户按下Reset按钮后再插上USB接口，此时会进入Bootloader模式，此时PC端会出现一个名为Bootloader的可移动存储器，用户可以通过拖入预编译好的*.SDA升级app，更新v114版本的app后，重新插拔USB即可生效，此时会枚举出虚拟串口，仿真器以及MSD的可移动存储器。Bootloader占用了MK20DX128VFM5内部从0开始到0x5000的地址，App从0x5000地址开始。        CMSIS-DAP(mbedmicro/CMSIS-DAP · GitHub)是ARM公司的一个开源项目，它提供了一个基于Web的开发环境(mbed | welcome), 开发环境提供了基于C++的开发库，用户可以通过Web编程，然后下载编译好的bin文件，通过CMSIS-DAP烧写到FRDM开发板中。CMSIS-DAP与OpenSDA类似，也是由Bootloader和app所组成，最大的区别是CMSIS-DAP的Bootloader占用的地址为0x0~0x8000。        由于CMSIS-DAP是Apache License开源的，通过修改其Bootloader代码可以比较容易的做出一个脱机烧写器参考。        1. 添加SWD的访问接口。        2. 修改链接文件，默认Bootloader是运行在0地址上的，而实际编程工具最好运行在0x5000或者0x8000这两个地址上，这样不需要通过仿真器对于MK20DX128进行编程即可更新其内容，同时也可以轻松在仿真器及烧写器间进行切换。        3. 修改MSD烧写文件的地址，默认Bootloader是烧写从0x5000或者0x8000开始的地址，而这个地址现在放的是脱机烧写器代码，所以需要向后移动到0x10000，并将目标文件大小存放在0x1F800地址上。脱机烧写器由于将目标文件存放在K20芯片内部，所以受到K20内部flash大小的限制，只能烧写目标文件小于60K。        4. 添加编程算法工程，由于目标芯片内部的flash需要不同的驱动，所以可以将他们生产的算法代码先放到K20内部0x1FC00的地址上，烧写器开始工作时，先将编程算法通过SWD下载到目标文件的RAM中，并修改目标芯片的SP PC指针，让其运行。编程算法与烧写器的运行程序通过RAM进行交互。 参考代码下载地址： hudieka/OpenSourceOfflineProgrammerTools · GitHub 具体使用方法可以参考附件：

Hello, I've created a application of USB FLASH Drive acessing the 1MB internal FLASH of K64 using the Freescale's bareboard USB Stack 5.0 software + FRDM-K64F to be used by anyone as reference. It seems to be stable, I already wrote some files on that and checked the integrity of the volume. It can be very useful for datalogger application where the equipment can store data on the MCU FLASH using a internal filesystem, and read it through PC as it was a regular USB stick. It also very much cheaper than using a external SD Card, as it only needs the MCU + a external crystal and a USB connector.The only limitation so far is that it cannot exceed the number of the erase/write cycles of the device (of course!). Please see the file attached with the USB Stack and the example on the folder "{Installation Path}\Freescale_BM_USB_Stack_v5.0\Src\example\device\msd\bm\iar\dev_msd_disk_frdmk64f". The project was wrote using IAR. Also I have attached the srec file if you don't want to build the project by yourself. Any issues, doubts or suggestions, please let me know. Denis

  180°-Ansteuerung des BLDC-Motors simulation in LTSpice: Verläufe:           Es wurde als x-Koordinaten –Winkel in [°] statt der Zeit überzeichnet    

To do: Implement a program that lets the 4 LEDs on the Tower walk like this: * a single LED from left to right, * then the two left ones, the two right ones, * the two outside and at least the two LEDs in the middle. For easy observing write a wait routine, called 'delay (unsigned int ms)', of about 1 second without using any library functions. The processor will start with the standard frequency of 20...25 MHz. Estimate the time, that a loop needs to realize the time. Hint: Do not forget to stop the Watchdog Module at the beginning. Result:TWR_K60_Lauflicht.zip  including a readme with the compiler options

using the TAD tool

With the HMI developing, touch sensing is more and more popular. The GPIO-based method was developed as a low-cost way to do touch sensing. NXP had developed this sensing method and provide as TSS library (which combines support for GPIO and hardware-based touch sensing).The GPIO method uses the RC charge time in a capacitor (the electrode or touch pad)   Measurement Principles: TSI Method TSI method uses configurable current sources. The current sources are active outputs, making them far more robust against noise. Current sources are configurable, making it possible to configure sampling time. The signal slope depends on the applied current and the capacitance. When a finger approaches the electrode, frequency decreases. Another oscillator, uses a internal unchanging capacitor, this is our reference, we will configure it to oscillate faster than the external one. By comparing how many reference oscillations where counted by the TSI module per external reference scan, we can know when a touch happened.

       所谓“知识产权保护”，其实就是在产品量产之后防止其芯片内部代码通过外部调试器被有效读取出来的手段，毕竟现在来说硬件电路是比较容易被复制的，如果软件再不设防的话，在山寨技术如此发达的今天（用发达来形容貌似不是很过分吧，呵呵）这个产品估计很快就会被淘汰了。        因为最近有很多客户问到关于Kinetis的加密锁定问题，所以我觉着还是有必要对其细说说的。其实飞思卡尔对于知识产权保护方面还是做了很大的功夫的，而且使用起来也是比较方便的（这点很重要），具体可以参考Kinetis的Reference Manual中Security这一章，这里我就以在IAR环境下锁定K60为例介绍一下使用方法： 1. 首先简单介绍一下原理，即如果将K60置于Security状态（即锁定状态），则是不能通过Debug接口或者EzPort接口对芯片内部flash有任何操作的（CPU还是可以正常读写flash的，也就是说程序还是可以正常运行的，只不过是不能被外部非法读取了），当然“mass erase”命令除外（我们平时在Jlink Command窗口中敲入的unlock Kinetis命令就是触发这个命令给芯片的），通过“mass erase”命令可以再次将芯片擦除到出厂状态（即unsecure解锁的过程），这样芯片就又可以正常使用了（方便用户之后的程序升级）。咳咳，不过不用担心，解锁之后的芯片其内部的flash已经被完全擦除掉变为空片状态，也就是说内部的代码已经没有了，所以。。。懂的。。。呵呵； 2. 说完Security的原理，下面再聊聊K60实现security的process。我们可以通过K60的FTFL_FSEC寄存器中的SEC位来设定芯片的security状态，如下图所示，芯片默认出厂状态SEC位是为10的，即非加密锁定的，而如果将SEC位设定为00、01或者11任何一种情况，则芯片都将处于锁定状态（这就是我们接下来要干的事了，呵呵）。这里可能会有人疑问，在这个寄存器在重新上电之后会保存内容吗，我只能说“咳咳，都能抢答了”，哈哈，这正是我下面要说的； 3. K60在flash中0x00000400~0x0000040F这16个字节范围的地址定义为寄存器加载地址（Flash配置区），如下图所示，而这其中0x0000040C的地址内容在芯片上电之后会被自动加载到FTFT_FSEC寄存器中，也就是说我们只需要在烧写程序的时候把相应数据写到该flash地址即可在上电之后对芯片进行加密锁定，由此实现加密锁定。 4. 好了，原理和process都说完了，准备工作就做好了，下面就撸胳膊抹袖子开工干活吧，呵呵。其实飞思卡尔已经为我们做好了相关工作，只不过我们平时因为用不到没有注意到罢了。我们打开IAR环境，然后导入需要加密的代码工程，再打开工程目录下cpu文件组中的vectors.c和vectors.h（如果你的工程架构类似于飞思卡尔官方的sample code的话就在这个路径下）。在vectors.h里的最后部分我们会看到4个config段（共16个字节大小），如下图1，这四个段就是定义了上述0x400~0x40F的内容，其中CONFIG_4中最后的0xfe即为0x40C地址的内容（注意ARM处理器默认是little end模式的，所以0x40C在低地址），0xfe表明SEC位为10，即非加密状态，这样如果我把该0x40C地址的内容改成0xfc、0xfd或者0xff任意一个都可以实现对芯片的加密锁定。至于该四个配置段定义是如何映射到K60的flash区中的呢，去vectors.c文件中中断向量表vector_table[]的最后看看就知道了，如下图2； 5. 这里我们选择将CONFIG_4内容由原来的0xfffffffe改成0xfffffffd即可，然后保存编译通过之后，在查看其生成的s19文件中可以看到如下图所示，即0x40C地址的内容被修改成了0xfd，这样烧写文件就搞定了； 6. 当然到这一步实际上还没有完，其实在IAR的新版本之后（IAR6.6之后），其自带的flashloader默认是把0x400~0x40F这段保护起来的（防止误操作对芯片意外的security），即使如上面所述修改好相应内容，在烧写的过程中flashloader也不会对这段地址的内容做任何擦除和写入。为此还需要再额外对IAR的flashloader进行配置，具体步骤如下： （1）进入Options->Debugger->Download，选择如下： （2）点击“OK”，然后系统会提示保存该修改后的flashloader配置，建议把自己修改好的.board文件保存到自己的工程目录下，方便以后直接调用该flashloader。 7. 至此全部设置就搞定了，点击编译连接，然后下载，即可把加密后的代码烧写到芯片的flash里面去了。注意如果我们点击调试按钮的话，一旦程序烧进去之后调试器会自动复位芯片，此时加密状态位会被load到FTFT_FSEC[SEC]位中，芯片的调试端口就会被停掉，所以这时进入不到调试界面，而是弹出错误窗口，不用担心，因为此时程序已经正确烧到芯片中，我们重新插拔电源之后会看到程序已经正常执行，而此时的芯片已经处于加密状态。当然如果我们想再进入调试模式调试芯片的话，一种是通过Jlink Command窗口解锁，如下图1，另一种是再次点击调试按钮，会弹出解锁窗口，点击解锁即可，如下图2。 图1 图2

Kinetis KV10 chip is the entry point of the V Series product, which are designed for a wide range of BLDC, PMSM and ACIM motor control and digital power conversion applications. KV10 is using ARM Cortex-M0+ core, the core frequency could up to 75MHz. And KV10 provides various feature powerful modules, such as ADC modules (2x 16-bit ADCs with two capture and hold circuits and up to 1.2 MS/s samples rate in 12-bit mode — simultaneous measurement of current and voltage phase, reduced jitter on input values improving system accuracy 12-bit mode) and DMA modules (4-channel DMA — reduced CPU loading for improved application performance). The demo is using PDB hardware trigger two ADC modules conversion (12-bit single-ended mode) at the same time; the two ADC modules will trigger each related DMA channels to transfer ADC result to ADC buffer located at SRAM (start from 0x2000_0000) when finish each conversion. The ADC DMA channel 0 will link to trigger DMA channel 2 to transfer ADC result from ADC result buffer to SPI FIFO. When DMA channel 2 transfer done, in related interrupt service routine will software trigger PDB to start the next round of ADC conversion. Below is the processing chart: For the customer requires to transfer 9 ADC conversion results out (5 of ADC0 and 4 of ADC1) , the ADC buffer need interleaved storage result from two ADC modules. Below diagram shows the detailed info: Below is the test result and test environment. It will take almost 15.4us to get and transfer all 9 12-bit ADC conversion results. The demo code is attached. The project is based on TWR-KV10Z32 Sample Code Package could be downloaded from here. Wish it helps.

From K61/K64/K66 reference manual/ datasheet, it is mentioned that the SDHC clock can be set up to 50MHz. But from the SDHC timing spec, SDHC output timing violate SD specification if SDHC clock is 50MHz, because output delay (SD6 tOD) is max 6.5ns.  SD specification require setup time at SD card 6ns, then output delay should less than 4 ns if SDHC clock is 50MHz. In other word, according to the SD card specification, input set-up time is minimum 6ns, then maximum of SD6 should be 4ns in order to support 50 MHz clock frequency. So we recommend customer to drop the SDHC clock frequency to 40MHz, then the 6.5ns output valid time will allow them to meet the 6ns setup requirement for the card.

ButtonRace O ∆ []   ButtonRace es un juguete simple, un pequeño invento, que permitirá cambiar la vida de los niños que sufren alguna discapacidad. Nuestra creación está diseñada de una manera muy simple que, a su vez, permite a los niños con capacidades diferentes tener el máximo aprovechamiento. En general, nuestro objetivo era desarrollar los reflejos ojo-mano y estimular el aprendizaje de los niños. Esto, sin caer en las terapias actuales, que al ser tan habituales, pueden volverse menos efectivas. En resumen, el juego consiste en que el niño debe presionar el botón correspondiente a la figura que le es mostrada, lo que permitirá que un pequeña estrella avance a través de una pista de forma determinada. El mecanismo funciona a través del uso de una tarjeta Freedom de Freescale. Además, del uso de una serie de LEDS, un servomotor y algunos sensores infrarrojos y de presión. El sistema está diseñado para darle una retroalimentación al infante, para ver si su respuesta fue correcta. Las figuras encienden en color azul en el momento en que el niño debe presionar algún botón. Dependiendo de si la respuesta fue acertada, la misma figura cambia de color a verde o rojo. Dependiendo de si la figura y el botón corresponden, además, un servomotor moverá la estrella por la pista. Después de varias respuestas correctas, la estrella llegará a una meta, donde el sistema se reiniciará automáticamente. Nuestra intención es que este sistema tan simple de aprendizaje para niños, puede ser utilizado para enseñar otras cosas, además de cumplir nuestro objetivo principal.   Original Attachment has been moved to: Buttonrace.odt

Example of integrating CMSIS3.20 into MQX4.0.x on the TWR-K70F120M (with floating point unit) using CW10.4 using the MQX4.0.2\mqx\examples\hello2 project. In the attached ZIP file (hello2twrk70f120m_CMSIS_FPU.zip) is a MSWord document detailing the steps used.  That document name is TWR-K70F120M_CMSIS_CW10.4_MQX4.0.x.docx. Regards, David

Printer extruders and recyclers use Motors that benefit from torque control that can be obtained by using Kinetis V, a BLDC motor  and the Freescale Motor control algorithms. A plastic waste extruder for RepRap 3D printer filament.  Image: RepRapWiki See this link for more details: How recycled plastic for 3D printing will drive sustainability and improve social consciousness - TechRepublic "Durable, shiny, new plastic -- it's what makes most 3D printers run. And as 3D printing grows in popularity and we begin to scale projects in every industry, the world is going to use a lot more of it. If the industry goal is to have 3D printers in most homes and businesses with lots of other 3D printers running constantly in manufacturing centers, we'll naturally add even more to the 33.6 million tons of plastic Americans toss each year, only 6.5% of which is recycled. It's estimated that 100 million tons of plastic is floating in the world's oceans. Each piece can take anywhere from 500 to 1,000 years to decompose."

Simple guide to setting up a PIT to create a 1 second reccuring interrupt that toggles an LED without the use of processor expert.

   在培训和论坛提问中，发现用户提出的很多问题都集中在如何有效的检索到“适合的开发工具和开发资源”上。在此帖中，简单的介绍一下在飞思卡尔官方网站上查找到实用的开发资源的一些简单步骤，希望对大家有帮助。     通常学习和应用一款芯片是从选择一个评估/开发板开始的，然后安装相应的开发环境和硬件驱动、最后结合芯片Datasheet、Reference Manul、参考设计和官方例程编写程序代码完成项目开发。和其它行业一样，如今对于芯片厂商也流行提供一整套的解决方案，有现成的方案设计提供给客户，减少客户的时间成本，提高开发效率。可是在哪里能找到例程代码、参考设计、如何动手呢，对于很大部分不熟悉飞思卡尔官网的人来说，找到自己需要的资源就很困难，这里以FSL Kinetis系列芯片为例简单给大家介绍一下在飞思卡尔官网资源检索的通常步骤。     首先，进入飞思卡尔的官网www.freescale.com， 通常大家更习惯于中文，所以点击右上角“中文”选择显示中文，如图1，以后再次进入网站时，它都会自动默认中文显示。然后选择“产品”->微控制器”可以看到里面包括飞思卡尔MCU相关的产品，早期8位/16位MCU、主要用于电机控制的DSC、Vybrid多核控制器，ColdFire架构MCU以及ARM Cortex架构的Kinetis，这里选择Kinetis ARM Cortex MCU，如图2。 图1 图2        可以看到Kinetis K系列、L系列、M系列、W系列的一些MCU，这里选择KL2，如图3，打开之后如图4可以看到很多调试仿真器、评估开发板、相关软件工具等，这里是一个资源合集。在“文档”栏目中能找到KL2X芯片的Datasheet、参考手册、应用笔记、用户指南等等；在“软件和工具”栏目中能找到KL2X系列MCU可以使用的仿真调试器、评估开发板、软件开发工具、中间件驱动程序等； 图3  图4          如前文所讲，需要先找一个硬件开发平台，于是展开“评估/开发板与系统”，可以看到很多飞思卡尔公司提供的开发板，包括FRDM-KL05Z（KL0系列MCU，不知为何放在这里）、FRDM-KL25Z（FRDM板）、TWR-KL2548M（塔形板）几个版本，这里我们选择使用最为广泛的的FRDM-KL25Z，点击进去，如图5，就能看到对应于KL25Z的Demo板相关信息和资源，在“文档”栏目里有KL25Z相关的应用说明、用户手册等等；在”下载”栏目里能找到FRDM-KL25Z开发板的电路原理图、例程代码（含Codewarrior、IAR、Keil三个版本）、开发环境搭建用到的软件以及告诉你如何安装驱动的QSG文件；在“购买/规格”栏目里能看到开发板购买的价格和途径，值得一提的是这款板不仅包括KL25Z芯片的最小系统，还板载了一个OpenSDA下载/调试器（既可以调试板载芯片，也可以引出调试其它器件），而价格只有12.95$，不到一百块人民币，可谓是超值。 图5      至此，开发的软件环境、需要准备的硬件板、原理图、驱动软件、例程源代码、DataSheet、User's Manual都知道在哪里获得了相应资源了，后续需要自己搭建环境，安装驱动，根据项目需要参照测试例程、Datasheet和User's Manual进行编程开发了。 至于其他系列的芯片Datasheet、User's Manual、例程代码、开发环境等等资源也可以按照这个步骤进行检索。另外，飞思卡尔网站对一些重要的资源还提供了快捷链接，如KL25Z开发板：www.freescale.com/FRDM-KL25Z，K60的100M开发板：http://www.freescale.com/TWR-K60D100M ，MQX操作系统：www.freescale.com/MQX，技术支持：http://www.freescale.com/support 等等。     另外，大家还可以在官网上看到一些其他的技术信息，有问题也欢迎飞思卡尔官方社区community.freescale.com和EEFOCUS飞思卡尔社区 www.freescaleic.org/bbs/ 讨论和分享自己的问题和经验。

The SPI bus has the capability of addressing multiple slave devices by a single master. The Kinetis L series of devices feature either an 8-bit or 16-bit capable SPI module; however, there is only one dedicated CS/SS signal per instance of the module. Of course this signal is muxed to a few pin locations on the device. Unfortunately, there are not that many pins with the CS/SS muxing and they are most likely they are not near to each other physically. A solution to this issue is to use GPIO as CS/SS lines. This way you can take advantage of the SPI bus protocol and the Kinetis L series IOPORT interface (also known as FGPIO on Kinetis L). The Cortex-M0+ allows accesses to the IOPORT to occur in parallel with any instruction fetches; therefore, these accesses will complete in a single cycle. Core vs. SPI I'm sure many who have tried to use GPIO as CS/SS have written code similar to this pseudo code, I know I have: while(1) {      set_cs_low;      send_byte;      set_cs_high; } Logically this makes sense, but on an oscilloscope you will see the GPIO CS/SS line toggling at irregular intervals and out of sync with the SPI transfers. This is due to the nature of the 'send_byte' function or instruction. Simply transmitting a data packet will not prevent the core from waiting for the transmission to complete. The core will move on from writing data to the SPI data register, and execute the next instruction. If you have a core operating at 48 MHz and you are performing, at most depending on instance, 24 MHz SPI transfers the core will always move onto the next instruction before the data has left the module. The code must either implement a delay or wait for the transmission to complete. Incorporating an accurate delay can be tricky and can be interrupted by any interrupts occurring during the delay process. A more robust solution is to wait for the transmission to complete. However, there appears to be no Transmit Complete Flag (TCF) in the L-Series SPI module. The Solution Fortunately, there is a way to wait for transmit complete. Software must wait for the SPI read buffer full flag (SPRF) to be set in the SPI status register (SPIx_S) after writing data to the SPI data register (SPIx_D) . When the SPRF bit is set, software must read the SPIx_D. This procedure will ensure that the core does not move onto GPIO toggling, or other instructions, until the data has left the SPI module. The following function demonstrates how to write the above procedure in C using SPI0 and PTD0 as the CS/SS line: uint8_t SPI_send(uint8_t spiWrite) {     uint8_t spiRead;                        //Variable for storing SPI data     FGPIOD_PCOR |= (1 << 0);                //Toggle CS/SS line low     while(!(SPI0_S & SPI_S_SPTEF_MASK))     {         __asm("NOP");     }                                       //Wait for SPI transmit empty flag to set     SPI0_D = spiWrite;                            //Write data to SPI     while(!(SPI0_S & SPI_S_SPRF_MASK))     {         __asm("NOP");     }                                       //Wait for receive flag to set     spiRead = SPI0_D;                       //Read the SPI data register     FGPIOD_PSOR |= (1 << 0);                //Toggle CS/SS line high     return spiRead; } Please note that the GPIO CS/SS toggling need not be in the function. It should work just as well if the GPIO CS/SS toggles occur before and after the function is call, just remove the FGPIO instructions from the function and place them outside. I hope this document proves useful to those of you designing multiple slave SPI buses around Kinetis L series parts.

Hello,      Is your clock correctly configured, what is its frequency?   You can monitor some of clocks in K0 MCU by routing it to  PTC3/CLKOUT pin. you can get it easily by selecting desired clock on  SIM_SOPT2[CLKOUTSEL] register and configuring PTC3 for CLKOUT function.   For example to monitor  1 KHz 1 low power osillator   LPO, ---------------------------------------------------------------------------------------------------------------------------- /*  ClockOutput options */ #define CLOCKOUT_FLASH_CLOCK    2 #define CLOCKOUT_LPO                       3 #define CLOCKOUT_MCGIRC                4 #define CLOCKOUT_RTC32KHZ            5 #define CLOCKOUT_OSCERCLK0       6 /* Configure clock output option according to  */               SIM_SOPT2 = SIM_SOPT2_CLKOUTSEL(CLOCKOUT_LPO); /* Configure PTC3 as clock output) */              PORTC_PCR3 = PORT_PCR_MUX(5);   //CLKOUT function selected on PTC3 ------------------------------------------------------------------------------------------------------------------------------------                 In attached document you can find captures of all clock options,  and notes on what need to be configured to get the clock output.                        Note:       Please note that Clock out (CLKOUT) on PTC3 is not currently shown in Signal Multiplexing and Signal Descriptions of RM.  It is already reported and will be fixed on next release of Reference Manual/Data sheet.

The KL TSI Library provides the following benefits: • Reduces time to market and development costs. Already available turn-key TSI Library for IH cooker, remote controller applications, etc. • KL TSI is a hardware touch sensing solution, without any additional peripherals, e.g. Timers, GPIO, CPU execution, as a result reduces overall system cost and size. • Enhances reliability by enabling environment adaptive algorithm, eliminating water droplet and stream influence, and filtering electromagnetic interference. • Easy to use, simplifies user interface design. Flexible TSI software library enabling customers to develop an application • FreeMaster1.4 visualizes TSI signal on screen, thus customer can debug and tune touch software simply.

Hello Community fellows! This time I would like to thank BlackNight for giving us great material to work on. There have been several posts inquiring the uses of USB stack and Processor Expert. The examples he has worked on and now shares with all of us, include this and many more useful concepts that you'll find interesting with the use of boards. For this issue he turns his FRDM-KL25Z into a generic USB keyboard device. With a simple button press he is able to send any keyboard actions to his laptop, making such as ‘print screen’ a single button press...isn't that amazing? :smileygrin: Well, I'll say no more, you better check it out yourself!  MCU on Eclipse by Erich Styger

1. Kinetis L系列将NMI和Reset管脚复用成GPIO需要注意的问题 2. 如何在IAR、Keil和Codewarrior中禁止掉Kinetis的NMI脚 3. Kinetis Reset管脚与外部看门狗/复位芯片接法 4. Kinetis L系列外部IO中断分配问题 5. KL2x/KL4x使用USB模块时需要注意VOUT33管脚的接法 6. Kinetis K系列SPI接口设计注意事项 7. Kinetis芯片Reset管脚出现方波的原因及解决办法

作者 Sam Wang & River Liang    说明,本文对比8位MCU的位操作在系统升级到M0+内核的MCU后所带来的影响,可以作为客户对升级MCU时,对代码及RAM上资源的评估使用. 一)简单的I/O翻转对比.对比条件:MCU为MC9S08PT与KE02,开发平台CW10.3                   1.使用PT的代码如下:          if (!PORT_PTAD_PTAD0){             PORT_PTAD_PTAD0=1;         }else{             PORT_PTAD_PTAD0=0;}       PT的代码编译后占用9个Byte。                000002D4 000004   BRSET  0,PORT_PTAD,PORT_PTAD                000002D7 1000     BSET   0,PORT_PTAD                000002D9 202E     BRA    *+48       ;abs = 0x0309                000002DB 1100     BCLR   0,PORT_PTAD       2.KE是基于ARM的M0+内核，使用的代码如下                  if(GPIOA_PDOR & 0x1)                     { GPIOA_PCOR = 0x1;}                  else                     { GPIOA_PSOR = 0X1;}       编译后结果为                00000706:   ldr r3,[pc,#24]                00000708:   ldr r2,[r3,#0]                0000070a:   movs r3,#1                0000070c:   ands r3,r2                0000070e:   beq main+0x6c (0x718)       ; 0x00000718                00000710:   ldr r3,[pc,#12]                00000712:   movs r2,#1                00000714:   str r2,[r3,#8]                00000716:   b main+0x20 (0x6cc)       ; 0x000006cc                00000718:   ldr r3,[pc,#4]                0000071a:   movs r2,#1                0000071c:   str r2,[r3,#4]       这段M0+内核的代码编译后占用24个Byte       3.KE系列是Freescale在M0+的基础上加入了位操作引擎BME，用以优化ARM内核的位操作性能，使用BME功能的代码如下                     #define PTA0_SET   (void) (*((volatile unsigned char *)(0x4C000000+(0<<21)+0xF004))) //?==0                                                       //LAS1      第0位       GPIOA_PSOR地址的A0-A19                     #define PTA0_CLR   (void)(*((volatile unsigned char *)(0x4C000000+(0<<21)+0xFF008)))                                                      //LAS1      第0位       GPIOA_PCOR地址的A0-A19                     #define PTA0                *((volatile unsigned char *)(0x50000000+(0<<23)+(0<<19)+0xF000))                                                     //UBFX           第0位     1位           GPIOA_PDOR 地址的A0-A18                if (!(PTA0))                     {PTA0_SET; }                else                     {PTA0_CLR;}           KE的BME代码编译结果如下：                    165                if (!(PTA0)){                 00000998:   ldr r3,[pc,#24]                0000099a:   ldrb r3,[r3,#0]                0000099c:   uxtb r3,r3                0000099e:   cmp r3,#0                000009a0:   bne RTC_IRQHandler+0x18 (0x9a8); 0x000009a8                  166                PTA0_SET;                                             //Using BME                000009a2:   ldr r3,[pc,#20]                000009a4:   ldrb r3,[r3,#0]                000009a6:   b RTC_IRQHandler+0x1c (0x9ac); 0x000009ac                  168                PTA0_CLR;      //Using FASTER GPIO                000009a8:   ldr r3,[pc,#16]                000009aa:   ldrb r3,[r3,#0]       代码编译后占用20个Byte         4, CW里面有设置可以优化C编译器，具体路径在Project->Proteries->C/C++ Build->Setting->GCC C Complier->Optimization           优化后共用16个Byte                  165         if (!(PTA0)){                 0000091e:   ldr r3,[pc,#20]                00000920:   ldrb r3,[r3,#0]                00000922:   cmp r3,#0                00000924:   bne RTC_IRQHandler+0x12 (0x92a); 0x0000092a                  166                         PTA0_SET;                                             //Using BME                00000926:   ldr r3,[pc,#16]                00000928:   b RTC_IRQHandler+0x12 (0x92c); 0x0000092c                  168                         PTA0_CLR;      //Using FASTER GPIO                0000092a:   ldr r3,[pc,#16]                0000092c:   ldrb r3,[r3,#0]       5, 结果     如果单纯靠M0+内核访问寄存器，KE代码的占用空间与PT的比为24：9        如果使用KE的BME功能，代码与PT的比为16:9（使用了BME）        在判断Bit时, KE使用代码与PT的比为8:3        单单设置一个Bit时KE与PT代码占比为4:2 因此在M0+等ARM核上进行位操作，其效率比8位单片机低，使用了BME功能后，可以有效提高位操作的性能。 二)典型变量的位操作. 对比条件:MCU为MC9S08PT与KE02,开发平台CW10.3                测试代码:if (xx&1){              xx&=0xFE;       }else{             xx|=1;}       1,设置XX在0 page时,其与上面的I/O翻转结果一样,代码为9个BYTES    2,在KE中，编译结果如下,设置优化前,需要52个Bytes的代码量,26个执行周期.                                                     if (xx&1){                00000a52:   ldr r3,[pc,#64]                00000a54:   ldrb r3,[r3,#0]                00000a56:   uxtb r3,r3                00000a58:   mov r2,r3                00000a5a:   movs r3,#1                00000a5c:   ands r3,r2                00000a5e:   uxtb r3,r3                00000a60:   cmp r3,#0                00000a62:   beq main+0x5a (0xa76)       ; 0x00000a76                     200                         xx&=0xFe;                00000a64:   ldr r3,[pc,#44]                00000a66:   ldrb r3,[r3,#0]                00000a68:   uxtb r3,r3                00000a6a:   movs r2,#1                00000a6c:   bics r3,r2                00000a6e:   uxtb r2,r3                00000a70:   ldr r3,[pc,#32]                00000a72:   strb r2,[r3,#0]                     203         }}                00000a74:   b main+0x28 (0xa44)       ; 0x00000a44                     202                         xx|=1;                00000a76:   ldr r3,[pc,#28]                00000a78:   ldrb r3,[r3,#0]                00000a7a:   uxtb r3,r3                00000a7c:   movs r2,#1                00000a7e:   orrs r3,r2                00000a80:   uxtb r2,r3                00000a82:   ldr r3,[pc,#16]                00000a84:   strb r2,[r3,#0]                     203         }}       3, 设置优化后,需要22/20个Bytes的代码量,11/10个执行周期.                ldr r3,[pc,#40]                     199         if (xx&1){                0000095e:   movs r2,#1                     197         xx++;                00000960:   ldrb r1,[r3,#0]                00000962:   adds r1,#1                00000964:   uxtb r1,r1                00000966:   strb r1,[r3,#0]                     199         if (xx&1){                00000968:   ldrb r1,[r3,#0]                0000096a:   tst r1,r2                0000096c:   beq main+0x34 (0x974)       ; 0x00000974                     200                         xx&=0xFe;                0000096e:   ldrb r1,[r3,#0]                00000970:   bics r1,r2                00000972:   b main+0x34 (0x978)       ; 0x00000978                     202                         xx|=1;                00000974:   ldrb r1,[r3,#0]                00000976:   orrs r1,r2                00000978:   strb r1,[r3,#0]                0000097a:   b main+0x20 (0x960)       ; 0x00000960 如果采用以空间换时间的话,其参考代码如下.                 if (xx==0){                                 xx=1;                 }else{                                 xx=0;  }       4, 如考虑中断嵌套的话,还令需要4个Byte代码。       5, 结果 KE使用代码与PT的比为至少为20:9。      在判断Bit时, KE使用代码与PT的比为8:3.       6,使用BYTE替换Bit, 编译结果,设置优化前,需要22个BYTES.                     197         if (xx==0){                000009e8:   ldr r3,[pc,#44]                000009ea:   ldrb r3,[r3,#0]                000009ec:   cmp r3,#0                000009ee:   bne main+0x38 (0x9f8)       ; 0x000009f8                     198                         xx=1;                000009f0:   ldr r3,[pc,#36]                000009f2:   movs r2,#1                000009f4:   strb r2,[r3,#0]                000009f6:   b main+0x3e (0x9fe)       ; 0x000009fe                     200                         xx=0;                000009f8:   ldr r3,[pc,#28]                000009fa:   movs r2,#0                000009fc:   strb r2,[r3,#0]    7,设置优化后,需要16/14个BYTES的代码量.                     197         xx++;                0000095c:   ldr r3,[pc,#36]                     202                         xx=1;                0000095e:   movs r1,#1                     197         xx++;                00000960:   ldrb r0,[r3,#0]                00000962:   adds r0,#1                00000964:   uxtb r0,r0                00000966:   strb r0,[r3,#0]                     199         if (xx){                00000968:   ldrb r0,[r3,#0]                0000096a:   cmp r0,#0                0000096c:   beq main+0x32 (0x972)       ; 0x00000972                     200                         xx=0;                0000096e:   strb r2,[r3,#0]                00000970:   b main+0x20 (0x960)       ; 0x00000960                     202                         xx=1;                00000972:   strb r1,[r3,#0]                00000974:   b main+0x20 (0x960)       ; 0x00000960       8, 结果 ,在RAM的空间允许的情况下,KE使用代码与PT的比为至少为12:9. 三) 8 bit变量加1       1,在PT中对8 bit变量加1,只需要4个BYTES.    24:                 XX++; 00000014 450000   LDHX   #XX       00000017 7C       INC    ,X       2,M0+的8 bit变量加1,设置优化前,需要14个BYTES                     197         xx++;                00000a44:   ldr r3,[pc,#48]                00000a46:   ldrb r3,[r3,#0]                00000a48:   uxtb r3,r3                00000a4a:   adds r3,#1                00000a4c:   uxtb r2,r3                00000a4e:   ldr r3,[pc,#40]                00000a50:   strb r2,[r3,#0]       3,而如果使用优化设置,那么要12个BYTES                     197         xx++;                0000095c:   ldr r3,[pc,#36]                     202                         xx=1;                0000095e:   movs r1,#1                     197         xx++;                00000960:   ldrb r0,[r3,#0]                00000962:   adds r0,#1                00000964:   uxtb r0,r0                00000966:   strb r0,[r3,#0]       4, 结果 , 在8 bit变量加1时,KE使用代码与PT的比为至少为12:4，但这是32bitARM内核操作8bit变量都普遍存在效率变低的现象。 四) 16位+8位加法       1, 8 bit 编译结果,需要8个BYTES.                0000008 320000    LDHX   xx                0000000B AF01     AIX    #1                0000000D 960000   STHX   xx       2, M0+ 编译结果,设置优化前,需要10个BYTES.                00000a44:   ldr r3,[pc,#44]                00000a46:   ldr r3,[r3,#0]                00000a48:   adds r2,r3,#1                00000a4a:   ldr r3,[pc,#40]                00000a4c:   str r2,[r3,#0].       3, M0+ 编译结果,设置优化后,需要8个BYTES.                0000095c:   ldr r3,[pc,#20]                0000095c:   ldr r3,[pc,#20]                0000095e:   ldr r2,[r3,#0]                00000960:   adds r2,#1                00000962:   str r2,[r3,#0]       4,结果,M0+在16位加法时能够达到8bit单片机的效率，结果相同. 五)结论     因此用户在移植PT(或其它8 bit MCU)代码到KE02时,要选型时需要充分考虑客户原先代码具体运算情况,理论上存在使用KE后代码变大的情况.   但是使用KE等32bitM0+内核时可以在16bit或以上的乘、加运算时获得更好的效率，占用更小的代码空间和运算时间。   另外KE对GPIO的控制寄存器比PT多了一些功能,可以一次操作多个I/O,是不错的功能.