Fast Startup Guide for Freescale MCU, wirtten by China IMM FAE team for mass market users.

Hi All Kinetis Lovers, Microcontroller programming is a passion for all we are following this Community, but sometimes, trying to understand the peripherals of a Microcontroller is not an easy task, especially if we are in our first approach to a new module or device. In this post you will find a document that explains in detail the DMA module for Kinetis devices and also some examples for CodeWarrior and Kinetis Design Studio using DMA and other peripherals. The Documentation found here is: Using DMA module in Kinetis devices (complete): Document that includes DMA module explanation: everything you need to know when using DMA and the necessary information to understand the code included (K20_DMA for CW or K20D72_DMA for KDS). Using DMA module in Kinetis devices (example): Document that includes the necessary information to understand the code included (K20_DMA for CW or K20D72_DMA for KDS). Attached are two folders named: DMA examples for CW: include the DMA example projects for CW DMA examples for KDS: include the DMA example projects for KDS. Each folder includes 5 examples that are: Please feel free to modify the examples; I hope this will be useful for you. Many thanks and credits to manuelrodriguez for his valuable help developing and editing this project. :smileyinfo:For the SPI examples it is necessary to make a bridge between MOSI and MISO pins (master loop mode is used for the example). For this the TWR Elevators were used.     In the attachments you can find some extra information when using SPI and DMA. Best Regards, Adrian Sanchez Cano Technical Support Engineer

    作者 Shaozhong Liang     YAFFS（Yet Another Flash File System）文件系统是专门针对NAND闪存设计的嵌入式文件系统。在YAFFS中，文件是以固定大小的数据块进行存储的，块的大小可以是512字节、1024字节或者2048字节。这种实现依赖于它能够将一个数据块头和每个数据块关联起来。每个文件（包括目录）都有一个数据块头与之相对应，数据块头中保存了ECC(Error Correction Code)和文件系统的组织信息，用于错误检测和坏块处理。     YAFFS在文件进行改写时总是先写入新的数据块，然后删除旧的数据块，这样即使意外掉电，丢失的也只是这一次修改数据的最小写入单位，从而实现了掉电保护，保证了数据完整性。 YAFFS是为NAND FLASH设计的，它作了以下的假设或定义。     NAND Flash是基于块(block）的，每一个Block大小相同，由整数个chunk组成。每一个Block可单独擦除。一页(page，或chunk）为Flash的分配单元。所有的访问（读或者写）都是基于页（或chunk）的。     当对NAND Flash编程时，只有二进制中的0被编程，而1则“不关心”。比如，一个字节包含的二进制数为1010，那么当编程1001，会导致这两个数的位与操作。结果为1000.这和NOR FLASH不同。     YAFFS 分别用块号和 chunk id 标示块和 chunk 。它将空块（填满0xFF）当作空闲块或者已擦除块。这样，格式化一个YAFFS分区等价于擦除所有未损坏的块。 因此YAFFS最少需要一些函数能够擦除块，读一个页，写一个页。 1. 直接接口(Direct Interface)的相关文件     仅需要提取少量文件。使用yaffs的直接接口，你不需要所有的文件。你实际需要的文件列在下面，其余文件不需要编译。 direct/yaffsfs.c yaffs_guts.c direct/yaffscfg.c yaffs_nand.c yaffs_tagsvalidity.c yaffs_checkptrw.c yaffs_qsort.c yaffs_tagscompat.c yaffs_ecc.c yaffs_packedtags2.c 2. YAFFS  存储设备     YAFFS对文件系统上的所有内容（比如正常文件，目录，链接，设备文件等等）都统一当作文件来处理，每个文件都有一个页面专门存放文件头，文件头保存了文件的模式、所有者id、组id、长度、文件名、Parent Object ID等信息。因为需要在一页内放下这些内容，所以对文件名的长度，符号链接对象的路径名等长度都有限制。前面说到对于NAND FLASH上的每一页数据，都有额外的空间用来存储附加信息，通常NAND驱动只使用了这些空间的一部分，YAFFS正是利用了这部分空间中剩余的部分来存储文件系统相关的内容。以512+16B为一个PAGE的NAND FLASH芯片为例,Yaffs文件系统数据的存储布局如下所示： 0 to 511 数据区域 512 to 515 YAFFS TAG 516 Data status byte 517 Block status byte 坏块标志位 518 to 519 YAFFS TAG 520 to 522 后256字节数据的ECC校验结果 523 to 524 YAFFS TAG 525 to 527 前256字节数据的ECC校验结果     可以看到在这里YAFFS一共使用了8个BYTE用来存放文件系统相关的信息（yaffs_Tags）。这8个Byte的具体使用情况按顺序如下： Bits Content 20 ChunkID，该page在一个文件内的索引号，所以文件大小被限制在2^20 PAGE 即512Mb 2 2 bits serial number 10 ByteCount 该page内的有效字节数 18 ObjectID 对象ID号，用来唯一标示一个文件 12 Ecc, Yaffs_Tags本身的ECC校验和 2 Unused     其中Serial Number在文件系统创建时都为0，以后每次写具有同一ObjectID和ChunkID的page的时候都加一，因为YAFFS在更新一个PAGE的时候总是在一个新的物理Page上写入数据，再将原先的物理Page删除，所以该serial number可以在断电等特殊情况下，当新的page已经写入但老的page还没有被删除的时候用来识别正确的Page，保证数据的正确性。 ObjectID号为18bit，所以文件的总数限制在256K即26万个左右。     由于文件系统的基本组织信息保存在页面的备份空间中，因此，在文件系统加载时只需要扫描各个页面的备份空间，即可建立起整个文件系统的结构，而不需要像JFFS1/2 那样扫描整个介质，从而大大加快了文件系统的加载速度。     一个YAFFS设备是一个逻辑设备，它代表了一个物理设备的部分或整体。你可以认为它是一个Nand上的一个“分区”。比如，该分区可能覆盖整个NAND，也许只是一半，而另外一半就是另一个Yaffs_Device.它也可以用于你使用一个非flash设备（比如RAM）来测试的情况下。 一个Yaffs_Device记录了起始和结束块。通过改变它的起始和结束块，你就可以在同一个物理设备上使用不止一个的Yaffs_Device。 这里将需要你自己建立的Yaffs_Device结构的数据域列出，其他数据域由Yaffs自动创建。 int nDataBytesPerChunk     如其名，这是每一个chunk的字节数，还记得吧，在yaffs术语中，一个页就是一个chunk，因而它也是一页的字节数。它是数据字节数，即不包含OOB的数据。比如一页时2048字节+64字节的OOB，那么数值nDataBytesPerChunk为2048。 int nChunksPerBlock     物理Nand设备中每页包含的chunk（就是Nand上的页）的数目，最少是2。 int spareBytesPerChunk     空闲域（spare area）大小，比如：每个chunk（页）的OOB字节数。 int startBlock     该逻辑Yaffs_Device设备第一个块的块号（而字节地址），注意，yaffs需要第一个块是空闲的，因此你不可以设置该变量为0，如果设置为0，Yaffs会给它加1，并且会在结束块号上也加1，在你设置设备从块0开始，到最后一个块结束，这意味着yaffs试图写一个不存在的块，从而出现错误。 int endBlock     该逻辑Yaffs_Device设备的最后一个块号。如果startBlock为0，那么yaffs会使用endBlock+1，至少使startBlock+nReservedBlocks+2 int nReservedBlocks     这是YAFFS必须保留，用于垃圾回收和块错误恢复的可擦除块的数目。至少是2，但是5更好。如果你使用一个不会损坏的介质，比如RAM或者RAM盘，或者主机文件系统模拟，那么可以是2。 int nShortOpCaches     配置当前设备YAFFS Cache项的数目。0值表示不使用cache。对于大多数系统，推荐使用10到20之间的一个数值。不能大于YAFFS_MAX_SHORT_OP_CACHES定义的数值。 int useNANDECC     这是一个标志，用于指示是由yaffs执行ECC计算，还是由NAND驱动程序来执行ECC计算。（译者注：此数值取0，则使用yaffs来执行ECC计算，软件ECC计算。如果想要使用硬件ECC校验时，应该设置为1，并且在NAND驱动程序中加入硬件ECC校验的代码。） void *genericDevice     这是一个指针，它应该指向任何数据，底层NAND驱动程序需要知道以从物理设备读、写。 int isYaffs2     我们使用的是否YAFFS2版本？ int inbandTags     是否为OOB区，如果不是，那么它为真，仅用于yaffs2 u32 totalBytesPerChunk     这个名字可能有点误导人，它应该等于nDataBytesPerChunk ，而非其名字暗示的nDataBytesPerChunk + spareBytesPerChunk。如果inbandTags为真，那么yaffs设置nDataBytesPerChunk，因此有足够的空闲空间存储数据，yaffs会在空闲域中正常存储。 write/readChunkWithTagsFromNAND, markNANDBlockBad queryNANDBlock 这些都是函数指针，你需要提供这些函数来给YAFFS，读写nand flash。 3.NAND Flash 访问函数 int (*writeChunkWithTagsToNAND) (struct yaffs_DeviceStruct * dev, int chunkInNAND, const u8 * data, const yaffs_ExtendedTags * tags);   dev: 要写入的yaffs_Device逻辑设备. chunkInNAND: 将chunk写入的页 Data: 指向需要写入的数据的指针 tags: 未压缩（打包）的OOB数据 Return: YAFFS_OK / YAFFS_FAIL 该函数将页（chunk）写入nand中，向nand中写入数据。数据和标签（tags）永远不应为 NULL. chunkInNand 是将要写入的页的页号，而不是需要转换的地址。 int (*readChunkWithTagsFromNAND) (struct yaffs_DeviceStruct * dev, int chunkInNAND, u8 * data, yaffs_ExtendedTags * tags);  dev: 要写入的yaffs_Device逻辑设备. chunkInNAND: 将chunk读入的页 Data: 指向需要读入的数据的缓冲区指针 tags: 指向未压缩（打包）的OOB数据的缓冲区指针 Return: YAFFS_OK / YAFFS_FAIL 该函数执行上一个函数的相反的功能，首先，读取数据和OOB字节，接着将这些输入放在一个由参数data指向的缓冲区中 int (*markNANDBlockBad) (struct yaffs_DeviceStruct * dev, int blockNo);   dev: 要写入的yaffs_Device逻辑设备. blockNo: 要标记的块. Return: YAFFS_OK / YAFFS_FAIL int (*queryNANDBlock) (struct yaffs_DeviceStruct * dev, int blockNo, yaffs_BlockState * state, u32 *sequenceNumber);   dev: 要写入的Yaffs_Device逻辑设备. blockNo: 要标记的块. state: Upon returning this should be set to the relevant state of this particular block. Sequance number: 该块的顺序号（The Sequence number），为0表示此块未使用 Return: YAFFS_OK / YAFFS_FAIL     它应检查一个块是否是有效的。如果在OOB中设置了坏块标记，那么*state应该被赋值为YAFFS_BLOCK_STATE_DEAD，*sequenceNumber赋值为0，然后返回YAFFS_FAIL。     如果该块没坏，那么应解压缩标签。标签解压缩后，若发现chunk已使用(查看tags.chunkUsed),则*sequenceNumber应赋值为tags.sequenceNumber，*state赋值为YAFFS_BLOCK_STATE_NEEDS_SCANNING，否则该块未使用，则*sequenceNumber赋值为0，*state赋值为YAFFS_BLOCK_STATE_EMPTY 4. YAFFS的缓存机制     由于NandFlash是有一定的读写次数的，所以在对一个文件进行操作的时候往往是先通过缓冲进行，对最后一次性写入NandFlash，这有效的减少了用户对NandFlash的频繁操作，延长了NandFlash的寿命。下面大致说一下YAFFS的缓存机制： 4.1.首先在yaffs_mount的时候会对yaffs_dev这个结构体进行注册，和缓冲部分相关的有： dev->nShortOpCaches//这个变量决定了有多少个缓冲，因为缓冲会大量的占用堆栈的空间，所以在yaffs不建议缓冲的数量很大，即使你填一个很大的数，系统也不会超过YAFFS_MAX_SHORT_OP_CACHES的总数。 yaffs_ChunkCache *srCache;//缓冲区的首地址，dev->srCache = YMALLOC( dev->nShortOpCaches * sizeof(yaffs_ChunkCache));下面介绍一下缓冲区这个结构体的组成： typedef struct { struct yaffs_ObjectStruct *object;//一个缓冲区对应一个文件 int chunkId; int lastUse; //通过lastUse来 int dirty; //标志了这一个缓冲区是否被使用 int nBytes; __u8 data[YAFFS_BYTES_PER_CHUNK];//数据区 } yaffs_ChunkCache; 4.2.什么时候用到缓冲区？        用到缓冲区最多的地方显而易见是对已经创建的文件进行写操作。而且是需要写的大小和512不一致的时候，这是因为如果是刚好512的话，系统会直接写入NandFlash中。对于小于512的系统首先会调用yaffs_FindChunkCache(in,chunk)这个函数来判断in这个object是否在缓冲区中存在。如果存在会调用已有缓冲区进行操作。当然如果是第一次对一个object进行操作，肯定在缓冲区中是不存在对应它的空间的，因此系统会调用yaffs_GrabChunkCache函数为此次操作分配一个缓冲区。 5. 应用层接口     YAFFS为连接的应用程序提供了一组函数。大部分跟标准C库函数,如open/close一致，只是增加了yaffs_前缀，如 yaffs_open. 这些函数定义在direct/yaffsfs.h中。     初始化yaffs来完成读写，你必须在每个你要使用的yaffs设备上调用yaffs_mount。比如yaffs_mount(”/boot”)。这可以在系统启动的时候执行，如果存在一个操作系统，那么程序需要考虑这点。在你完成使用的时候，你也需要调用yaffs_umount函数，这样yaffs就会将它需要状态写入磁盘。 如果读写文件的应用层接口已经存在，你可以根据相关的操作系统调用来封装相关的函数调用。 1 yaffs_mount( ) 功能说明：加载指定器件。 输入参数：path    要加载的器件。 输出参数：无。 返回值： 表明加载的状态。 调用的函数：yaffsfs_FindDevice( )、yaffs_GutsInitialise( )。 2 yaffs_open( ) 功能说明：按照指定方式打开文件。 输入参数：path    文件的绝对路径；           Oflag   打开的方式；           Mode    文件许可模式。 输出参数：无。 返回值：句柄。 调用的函数：yaffsfs_GetHandle( )、yaffsfs_FindDirectory( )、yaffs_MknodFile( )、yaffsfs_PutHandle( )、yaffs_ResizeFile( )、yaffsfs_FindObject( )。 3 yaffs_write( ) 功能说明：根据打开文件的句柄，从指定数组处读指定字节写入文件中。 输入参数：fd      要写入的文件的句柄；           Buf     要写入的数据的首地址；           Nbyte   要写入的字节数。 输出参数：无。 返回值： 写入了的字节数。 调用的函数：yaffs_WriteDataToFile( )、yaffsfs_GetHandlePointer( )、yaffsfs_GetHandleObject( ) 4 yaffs_read( ) 功能说明：根据打开文件的句柄，从文件中读出指定字节数据存入指定地址。 输入参数：fd       要读出的文件的句柄；           Buf      读出文件后要存入的数据的首地址；           Nbyte    要读出的字节数。 输出参数：无。 返回值： 读出了的字节数。 调用的函数：yaffs_ReadDataFromFile( )、yaffsfs_GetHandlePointer( ) 5 yaffs_close( ) 功能说明：关闭已经打开的文件句柄，yaffs 有缓冲机制，当调用yaffs_close()关闭文件之后能够保证将内容写入nandflash。 输入参数：fd    需要关闭的文件的句柄； 输出参数：无。 返回值：无。 6. YAFFS在MQX的应用案例     YAFFS提供了直接调用模式，可以方便移植到 none-OS或者light-weighted OS中。附件是将YAFFS移植到Freescale MQX实时操作系统的源代码和工程，可以在II型集中器的Demo Board上运行。     初步的测试表明YAFFS工作正常，能够完成创建目录，创建/删除文件，读/写文件操作等。 YAFFS非常适合none-OS或者是light-weighted OS，使用YAFFS需要关注的是RAM的消耗，适合小量文件(<20)。 如果不想使用MQX默认的MFS(FAT32文件系统)，YAFFS可以作为一个文件系统的备选方案。

Man powers his home from local stream with DIY micro-hydro plant - StumbleUpon The above project is amazing. Imagine a Kinetis V as the inverter for a micro-turbine based on a PMSM or BLDC ??

Recently, some customers have provided us with feedback stating they have been experiencing difficulties when connecting  Kinetis L series  microcontrollers using Multilink Universal probes, after checking the connection and software settings no obvious errors could be found. This recurrent problem has been confirmed by several customers, the  problem is caused by a long connection line. My suggestion is to keep connection line length to 10cm or less; otherwise, the IDE may not be able to establish the connection through the Multilink Universal.

The DOC introduces the nano-edge placement  feature for KV4x family, it gives the application for the nano-edge placement feature, in other words, it's target is to increase the PWM signal resolution. It gives the example code and PWM waveform for the nano-edge placement feature.

作者 Sam Wang & River Liang 在RISC架构的MCU中，通常是加载-存储（Load and Store）的操作机制，而这种方式不能提供传统8bit架构MCU的直接位操作内存和地址空间。为此飞思卡尔在M0+系列MCU上集成了BME（Bit Manipulation Engine）位操作引擎功能，例如KE和KL系列里都带有BME，它从硬件上提供了对外设地址空间用读-修改-写的操作方式来实现位操作。         使用BME能够降低总线的占用率和CPU执行时间，这些效果都能够降低系统的功耗。另外使用相比于用C语言实现相同功能的代码，使用BME能够更节省代码空间。这些可以参照         BME功能支持访问从0x4000_0000开始的，大小为512K的地址空间，并把它映射成从0x4400_0000到0x5fff_ffff的内存空间。         好了，长话短说。下面转入正题，我们应该如何使用BME来进行位操作，并达到节省代码空间、提高效率的效果。 一、写操作方式，对定义内容用写的方式来实现与、或、异或、位域插入功能 1：BME的&操作可以一次对IO的几个bit清0     //     0x21<<26 | addr (A0~A19) //GPIOA_PDOR   地址为   400F_F000 #define GPIOA_AND *((volatile unsigned char *) (0x44000000+0xFF000)) 例: GPIOA_AND=0xaa; #define GPIOA_AND_I *((volatile unsigned int *) (0x44000000+0xFF000)) 例: GPIOA_AND_I=0x55aa; 实际上命令是将400f_f000的内容与目标数进行&运算。修改volatile unsigned char, volatile unsigned int, volatile unsigned long来实现BME的所谓8,16,32位操作.下面命令相同。 2：BME的|操作可以一次对IO的几个bit置1     //       0x22<<26 | addr (A0~A19) #define GPIOA_OR *((volatile unsigned char *) (0x48000000+0xFF000)) 例: GPIOA_OR=0xaa; #define GPIOA_OR_I *((volatile unsigned int *) (0x48000000+0xFF000)) 例: GPIOA_OR_I=0x55aa; 实际上命令是将400f_f000的内容与目标数进行|运算。 3： BME的^操作          //     0x23<<26 | addr (A0~A19) #define GPIOA_XOR *((volatile unsigned char *) (0x4C000000+0xFF000)) 例：GPIOA_XOR=0xaa; #define GPIOA_XOR_I *((volatile unsigned int *) (0x4C000000+0xFF000)) 例: GPIOA_XOR_=0x55aa; 上面3个例子讲解了一般的与、或、异或等常用操作，下面来点复杂一点的。                                                                                           4： BME的位域插入操作BFI（Bit Field Insert）//   (5<<28) | (bit<<23) | (width<<19) | addr (A0~A18) #define BME_BFI_ADDR (ADDR, BIT, WIDTH)   (*(volatile uint32_t *) (((uint32_t) ADDR) | (1<<28) | (BIT<<23) | (WIDTH<<19))) 在这里bit是插入的位置，表示被操作目标的最低位开始被操作，Width这里是插入的数据长度 例：BME_BFI_ADDR(&ADC0_CFG1, 0x05, 0x01) = 0x40; 结果是将寄存器ADC0_CFG1从bit5开始，用0x40的bit5来替换ADC0_CFG1的bit5，0x40的bit6来替换ADC0_CFG1的bit6，调用该命令后，寄存器ADC0_CFG1_ADIV = 2 相当于执行了mask = ((1 << (w+1)) - 1) << b;                          //等一系列位操作。                             (ADC0_CFG1 & ~mask) | (0x40 & mask); 使用BFI功能需要注意的是，操作地址是A0到A18，而GPIO寄存器的A0到A19是从FF000开始，因此会有1bit 的地址冲突。为此，在使用BFI操作GPIO的寄存器时，使用的是内存映射出来的地址空间，此时GPIO的起始地址将为F000，如果还使用原来的地址，命令将会无效。之前提到的AND、OR、XOR操作，对于GPIO地址空间在FF000还是F000都适用 #define BME_BFI_GPIOA (BIT, WIDTH)        (*(volatile uint32_t *) ((uint32_t) (5<<28) | (BIT<<23) | (WIDTH<<19) | 0xF000)) 例：BME_BFI_GPIOA(0,3) = 0x0a; 结果是GPIO_PDOR从bit0开始，一共4位被1010替换了。 二、读操作方式 5, BME的读操作使某位置1, Load-and-Set 1 Bit// #define PTA1_SET   (void) (*((volatile unsigned char *) (0x4C000000+ (1<<21) + 0xF000))) #define PTA1_SET_I   (void) (*((volatile unsigned int *) (0x4C000000+ (1<<21) + 0xF000))) 例: PTA1_SET;   //效果是GPIOA1高电平         LAS1      第1位    GPIOA_PDOR地址的A0-A15 6, BME的读操作使某位清0, Load-and-Clear 1 Bit #define PTA2_CLR   (void) (*((volatile unsigned char *) (0x48000000 + (2<<21) + 0xF000))) #define PTA2_CLR_I   (void) (*((volatile unsigned int *) (0x48000000 + (2<<21) + 0xF000))) 例: PTA2_CLR;     //效果是GPIOA2低电平        LAC1      第2位     GPIOA_PDOR地址的A0-A15 7, BME同时提取多个bit，Unsigned Bit Field Extract 前8位内                     //UBFX      第1位开始       取1+1位   GPIOA_PDOR地址的A0-A18 #define PTA_OUT    *((volatile unsigned char *) (0x50000000+ (1<<23) + (1<<19) + 0xF000)) 前16位内                   //UBFX      第1位开始       取1+1位   GPIOA_PDOR地址的A0-A18 #define PTA_OUT_I    *((volatile unsigned int *) (0x50000000+ (1<<23) + (1<<19) + 0xF000)) 例: 初始值GPIO_PDOR = 0x3a;   //            11_1010   temp = PTA_OUT; //                    此时temp = 0x01 例: 初始值GPIO_PDOR = 0x35;   //            11_0101   temp = PTA_OUT; //                    此时temp = 0x02 该宏定义UBFX功能是将GPIO_PDOR从bit1开始提取1+1位，并以bit1为最低位赋值到目标变量。          需要注意的是UBFX与BFI一样操作的都是映射内存空间，用来操作GPIO时要以F000为起始地址。         BME执行的是读-修改-写操作，而我们很多寄存器有些位是w1c，也就是所谓的write-1-clear，写1清0的工作方式。使用BME时就需要特别注意和小心了，否则会出现很多不可预料的后果。               如果一个寄存器中有多个连续的W1C位，我们就不要使用LAS1来对寄存器写1清0了，因为在LAS1这个操作中，其中有一步操作是将数据读回（在reference manual中有read data return to core一说）。这一步会将原本不需要清0的位给清了。         下面介绍这个情况的实验。 在我们M0+的PWM模块中，寄存器TPM0_STATUS所有有效位都为w1c，我们模拟一个情景： 系统48MHz，TPM时钟128分频，TPM0定时中断计数器最大值为37499，并使能溢出中断。 通道0设置为output compare模式的match output low，比较值为10000，不触发中断。 通道1设置为output compare模式的match output high，比较值为20000，不触发中断。 上面的设置可以使我们每50ms进入一次中断，需要我们在中断服务程序中清中断标志。 TPM0_STATUS 地址为 0x4003_8050 中断函数中设置断点观察TPM0_STATUS的值，为1_0000_0011 B #define TPM0_STATUS_LAS1   (void) (*((volatile unsigned int *) (0x4C000000| (1<<21) | 0x38050))) 中断程序中用TPM0_STSTUS_LAS1将bit1置1清0，得到的结果是TPM0_STATUS = 0，使用LAS1作用在该寄存器的其他位结果都一样。将其他不需要改动的位都清0了。     我们换种方式。 #define TPM0_ STSTUS_BFI *((volatile unsigned int *) (0x50000000 | (0<<23) | (8<<19) | 0x38050)) =0x001 中断里用BFI去修改该连续的w1c位，从bit0开始，长度为8+1位，执行TPM0_STSTUS_BFI后bit8和bit2仍为1， bit0已经被清0了。这确实是我们想要的效果。         此后我们遇上一个寄存器有多个连续w1c时，可以使用BFI的方式来改写寄存器w1c位的值，而位判断则采用UBFX的方式来提取该位域。 下面是针对比较器的CMP0_SCR寄存器操作的例程. CMP0_SCR是8bit的寄存器bit1和bit2是w1c #define CMP_SCR_CFR_CLR *((volatile unsigned char *) (0x50000000+ (1<<23) + (1<<19) + 0x73003)) =4 #define CMP_SCR_CFF_CLR *((volatile unsigned char *) (0x50000000 + (1<<23) + (1<<19) +0x73003)) =2              //           BFI                    第一位开始   1+1位          2对应bit2bit1为01          4对应bit2bit1为10 #define CMP_SCR_CFR    *((volatile unsigned char *) (0x50000000 + (2<<23) + (0<<19) + 0x73003)) #define CMP_SCR_CFF    *((volatile unsigned char *) (0x50000000 + (1<<23) + (0<<19) + 0x73003))             //            UBFX                分别是提取bit2和bit1的值 void CMP_Change(void) { If (CMP_SCR_CFR) { CMP_SCR_CFR_CLR; }                   If (CMP_SCR_CFF) { CMP_SCR_CFF_CLR; } }         总结，BME功能可以有效提高M0+的位操作性能并减少代码占用空间，但用于处理w1c位时要特别小心，总的来说BME是个好东西，在内核资源紧张的时候可以给用户提供一个精简代码的手段。

       FreeRTOS is a high quality, risk free, supported, free RTOS, and now it is already successful to porting more 35 architectures. As a popular RTOS, more and more embedded engineers considering it for their next project.        Next, I’m going to show you the steps of creating a MAPS-K22 FreeRTOS demo by IAR and I’ve also attached a template demo and FreeRTOS source code (Fig 1). Fig 1 FreeRTOS source code directories and files     1. Copy the FreeRTOS source code to ~\MAPSK22_SC\Libraries     2. Create FreeRTOS_Source group in the workspace, then add the source code (Fig 2) Fig 2 3. Add an application code in the main.c This is a very simple configuration. It creates two tasks, one software timer, and also uses a button interrupt. The two tasks communicate via a queue. The receiving task toggles the LED3 each time a value is received. Pressing user button K5 generates an interrupt. The interrupt service routine for which resets a software timer, then turn the LED1 on. The software timer has a five second period. The timer will expire when K5 has not been pressed again for a full five seconds. The callback function that executes when the timer expires simply turn the LED1 on again. Therefore, pressing K5 will turn the LED1 on, and the LED1 will remain on until a full five seconds pass without the button being pressed again. 4. Modify the Include Directories 5. Run the FreeRTOS demo After build the modified application code, then run it on MAPS-K22 board (Fig 3) Fig 3 IMPORTANT! Cortex-M FreeRTOS port specific configuration Configuration items specific to this demo are contained in ~\MAPSK22_SC\Libraries\RTOS\config\K22F51212\iar. The constants defined in this file can be edited to suit your application. In particular configTICK_RATE_HZ This sets the frequency of the RTOS tick interrupt. The supplied value of 1000Hz is useful for testing the RTOS kernel functionality but is faster than most applications require. Lowering this value will improve efficiency. configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY See the RTOS kernel configuration documentation for full information on these configuration constants. configLIBRARY_LOWEST_INTERRUPT_PRIORITY and configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY These are equivalents to configKERNEL_INTERRUPT_PRIORITY and configMAX_SYSCALL_INTERRUPT_PRIORITY, but presented in a form suitable for passing into the Freescale NVIC_SetPriority() library function. The NVIC_SetPriority() function expects priorities to be in the range of 0 to 15 - 0 being the highest priority and 15 being the lowest priority.

Heart rate monitors measure the heart rate during exercise or vigorous activity and gauge how hard the patient is working. Newer heart rate monitors consist of two main components: a signal acquisition sensor/transmitter and a receiver (wrist watch or smart phone). In some cases, the signal acquisition is integrated into fabric worn by the user or patient. MCUs analyze the ECG signal and determine the heat rate, while an 8-bit MCU can suffice for a simple heart rate monitor. For more complex analysis, such as heart rate variability, activity level and breathing rate, a high-end 32-bit MCU may be used. Furthermore, low power wireless technologies are used to allow the sensor to communicate to the receiver. Freescale offers 8-bit and 32-bit MCUs that are applicable across the entire spectrum of heart rate monitors. In addition, the Freescale portfolio includes inertial sensors or accelerometers for activity monitoring and ZigBee® and proprietary wireless solutions to enable communication between the sensors and the receiver. For more information go to freescale.com/APLHRM

Intro to Cortex-M0+ main features presented by Alejandro Lozano, Freescale, TIC. Intro to Cortex M0+. Kinetis L series description. Introducción al Cortex-M0+. Principales características presentadas por Alejandro Lozano, Freescale TIC. Introducción al Cortex-M0+ Descripción de la familia Kinetis L.

最近在论坛、QQ群里好多人都在讨论低功耗设计，想到之前遇到的一个客户也有这方面的一个要求，顺着他的想法做了一个在低功耗模式下使用ADC的例子。客户要做的是一个恒温控制，在设定温度范围内让MCU进入休眠状态，只有在超过温度范围后才唤醒MCU进行温度调节。话不多说，让我们开始例程介绍。 运行平台： FRDM-25Z IARv7.3 在KL25_SC代码包中platinum工程上修改 Low Power Mode 简介 飞思卡尔Kinetis系列MCU基于90纳米TFS技术，使得MCU在低功耗模式下，拥有良好的性能和功耗表现，KL系列更是被评为业内最低功耗的MCU。KL25Z 功耗模式总共有 11 种，分别是：Run、VLPR、Wait、VLPW、Stop、VLPS、LLS、VLLS3、VLLS2、VLLS1、VLLS0，能够满足客户对MCU各种低功耗的配置要求，在深度睡眠模式下智能外设能够处理相应数据而不需要唤醒内核。    图1 在本设计中需要在低功耗模式下监控温度，热电偶的电信号需要用到ADC进行采样，查手册可知ADC能够运行的最低功耗模式是VLPS模式。VLPS模式下大部分外设仍然可以使用，但需要注意的是在VLPS模式下总线时钟是禁止的，因此在进入VLPS模式前应该将ADC的时钟设为ADACK，不然它进入VLPS模式后就嗝屁了。VLPS模式下只能采用硬件触发来触发ADC采样，本例采用的是LPMR定时器来触发ADC采样。VLPS模式下可以采用中断唤醒方式，本例采用ADC中断唤醒。当然也可以采用异步DMA通道来搬运ADC转换结果，搬运完成后自动回到VLPS模式下，感兴趣的话也可以试一下这种方式哈。   图2 代码介绍：    int main (void) {      #ifdef CMSIS  // If we are conforming to CMSIS, we need to call start here     start(); #endif          lptmr_init(1000,LPTMR_USE_LPOCLK);   //trigger ADC per 1000ms     // 初始化代码中设置LPO作为lptmr的时钟源，保证lptmr在VLPS下能够正常工作；     init_ADC16();                                                                                          //初始化ADC，设置ADC硬件触发源为lptmr，使能ADC范围比较模式，即当转换结果小于C1V，大于C2V时保存结果；     enable_irq(ADC0_irq_no);                                                                      //在进入低功耗模式前使能ADC中断。     printf("Enter VLPS mode...\r\n");     clockMonitor(OFF);     enter_vlps();     while(1)   {                  if(flag_wakeup == 1)           {             flag_wakeup = 0;             ADC0_SC2 &= ~ADC_SC2_ACFE_MASK;              disable_irq(ADC0_irq_no);                                                              //退出后，为调节温度需关闭范围比较模式，同时关闭ADC中断，采用查询模式；             printf("Wake up from VLPS..\n");             printf("adcresult = %d\n",adcresult);           }                              if((ADC0_SC1(0) & ADC_SC1_COCO_MASK) == ADC_SC1_COCO_MASK)     //查询转换结果           {             adcresult = ADC0_R(0);             printf("wake up adcresult = %d\n",adcresult);             if((adcresult>= 4000) && (adcresult<= 5000))                                   //当调节到ADC结果再次进入调节范围时，准备进入低功耗模式；             {               ADC0_SC2 |= ADC_SC2_ACFE_MASK;                                         //为实现监控，重新使能范围比较模式和ADC中断。               enable_irq(ADC0_irq_no);               printf("Enter VLPS mode...\n");               clockMonitor(OFF);               enter_vlps();             }           }              } }        实验结果：      设置比较值为4000~5000，打印结果如下： 图3       好了，就这些了，第一次写技术文章，很浅显的东西说了一大堆，比较乱，望批评指正哈。       附件为参考代码。

2014/11/20    Add support FRDM-KE06Z.

Common： 1. 如何在IAR、Keil和Codewarrior中禁止掉Kinetis的NMI脚 2. 使用Codewarrior、IAR和Keil三大IDE配置生成bin文件 3. Codewarrior、IAR和Keil三大IDE局部优化指令 Kinetis Design Studio 1. 飞思卡尔免费开发环境KDS调试时显示外设寄存器内容​ CodeWarrior: 1. Codewarrior中如何查看Flash和RAM占用Size大小， include路径如何配置？ 2. Codewarrior10.5低功耗模式唤醒后保持调试功能 3. 浅谈Codewarrior局部优化技巧 4. 在Codewarrior10.x调试模式下导出内存数据到s19文件 5. CodeWarrior10.x中英文系统界面切换 6. CodeWarrior10.x新建Kinetis工程方法 7. Codewarrior10.x下使用ewl_noio库以节省代码空间 8. Codewarrior10.x下生成的image文件后缀都是.hex 9.代码重定位-CodeWarrior/KDS-kineits L 系列 IAR: 1. 利用IAR Timeline工具测试delay函数执行时间 2. 使用老版本IAR支持新器件 3. IAR环境下Flash loader工作原理 4. IAR环境下Flash调试和RAM调试的区别 5. IAR环境下更改ARM大小端存储模式 6. 简单移植Kinetis IAR开发框架模板的方法 7. Kinetis图形化显示stack堆栈使用情况 8. IAR使用小技巧（常用快捷键，LiveWatch配置方法，修改调试模式入口地址） 9. 实现IAR下S19、Bin、Hex文件格式转换 10. IAR生成和调用Kinetis函数库 11. 批处理查找添加IAR工程头文件 12. 通过IAR MAP文件查看目标文件内存分配 13. 解析IAR的ILINK链接器icf配置文件 14. 重定向printf输出到IAR虚拟终端 15. 解决双击eww文件无法同时打开多个IAR工程的问题 16. IAR下使用noinit段的方法和指定地址的变量分配 Keil: 1. Keil编译器ARMCC中添加对GCC扩展格式的支持 2. 关于Keil无法正确下载程序问题的总结

本文分享自China-FAE Team，谢谢同事的sharing！ MQX如何自适应10/100Mbps网络          Kinetis K60 媒体接入控制器MAC(Media Access Layer)实现了数据链路层,同时支持10Mbps和100Mbps两种速率。MAC通过MII/RMII接口与PHY芯片连接。         现有的MQX4.0 RTCS协议栈在K60  Tower System Board无法支持与10Mbps交换机等网络设备通信。问题的原因是MQX4.0 BSP初始化代码macnet_init.c默认将MAC配置为100Mbps/Full Duplex模式。     MQX4.0 BSP针对TWR-SER所使用的PHY芯片（KSZ8041NL）的初始化代码没有考虑用户指定链路速率的情况，仅由PHY做默认设置。为了能够自适应链路速率，不仅需要设置KSZ8041NL的控制寄存器（0.13 Speed Select、0.8 Duplex Mode），还要设置K60的ENET_RCR/ENET_TCR寄存器。 解决办法： 修改MQX4.0 BSP代码，使能PHY芯片与网络设备端进行链路速率自动协商，然后读取PHY协议好的链路速率，通过这个链路速率设置MAC的相关寄存器ENET_RCR/ENET_TCR。MQX4.0的 PHY的接口函数已经提供了speed和duplex函数，可供MAC初始化调用，可以保证系统代码的可移植性。 测试结果： 修改后的MQX4.0 BSP代码能够自适应10/100Mbps网络，网络通信正常。

You can put the code directory in the SDK_2.6.0_FRDM-K64F\boards\frdmk64f to use. 1、Introduction As is known to all, we use debugger to download the program or debug the device. FRDMK64 have the opsenSDA interface on the board, so wo do not need other’s debugger. But if we want to design a board without debugger but can download the program, we can use the bootloader. The bootloader is a small program designed to update the program with the interface such as UART,I2C,SPI and so on. This document will describe a simple bootloader based on the FRDMK64F.The board uses SD card to update the application. User can put the binary file into the card. When the card insert to the board ,the board will update the application automatically. The bootloader code and application code are all provided so that you can test it on your own board.   2、Bootloader’s implementation   The schematic for SD card is shown below. The board uses SDHC module to communicate with SD card.                                                  Figure 1.Schematic for SD card   We use the 2.6.0 version of FRDM-K64F’s SDK.You can download the SDK in our website. The link is “mcuxpresso.nxp.com”. The bootloader uses SDHC and fafts file system. So we should add files to support it.                   Figure 2.The support file   In main code, the program will wait until the card has inserted. Then it will find the file named “a000.bin” in sd card to update the application. If the file do not exist, the board will directly execute the application. If there is no application, the program will end. The following code shows how the program wait for inserting sd card. It will also check if the address has the application’s address.                      Figure 3.The code -- wait for inserting card   The following code shows how the program opens the binary file. If sd card doesn’t have the file, the program will go to the application. Figure 4.Open the binary file   If the program opens the file normally, the update will begin. It will erase 200k’s space from 0xa000. You can adjust it according to your project. Now I will explain update’s method in detail. Our data is written to the buffer called “rBUff”. The buffer size is 4K. Before write data to it, it is cleared.  Please note that when we erase or program the flash, we should disable all interrupts and when the operations finish we should enable the interrupts.  The file size will decide which way to write the data to flash.  1、If the size < 4k ,we just read the file’s data to buffer and judge if its size aligned with 8 byte. If not , we increase the size of “readSize” to read more data in our data buffer called “rBuffer”. The more data we read is just 0.    2、If the size > 4K, we use “remainSize” to record how much data is left. We read 4k each time until its size is smaller than 4k and then repeat step 1. When finish the operation at a  time, we should clear the buffer and increase the sector numer to prepare the next transmission. Figure 5.Write flash operation code   The way to clear the space is shown in the figure. It will initialize the flash and erase the given size from the given address.  “SectorNum” is used to show which sector to erase. Figure 6.Erase operation code   The following figure shows how to write the data to flash.              Figure 7.Program operation code    Before we go to the application, we should modify the configuration we did in the bootloader.     Close the systick, clear its value.     Set the VTOR to default value.     Our bootloader runs in PEE mode. So we should change it to FEI mode.     Disable the all pins. You should disable the global interrupt when run these codes. And don’t forget to enable the global interrupt. Figure 8.Deinitalization code   Then we can go to the application. Figure 9.Go to Application   3、Memory relocation The FRDMK64 has the 1M flash, from 0x00000000 to 0x00100000.As shown in figure 10,we use the 0xa000 as the application’s start address.            Figure 10.The memory map   Now, I will show you how to modify the link file for user application in different IDE. In IAR                                    Figure 11.IAR’s ICF In MDK Figure 12.MDK’s SCF   In MCUXpresso Figure 13.MCUXpresso’s flash configuration 4、Run the demo 1) Download the bootloader first. 2) Prepare a user application program. We use the “led blinky” as an example. 3) Modify the Link file. 4) Generate the binary file with your IDE, please name it as “a000.bin”. 5) Put it into the sd card like figure 5. Figure 14.SD card’s content        6) Insert the card. And power on. Wait for a moment, the application will execute automatically. 5、Reference 1) Kinetis MCU的bootloader解决方案 2) KEA128_can_bootloader

Timer PWM Module presented by Ali Piña. Module Explanation Connection Diagram Output compare Configuration Hands-On Input Campture Configuration Hands-On Overflow Configuration Hands-On Modulo de Timer y PWM presentado por Ali Piña. Explicación del modulo. Diagrama de conexión. Configuración para output compare. Hands-on Configuración como Input Capture. Hands-On Configuración del Overflow. Hands-On

20141030    Release the Alpha version by Jiunn.Yang@freescale.com         a) Support FRDM-KL25Z and TWR-K60D100M.         b) Support X-modem 256 and 1K, and test by Teraterm, http://ttssh2.sourceforge.jp/

Ezportdl：programming Kinetis EZport by MCU-Link Pro NXP launched MCU-Link Pro at the end of 2021. This is a new debugger probe that has been significantly upgraded based on mcu-link. The focus of the upgrade is to add current measurement, analog signal monitoring, USB to SPI and I2C bridge working modes, and on-board lpc804 for peripheral simulation. Among these upgrades, USB to SPI and I2C are more interesting and practical. Combining Kinetis EZport and flashloader, MCU-Link Pro can directly download programs to the target chip, instead of bridge through another board as before. This project uses the USB to SPI function of MCU-Link Pro to download programs to kinetis K series chips through EZport. In addition to the Kinetis series, many ColdFire chips of NXP also support EZport. In addition, since EZport interface protocol is compatible with SPI NOR flash, this project can also directly burn SPI NOR flash chip. This can also be used when debugging or producing i.mxRT500 and i.mxRT600. MCU Link Pro can easily use USB to SPI and I2C interfaces because NXP provides LIBUSBSIO library. Readers can download this library and related documents from NXP's official website. Here is a brief introduction. The SUB to SIO function is only an optional additional function for lpclink2 and MCU-Link Pro devices. Its main function is to provide CMSIS-DAP debugging interface for the target microcontroller, and provide virtual serial communication using USB VCOM class. The following figure is the process framework of LIBUSBSIO. As shown in the figure, LIBUSBSIO library can support SPI, I2C and GPIO.   The core of LIBUSBSIO communication is SPI_Transfer (lpc_handle hspi, spi_xfer_t * xfer) function. This function can send and receive 1024 bytes at most at one time. In addition, LIBUSBSIO library can set baud rate, clock polarity, sampling edge, and frame length. The following figure shows the output waveform captured by the logic analyzer.   Command Description WREN Write Enable WRDI Write Disable RDSR Read Status Register READ Flash Read Data SP Flash Section Program SE Flash Sector Erase BE Flash Bulk Erase RESET Reset Chip WRFCCOB Write FCCOB Registers dl Image download fw Write/read any sequence to SPI port   This project has been tested on FRDM-K64F.    Hardware connection: MCU-Link pro            FRDM-K64F J19-2        ---       R75-1（flying a line is needed） J19-3        ---       J1-8 J19-4        ---       J11-1 J19-5        ---       J1-12    Connect ground together.   Operation steps: Before power on, R75-1 should be connected to ground, then connect openSDA USB. Thus, K64 will enter EZport status. Read memory ezportdl read [address] [number]   Write enable ezportdl wren Write flash, which can write up to 1000 byte. ezportdl sp [length] [data]   Program a binary file into flash Ezportdl dl [address] [file name] [flag]  address means start address flag=0 means erase flash before programming, flag=1 means don’t erase the flash.     Project download address: https://github.com/jophpan/ezportdl/tree/master  

Explore the Features of MCU-Link Pro MCU-Link Pro is the latest ARM Cortex-M series core debugger tool from NXP. Some of its features are inherited from the past LPC-LINK2. But overall it was redesigned and introduced and many new features. These additional functions make the MCU-Link Pro a very powerful debugging tool. This article will explore these features and highlight interesting and useful ones. These functions mainly include the following aspects. SWD+SWO Measurement of current and power consumption MCU-Link pro is supported by new blhost LIBUSBSIO library for windows, Ubuntu Linux and MacOS A secondary chip LPC804 on the board   SWD+SWO MCU-Link Pro support SWD only. It doesn’t support JTAG. The main controller in the board is LPC55S69. There is level shifter circuit between the port and LPC55S69. It makes the board can debug the target board work at 1.2V to 5V. It has reference voltage trace circuit which is use to trace the target board voltage. It can trace the port automatically, needn’t any settings. The MCU-Link Pro also can supply 1.8V/3.3V to target board. The maximum current is 350mA. This is done by connecting J6 and selecting by J5. The maximum speed of SWO is 9.6Mbit/s. Same as <PC-Link, MCU-Link Pro support CMSIS-DAP and Jlink firmware. These firmware are kept updating. The latest firmware of CMSIS-DAP is 2.25. If the firmware version is old, there will be a message jump out telling customer to update it when connecting to computer. We can see that the new version gives two VCOM while the original version only have one. The new VCOM use J26-4 and J26-5.   Measurement of current and power consumption MCU-Link pro provides a very interesting real-time function of current and voltage measurement. It can capture a burst of samples of target current usage, the target supply voltage, the shield current, the analog input, the debug interface reference voltage, or target power consumption at up to 100ksps. This information is displayed in a graph and can also be exported for further analysis. The average value of the collected data can also be displayed. And based on the current and voltage data, the power consumption can also be calculated and displayed in the graph. The place where the red line is drawn in the figure below is the real-time voltage at the time point of the mouse.     What's more interesting is that the energy measurement function does not need to activate the debug to capture the data, it is offline and has a separate data channel. But it can also be linked to a session if such a debug session exists. This is very useful in debugging various low-power applications. Not only can you see the power consumption change under each step of the command, but you can also check the power change rule for a long period of time when the system is running. Since there is a separate data channel, you can even debug the program in KEIL and watch the current change in MCUXpresso. The MCU Link Pro has two current measurement configurations, each with a maximum measurable current. This is to achieve maximum measurement accuracy for a variety of different objectives. There are two automatically controlled ranges in each configuration to provide greater precision. The automatic switching from low current measurement to high current measurement is completely controlled by hardware.   Each time the MCU Link Pro is powered up, the measurement circuit calibrates itself. There is no need to disconnect/reconnect the MCU Link Pro before calibration due to transistors are used to isolate the sensing circuit from the target power supply to avoid contention and to ensure a known voltage is applied to the system during calibration. At high sample rates, the MCUXpresso IDE may not capture all data, so the sample rate may need to be adjusted using the configuration options in the energy measurement configuration settings in the tool. If the target current exceeds the maximum current in the selected range, the measurement will saturate and cut off and will therefore be inaccurate. Blhost and MCU-Link Pro The most noteworthy feature of MCU Link Pro is its USB to SPI and I2C bridge functions. This enables the computer to send I2C and SPI signals directly through USB. This powerful function is not ignored by blhost. The new version of blhost can support this function and adds a new command parameter '- L'. Specifically, '- L SPI' refers to the SPI interface and '- L I2C' refers to the I2C interface. The following figure shows the test results on frdm-k64f. It can be clearly seen in the figure that the SPI interface of MCU Link Pro can communicate with mcuboot firmware on k64 and download the encryption program to flash.     In addition to KINETIS, this function is most suitable for i.mxrt600 and I mxRT500。 These two chips have serial ISP mode. User can download the program to ram through SPI or I2C port, and then directly let it run. Many users have this usage. In the previous examples in SDK, a board of twr-kv46 or twr-k65 or frdm-kl25 was required to receive command and data from UART and translate them to SPI and I2C command. Since there is no direct interface on these boards, flying wires are required, which is very troublesome. Moreover, NXP only provides firmware for these three boards. If you want to use other chips or boards, you must also transplant firmware. It's also very troublesome. But with MCU Link Pro, it's all very easy and pleasant.   LIBUSBSIO library In order to better expand the use of bridge functions, NXP has provided libusbsio library. By calling this library, you can realize the USB to SPI \ I2C \ GPIO function in your own application. I also made the upper computer tools for writing kinetis ezport and flash according to the libusbsio library provided by NXP. I introduced this point in detail in my last article. Interested friends can read my article. It is not enough to provide libraries based on windows and Linux. NXP also provides a python library. This library is based on python3 and can be installed through the following command >pip install libusbsio Its usage is not described in detail in the libusbsio documentation. Here is a general introduction. The following is an initialization procedure of libusbsio. import logging import logging.config from libusbsio import * # enable basic console logging logging.basicConfig() # load DLL from default directory sio = LIBUSBSIO(loglevel=logging.DEBUG) # the main code # calling GetNumPorts is mandatory as it also scans for all connected USBSIO devices numports = sio.GetNumPorts() print("SIO ports = %d" % numports) if numports > 0 and sio.Open(0): print("LIB version = '%s'" % sio.GetVersion()) print("SPI ports = %d" % sio.GetNumSPIPorts()) print("Max data size = %d" % sio.GetMaxDataSize()) if(sio.GetNumSPIPorts() > 0): spi = sio.SPI_Open(1000000, portNum=0, dataSize=8, preDelay=100) if spi: data, ret = spi.Transfer(spi_ssel[0], spi_ssel[1], b"Hello World") sio.Close() else: print("No USBSIO device found") ​ Line 9 is to open an instance of libusbsio library; Line 14: get the number of usbsio ports of all USB bridges; Lines 18, 19 and 20 are the read version information, the number of SPI ports and the maximum size of SPI cache; Line 22: open an SPI interface; Line 24, start transmitting data. It can be seen from the above that the use process is relatively simple. And these commands are very similar to those of the C language library.   A secondary controller LPC804 on the board There is also an lpc804 on the MCU Link Pro board. This chip is confusing here. What is it for? Its UART, SPI and I2C ports are all connected for external use. But what's the use? One conceivable application is that the UART port is connected to the newly added vcom2, and then the SPI or I2C works in the slave mode. As a listener, it monitors the SPI or I2C bus to be debugged and displays it on the computer terminal. The LPC804 debug interface is the same as the debugging port of MCU Link Pro. Maybe the board itself is a development board, so that users can develop lpc804 programs? In addition, its UART-ISP port is connected to a UART port of LPC55S69. It seems that in the future, it can communicate with each other through the new version of CMSIS-DAP firmware. Let's look forward to new ways of playing in the future.

A vulnerability (CVE-2022-22819) has been identified on select NXP processors by which a malformed SB2 file header sent to the device as part of an update or recovery boot can be used to create a buffer overflow. The buffer overflow can then be used to launch various exploits. Refer to the attached bulletin for more information.   09/26/2022 - Bulletin updated to include fix datecode information. 11/01/2022 - Bulletin updated with clarification that mixed datecodes are RT600 only.