K53 : Power-Up Sequence about 5v tolerant GPIO

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

K53 : Power-Up Sequence about 5v tolerant GPIO

ソリューションへジャンプ
1,846件の閲覧回数
koichisakagami
Contributor II

Dear community,
I have a question about power-up sequence for 5v tolerant GPIO .

Device is Kinetis K50.

[Question]
When VDD power is not turned on ,
Is it possible to add a 5v input voltage to the 5v tolerant GPIO ?

Best Regards,
Koichi Sakagami

0 件の賞賛
返信
1 解決策
1,635件の閲覧回数
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

5 volt tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode to VDD.

There is no problem to apply 5V input voltage on those pins when VDD without power up.


Wish it helps.
best regards
Ma Hui

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

元の投稿で解決策を見る

0 件の賞賛
返信
2 返答(返信)
1,636件の閲覧回数
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

5 volt tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode to VDD.

There is no problem to apply 5V input voltage on those pins when VDD without power up.


Wish it helps.
best regards
Ma Hui

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 件の賞賛
返信
1,635件の閲覧回数
koichisakagami
Contributor II

Dear Ma Hui san,

Thank you for your reply.

I got it .

Best Regards,

Koichi Sakagami

0 件の賞賛
返信