FTM CnV Update Problem

[Jana_muralidharan]

So, I was trying to change the value of CnV based on the data's bit value

but the output stays in the initial wrote value but not changing

since I am just getting started in this MicroController MKE02Z64VLC4,

I don't know which step i am wrong, Please tell me which line is missing

#include "MKE02Z4.h"

#define FTM_MOD     24      // 25 ticks → 1.25us @ 20MHz
#define TICKS_0      7
#define TICKS_1     14

void FTM_Init(void)
{
    SIM->SCGC |= SIM_SCGC_FTM2_MASK;

    FTM2->MODE = FTM_MODE_WPDIS_MASK | FTM_MODE_FTMEN_MASK;

    FTM2->CNTIN = 0;
    FTM2->CNT   = 0;
    FTM2->MOD   = FTM_MOD;

    FTM2->CONTROLS[0].CnSC =
        FTM_CnSC_MSB_MASK |
        FTM_CnSC_ELSB_MASK;

    FTM2->CONTROLS[0].CnV = TICKS_0;

    /* ENABLE CHANNEL OUTPUT (CRITICAL) */
    FTM2->OUTMASK &= ~(1 << 0);

    /* Initial load */
    *(volatile __UINT32_TYPE__ *)0x4003A098 = 0x0021;

    FTM2->SC = FTM_SC_CLKS(1) | FTM_SC_PS(0);

    *(volatile __UINT32_TYPE__ *)0x4003A064 = 0x00;
}

static inline void wait_ftm_period(void)
{
    while(!(FTM2->SC & FTM_SC_TOF_MASK));
    FTM2->SC &= ~FTM_SC_TOF_MASK;
}

uint32_t word = 0x5555;

int main(void)
{
    FTM_Init();

    while (1)
    {
        for(int i = 0; i < 16; i++)
        {
            if (word & (1UL << i))
                *(volatile __UINT32_TYPE__ *)0x4003A010 = TICKS_1;
            else
            	*(volatile __UINT32_TYPE__ *)0x4003A010 = TICKS_0;

            /* ARM reload for next PWM cycle */
            *(volatile __UINT32_TYPE__ *)0x4003A098 = 0x0021;

            /* WAIT ONE PWM PERIOD */
            wait_ftm_period();
        }
    }
}

[Celeste_Liu]

Hello @Jana_muralidharan ,

Thanks for your post.

When FTMEN = 1 (which you have already set), the main registers of the FTM (including CnV, MOD, CNTIN, etc.) are write-buffered; the actual registers are only updated when a synchronization/load event is triggered. Otherwise, the new values will remain in the buffer, and the channel will continue using the old initialized values. Please see the description in RM:

Celeste_Liu_0-1766053059160.png

Celeste_Liu_1-1766053104360.png

Celeste_Liu_2-1766053261449.png

Please modify the code below to set LDOK=1 to enable the load:

            /* ARM reload for next PWM cycle */
            *(volatile __UINT32_TYPE__ *)0x4003A098 = 0x0201;//0x0200=LDOK, 0x0001=CH0SEL

Celeste_Liu_3-1766053941711.png

Hope it helps.

BR

Celeste

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[Jana_muralidharan]

If possible can you please explain the flow of how the PWM starts to generate please

[Celeste_Liu]

For this question, you can refer to our SDK demos for a deeper understanding.

Select Board | MCUXpresso SDK Builder

Celeste_Liu_0-1766140071913.png

BR

Celeste

[Jana_muralidharan]

But isn't it be like this since in that register at the third byte from the left that is MSB has the LDOK not in the second right so it is the only possible thing  right 

0x0020=LDOK, 0x0001=CH0SEL

Isn't that right from my point of view I guess

And Thank you for replying my post 🙇🏼‍ 

And please clarify this doubt of mine too please..

[Celeste_Liu · Accepted solution]

No, your understanding is wrong. I did a test, please see the result:
1) with the correct 0x0200=LDOK:

Celeste_Liu_0-1766139388647.png

2) with the wrong 0x0020=LDOK:

Celeste_Liu_1-1766139442165.png

I’m afraid you’ve mixed up byte order and bit numbering. For a 32-bit register, the documentation refers to fields by bit (bit0 is the least significant, bit31 the most significant). LDOK = bit9 has nothing to do with which byte it’s in.

Hope it helps.

BR

Celeste

[Jana_muralidharan]

Thank you, For your answer. i was so dumb found. thank you very much

but I used the built in library's mask but still the same issue but thanks any way for your imediate response