I'm working on custom board based on Freescale i.MX53.
I've got a problem with booting from Nand. So I need a piece of advice how to debug boot process, also it will be great to hear about my mistakes.
1. Boot loader: u-boot 2009.08.01
2. Nand connected via EIM_DA[0..7]
3. Nand: Micron MT29F4G08ABAEA, 512Mb, 8-bit, 3.3V
3.1 Type..........: SLC
3.2 Page size.....: 4096 + 224 bytes
3.3 Pages in block: 64
3.4 ECC...........: 8-bit
3.5 Bus...........: 8-bit
My current progress:
1. Board can boot from SD (BOOT_MODE[1:0] = 0b00; BT_FUSE_SEL = 0)
2. Board can boot through USB
3. Boot loader can read its configuration and Linux kernel from Nand. (rootfs is also there)
I use "*.imx" image, which consists of structures: IVT, Boot data, DCD; (data sheet, pg. 518 «Image Vector Table and Boot Data»).
During boot process of Linux kernel I print a value of SRC_SBMR (pg. 4357) register:
1. 0x10C63D45 (SD boot configuration, from GPIO)
2. 0x1422C1C8 (Nand boot configuration, from Fuse)
Nand boot configuration:
1. BOOT_MODE[1:0] = 0b10 (Boot From Fuses)
2. BT_FUSE_SEL = 1
* FUSE [0x080C] BOOT_CFG1: 00c8
* * Device....: NAND
* * Muxed on..: WEIM
* * Interleave: No
* * Addr cycle: 5
* * Boot freq.: 800
* * MMU enable: 0
* FUSE [0x0810] BOOT_CFG2: 00c1
* * Page size.: 4KB + 218 Bytes
* * NAND iface: 8 bit
* * DDR freq..: PLL2 - 400MHz
* * OSC freq..: 19.2, 24, 26, 27 MHz - auto detect
* * NFC freq..: AXI DDR divide by 12
* * Security..: Off
* FUSE [0x0814] BOOT_CFG3: 0022
* * Stride...: 1 Block
* * LBA......: Non LBA (11ms delay)
* * Use R/B..: Yes
* * ECC/Spare: 8-bit
* * Pages....: 64
* * Boot.....: direct boot from external memory is allowed
* FUSE [0x0804] BOOT_LOCK: 0010
* * JTAG mode: JTAG enable mode
* * Boot mode: Boot mode configuration is taken from fuses
I have tried to use tool "kobs-ng" (11.09.01). It has created all required structures: FCB + DDBT + UBoot image; FCB (pg. 495 «NAND FCB Format») consists of values:
0x68: 00 02 00 00 (Start page number of primary firmware)
0x6C: 80 03 00 00 (Start page number of secondary firmware)
Image of boot loader is located at address 0x200000 (2Mbyte). Also I've tried to write boot loader with offset (0x400 bytes, pg. 518 «Image Vector Table and Boot Data») relatively to this address.
I have tried to create FCB structure by myself, and write bootloader to the first Nand block, with offset
4Kbyte(pg. 495) + 0x400.
As the result of all my attempts, boot load process was always redirected to USB.
1. What means "Start page number ..." in FCB (offset 0x68)?
2. Can I debug boot process using JTAG?