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MX53 NAND MT29F16G08ADACAH4-IT boot problem

Question asked by Pedro Marzo on Aug 29, 2012
Latest reply on May 29, 2013 by Robert Chapman

We have developed a board based on the Mx53 which can boot from NAND or from SD chaging some switches. There are two different models of this board, one with 1 GByte of NAND flash and the other one with 2 GByte of NAND flash.

The 1 GByte model uses the NAND chip MT29F8G08ABACAH4-IT:C and the 2 GByte model the MT29F16G08ADACAH4-IT.

 

We use NAND boot mode without bit swapping, so the flash header first 1024 bytes are like that for both NANDs:

hexdump -C -n 1024  ../../build/uboot/u-boot.bin
00000000  7e 01 00 ea 46 43 42 20  01 00 00 00 00 00 00 00  |~...FCB ........|
00000010  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
00000400

 

And before flashing the u-boot to the NAND we disable bad blocks and bit swapping:

echo 1 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad
echo 1 > /sys/devices/platform/mxc_nandv2_flash.0/disable_bi_swap
flash_eraseall /dev/mtd0
dd if=u-boot.bin of=/dev/mtdblock0 bs=1024
echo 0 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad
echo 0 > /sys/devices/platform/mxc_nandv2_flash.0/disable_bi_swap

As the 2GByte chip was not supported by freescale BSP we have to add it to nand_device_info.c:

        {
        .end_of_table             = false,
        .manufacturer_code        = 0x2c,
        .device_code              = 0xd5,
        .cell_technology          = NAND_DEVICE_CELL_TECH_SLC,
        .chip_size_in_bytes       = 2LL*SZ_1G,
        .block_size_in_pages      = 64,
        .page_total_size_in_bytes = 4*SZ_1K + 224,
        .ecc_strength_in_bits     = 8,
        .ecc_size_in_bytes        = 512,
        .data_setup_in_ns         = 25,
        .data_hold_in_ns          = 15,
        .address_setup_in_ns      = 10,
        .gpmi_sample_delay_in_ns  = 6,
        .tREA_in_ns               = -1,
        .tRLOH_in_ns              = -1,
        .tRHOH_in_ns              = -1,
        "MT29F16G08FABWG",
        },

Both models boot ok from the SD, and we can write/read the flash without any problem, so we boot from SD and flash the NAND with the u-boot, kernel, filesystem ... We check that with both models we write and read ok using hexdump and cmp linux shell utilities.

 

When we try to boot the card from NAND the 1GByte model boots perfectly well, but the 2 GByte model does not even start to executing the u-boot code (check that with a BDI3000). We see nothing coming from the serial port. We think that the boot ROM code is finding some problem reading the u-boot from the 2GByte chip.

 

These are the boot pin settings we have for the 2GByte model:

BOOT_CFG1[7] ==> "1" boot from nand
BOOT_CFG1[6] ==> "0" PATA pads
BOOT_CFG1[5:4] ==> "00" No interleaving
BOOT_CFG1[3:2] ==> "10" 5 address cycles
BOOT_CFG2[7:6] ==> "11" 4KBytes + 218 the NAND chips has 224 but this option is not available
BOOT_CFG2[5] ==> "0"  8 bit bus width
BOOT_CFG2[5] ==> "0" AXI DDR divide by two
BOOT_CFG3[7] ==> "0" 1 block
BOOT_CFG3[6] ==> "0" Non LBA
BOOT_CFG3[5] ==> "1" Use R/B signal
BOOT_CFG3[4:3] ==> "11" ECC off
BOOT_CFG3[2:1] ==> "01" 64 pages in block

 

Has anyone tried booting the Mx53 with this NAND chip?

We think it should be able to boot from this chip, just a point, the chip has 224 oob size but Mx53 just has the option to use 218 may be this can be the problem?

Has anyone used a 2GByte NAND BGA 3.3 V chip to boot the MX53 so we can use it instead of this one?

 

Best Regards, Pedro

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