Hi @SeenFan ,
This is because RT1170 FlexSPI use PLL2 as clock source when use default configure. When you change PLL2 frequency, FlexSPI may fail to get next instruction. To resolve this, you can put fsl_clock.c to SRAM. Please refer to my demo code.
Regards,
Jing
Hi @SeenFan ,
This is because RT1170 FlexSPI use PLL2 as clock source when use default configure. When you change PLL2 frequency, FlexSPI may fail to get next instruction. To resolve this, you can put fsl_clock.c to SRAM. Please refer to my demo code.
Regards,
Jing
Hi @SeenFan ,
SDRAM can be initialized by DCD and boot ROM. Then boot ROM will copy your application code to SDRAM. I think the most important thing is the cache problem. You can refer to these link.
https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/How-to-move-CM4-core-project-to-SDRAM-in-RT1176...
2.debug in sdram
https://community.nxp.com/t5/MCUXpresso-IDE/Running-and-debugging-program-in-SDRAM/m-p/1405167
3.Using NonCached Memory on i.MXRT
https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Using-NonCached-Memory-on-i-MXRT/ta-p/1183369
Regards,
Jing