iMX6 PCIe capability

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torus1000
Contributor V

Hi guys.


I'm not familiar with i.MX6 PCIe and I want to know several things as following.

* How many virtual channels(VC) can be handle by PCIe?

* Is there any possibility to occur cache incoherence when PCIe access to DRAM?

If someone knows, please let me know.

Thanks.

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igorpadykov
NXP Employee
NXP Employee

Hi torus1000

there are 8 VC [in particular sect.48.9.22 VCn.. IMX6DQRM points on this].

Regarding "possibility to occur cache incoherence" I think

no, because PCIe is serviced by arm core, it has not own DMA engine.

Best regards

chip

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igorpadykov
NXP Employee
NXP Employee

Hi torus1000

there are 8 VC [in particular sect.48.9.22 VCn.. IMX6DQRM points on this].

Regarding "possibility to occur cache incoherence" I think

no, because PCIe is serviced by arm core, it has not own DMA engine.

Best regards

chip

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Note: If this post answers your question, please click the Correct Answer button. Thank you!

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