i.MX 8M Mini, DDR memory map

[saidjazouly]

Hi,

In section 2.1.2 (A-53) and Section 2.1.3 (M-4) of the "i.MX 8M Mini Applications Processor Reference Manual" documents the chip memory map. I have a couple of questions:

1) Can you confirm the address range 0x40000000-0xbfffffff on both the A-53 and M-4 refer to the identical DDR memory cells (i.e. writing 1 to 0x40000000 or 0x0000000040000000, will result in both the A-53 cores and the M-4 core reading a 1 from 0x40000000 or 0x0000000040000000) and that DDR can be viewed as share memory mapped to identical memory?

2) In Section 2.1.3 page 24, the address range 0x10000000 - 0x1ffdffff is allocated to "DDR Code alias".  Where in the DDR address range of 0x40000000-0xbfffffff is this alias mapped (i.e if I write a 1 to 0x10000000 where in the DDR address range to this 1 appear)?

Thank you.

[igorpadykov · Accepted solution]

Hi Said

1. yes confirmed.

2. "DDR Code alias" is mapped to beginning of DDR address range,

writing a 1 to 0x 0x10000000, 1 will appear  on  0x40000000.

Best regards
igor
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[saidjazouly]

Igor, thanks a lot for your quick and helpful feedback!

Cheers,

Said