aaah, you can delete this post, if you want. I found the solution on page 19.
For the DDR RAM build target, I need also to call dcache flush:
- fatload mmc 0:1 0x80000000 hello_world_ddrrelease.bin
- dcache flush
- bootaux 0x80000000
I wonder why, could you explain, please? And could you also explain what the build target flash_release is for!? Thanx in advance again.