RGMII to RGMII connection (MAC to MAC)

[niteshsahay]

Hi

One query on Clock:

1) How TXC and RXC is connected for MAC to MAC (i.e. either TXC to RXC or TXC to TXC and RXC to TXC).

2) Only single oscillator can be used to generate 125 MHz for TXC and RXC or two different oscillators are used to connect TXC and RXC.

3) Can we have one zero clock delay to generate two output which will be individually connected to TXC and RXC.

BR\Nitesh

[niteshsahay]

Hi Gusaramubla

Thanks for the reply.

Few Clarification required

1) In my RGMII (Ver 2.6 )chip there is no reference clock only TXC and RXC is present so 125MHz externally for my chip where to connect.

As you mentioned in previous post saying 125MHz clock is to be connected to Reference clock of my chip or the clock generated from ENET_REF_CLK (iMX6) will be taking care for the same.

2) As we are using MCIMX6QP6AVT1AA (iMX6) so do we need to provide the external clock to ENET_REF_CLK or it will be generated internally.

Kindly respond ASAP.

Beast Regards

Nitesh

[gusarambula]

Hello Nitesh Kumar,

My apologies for the delay. I hope you had this working. Just in case it’s still helpful please see my comments below.

1) It there is no dedicated 125Mhz input for the clock on your RGMII it is most likely taking the clock from the clock signals TXC and RXC and shouldn’t need the 125Mhz clock but I would recommend looking at its datasheet. In this scenario you would only need a 125Mhz clock source for the i.MX6 and the rest would work correctly.

2) For RGMII you do need to generate the 125Mhz signal externally, even for the i.MX6QP.

Regards,

[RossMcLuckie · Accepted solution]

Hi Gus,

Probably a bit late on this, but since I came across this thread as part of another RGMII question I thought I'd clear up a couple of points here.

For the iMX6DQPlus parts there is no need to provide an external 125MHz clock now, you can use the internal PLL6 to provide this clock and it can all be internally routed within the part. This was a change from iMX6DQ, which required ENET_REF_CLK to be fed with a 125MHz clock even if you used the internal PLL6 option.

You can still use an external 125MHz clock for RGMII on DQPlus, if you prefer not to use the internal PLL6, this would still connect to ENET_REF_CLK, the choice is open to the customer, an external clock adds cost, but likely has less jitter.

You can clock the iMX and external MAC from the same clock reference, or you can use two separate clock domains, since the RGMII TX and RX have separate clocks that data transfers are synchronised to, NOT the reference clock.

If too late here, hopefully helps others in the future.

Regards

Ross

[brianboorman]

Ross Mcluckie wrote:

Hi Gus,

{snip...} This was a change from iMX6DQ, which required ENET_REF_CLK to be fed with a 125MHz clock even if you used the internal PLL6 option.

 {snip...}

Regards

Ross

Please do tell where this is documented in the iMX6DQ documentation. I cannot find it in the reference manual, datasheet, HW dev guide, nor chip errata documents.

This issue seems to be part of the problem getting MAC to MAC working with AR8328N switch IC.

[niteshsahay]

Hi Gusaramubla

 Thanks for the reply

We are evaluating on the same and will post the same.

Regards

Nitesh

[gusarambula]

Hello Nitesh Kumar,

I would recommend looking at the following thread which may answer your questions:

https://community.nxp.com/thread/316374

You would need to connect the clocks crossed as with the data lines:

TXD[3:0] ---- RXD[3:0]

TX_CLK ----- RX_CLK

Only one single 125 Mhz oscillator may be used to generate both MACs clocks. However please keep in mind that for the i.MX6 the 125 Mhz oscillator feeds the ENET module from ENET_REF_CLK  and not directly trough TX_CLK or RX_CLK.

The other MAC to be connected to the i.MX6 will most likely generate the clocks from one main 125 Mhz clock so please also make sure you’re feeding the 125 Mhz Reference clock to the module and not to the TX_CLK/RX_CLK signals directly.

Regards,

[niteshsahay]

Hi Gusaramubla

Thanks for the reply.

Few Clarification required

1) In my RGMII chip there is no reference clock only TXC and RXC is present so 125MHz externally for my chip where to connect.

As you mentioned in previous post saying 125MHz clock is to be connected to Reference clock of my chip or the clock generated from ENET_REF_CLK (iMX6) will be taking care for the same.

2) As we are using MCIMX6QP6AVT1AA (iMX6) so do we need to provide the external clock to ENET_REF_CLK or it will be generated internally.

Beast Regards

Nitesh