Memory Map for i.MX RT1170 Processor

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Memory Map for i.MX RT1170 Processor

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pk_23514
Contributor I

This is the below Memory Map and IDE generated Linker script for the CM7 in i.MXRT1170:

pk_23514_0-1705913394094.png

pk_23514_0-1705977314051.png

I have certain queries regarding the above images:

1. In the Linker script for CM7 generated by MCUExpresso, OCRAM M4 region is not mentioned although this memory region is accessible to CM7 processor? Is there any other functionality of this region except in the Dual boot process?
2. What is the complete OCRAM size for the Memory Map? Does it include all the sections mentioned above or only the OCRAM M7 and OCRAM defined in the FlexRAM region?
3. Is there any functionality difference between the OCRAM M7, OCRAM1 and OCRAM2?
4. What is NCACHE region defined in the Linker script?

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Omar_Anguiano
NXP TechSupport
NXP TechSupport

I will gladly answer the other questions. 

1. It needs to be defined on both.
2. Correct.
3. It can be fixed to any size depending on your application.

Best regards,
Omar

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5 Replies
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pk_23514
Contributor I

Hello Omar,
Thanks for the response.

However, I still want to know the below points:
1. If OCRAM M4 region is shared between the CM7 and CM4 cores, so it shall be defined in both the CM4 & CM7 Linker scripts or any one of the CM4 or CM7 Linker script?
2. So, the Total OCRAM size = OCRAM configured in the FlexRAM (128kB to 640kB) + OCRMA1 (512kB to 576kB) + OCRAM2 (512kB to 576kB). Is this correct?
3. Is the NCACHE region size fixed at 16 MB in the SEMC0 interfaced Memory? Or it can be of any size?

Thanks,
Prabhat Kiran.

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3,841 Views
Omar_Anguiano
NXP TechSupport
NXP TechSupport

I will gladly answer the other questions. 

1. It needs to be defined on both.
2. Correct.
3. It can be fixed to any size depending on your application.

Best regards,
Omar

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3,800 Views
pk_23514
Contributor I

Hello Omar,

Thanks for the response.
All the Memory segments and their implementation on the Linker script are clear.

Thanks,
Prabhat Kiran.

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3,847 Views
pk_23514
Contributor I

Hello Omar,

May I expect some response to the above queries at the earliest.
Appreciate your efforts.

Thanks,
Prabhat Kiran.

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3,942 Views
Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello
I will gladly help you with these questions.

1. This memory space is shared between cm7 and cm4 cores. The functionality is given by the specific application.
2. There are two OCRAMs(OCRAM1 and OCRAM2) of 512KB(if ECC is enabled otherwise it is 576KB). The mentioned OCRAM M7 is the FlexRAM, the size may vary according to the ITCM and DTCM sizes.
3. OCRAM1/2 are dedicated OCRAMS. OCRAMM7 is part of the FlexRAM and size can be relocated.
4. The NCACHE region is a portion of the external SDRAM that has non-cacheable attributes on the MPU.

Best regards,
Omar

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