[IMX8] mipi csi reset mechanism under bulk current injection

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[IMX8] mipi csi reset mechanism under bulk current injection

1,981 次查看
KenBCHu
Contributor I

Hello,

Are there any mechanism about reset mipi csi signal? We have to pass the certification ISO 11452-2, Part 4: Bulk current injection (BCI). It will inject external signal to mipi csi and later on the camera is expected to work normally. 

Anybody can share more information about this? Thanks in advance.

 

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joanxie
NXP TechSupport
NXP TechSupport

I assume that you use imx8qm, refer to the mipi csi source code

https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/drivers/staging/media/imx/imx8-mipi-csi2.c#L425

these registers are for mipi csi reset

if you need reset camera pins, refer to the imx8qm schematic

joanxie_0-1706583739935.png

MIPI_CSI0_GPIO0_00 and MIPI_CSI1_GPIO0_00 are for reset signal, current bsp set these pins as gpio to reset the camera

pinctrl_mipi_csi0: mipi_csi0 {
fsl,pins = <
IMX8QM_MIPI_CSI0_GPIO0_00_LSIO_GPIO1_IO27 0xC0000041
IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0xC0000041
IMX8QM_MIPI_CSI0_MCLK_OUT_MIPI_CSI0_ACM_MCLK_OUT 0xC0000041
>;
};

pinctrl_mipi_csi1: mipi_csi1 {
fsl,pins = <
IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0xC0000041
IMX8QM_MIPI_CSI1_GPIO0_01_LSIO_GPIO1_IO31 0xC0000041
IMX8QM_MIPI_CSI1_MCLK_OUT_MIPI_CSI1_ACM_MCLK_OUT 0xC0000041
>;
};

 

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KenBCHu
Contributor I

Hi @joanxie,

Thanks for your reply. But currently we use i.mx8mp for development. Could you complement the difference? Thanks in advance.

 

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joanxie
NXP TechSupport
NXP TechSupport

ok, but I see you set imx8qm as tag, for imx8mp mipi csi driver

https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/drivers/staging/media/imx/imx8-mipi-csi2-sam.c

joanxie_0-1706689556280.png

pinctrl_csi0_rst: csi0_rst_grp {
fsl,pins = <
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x10
>;
};

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KenBCHu
Contributor I

Hi @joanxie,

Here is my current environment info & setting:

Platform: IMX8MP

MACHINE=imx8mp-lpddr4-evk

DISTRO=fsl-imx-xwayland

OS: imx-linux-kirkstone imx-5.15.71-2.2.0.xml

 

I can find mipi_csis_sw_reset() in csis_priv_ioctl(), it means that can sw reset with external control, am I right?

Another question, there a watch dog mechanism to SW reset mipi if the signal is broken after bulk current injection? Thanks.

KenBCHu_0-1707101526513.png

 

 

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joanxie
NXP TechSupport
NXP TechSupport

for mipi_csis_sw_reset() ,which set the bit1 of register MIPI_CSIx_CSIS_COMMON_CTRL

joanxie_0-1707105516887.png

for WDOG, imx8mp has HW ans SW, for more detailed information pls refer to the chapter 6.6 Watchdog Timer (WDOG) and chapter 2.11 Watchdog (WDOG) of linux reference manual

 

 

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