Hi all,
I am working on PCIe driver for Variscite board. I am developing the driver without any OS (linux or other).
Currently, I/O and MEM read write are working and legacy interrupt is also working. But I am facing problems in MSI. Kindly guide me regarding this.
The configurations that I have done are:
1) I have programmed Data register (offset 0x5C) of EP with value 0x0000 and MSI address register (offset 0x54 ) of EP with some address (say 0x01FF8000 as i saw it in the linux pci-e-ep-driver)
2) MSI of EP is enabled by setting MSI_Enable bit of MSI control register (offset 0x52 bit 0)
3) I have configured the RC register MSI controller Address Register (0x01FFC820) with the same address as that of MSI address in EP (i.e., 0x01FF8000).
4) MSI interrupt #0 enable register (0x01FFC828) is written with the value 0x01 and the Mask register (0x01FFC82C) with value 0
5) The interrupt disable in the RC is set in the command register (0x01FFC004) by setting 10th bit.
6) MSI inbound region # 1 is configured in address match mode by setting following parameters to iATU
iATU_ViewPort = 0x80000001;
iATU_Control1 = 0x0;
iATU_Control2 = 0x80000000;
iATU_LowerBaseAddr = 0x01FF8000;
iATU_UPBaseAddr = 0;
iATU_LimitAddr = 0x1FFF;
iATU_LowerTargetAddr = 0x4F800000; (inbound memory)
iATU_UpTgtAddr = 0;
After all these configurations I receive no MSI interrupt. Can anyone guide me regarding this strange behavior?
Thanks.
Iqra Javed
Hello,
The following may be helpful:
How is iMX6 PCIE endpoint MSI generation setup?
https://community.nxp.com/thread/321747
Have a great day,
Yuri
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Thank you YuriMuhin_ng for replying.
I am not working on MSI generation on EP mode PCI, rather I am not able to receive the interrupt in RC mode.
See if you can help?
Regards,
Iqra Javed