Imx93 spi0

[frebourg]

on imx93 with linux 6.1.22  ( imx93 rev A0) , I want to use spi1 to access custom component.
I have declared it on dts, but no respond from component 

with dtb without SPI1, using GPIO to emulate SPI no problem to access my compoent.

Is something missing ?  I have with and without dma on SPI , but still no answer.

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2022 NXP
 */

#include "myboard.dts"

&lpspi1 {
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpspi1>;
	status = "okay";

	spidev0: spi@0 {
		reg = <0>;
        compatible = "lwn,bk4";
		spi-max-frequency = <1000000>;
//		spi-max-frequency = <20000000>;
	};
};

&iomuxc {
	pinctrl_lpspi1: lpspi1grp {
		fsl,pins = <
               		MX93_PAD_SAI1_RXD0__LPSPI1_SOUT            0x0000051E
                	MX93_PAD_SAI1_TXC__LPSPI1_SIN              0x0000051E
                	MX93_PAD_SAI1_TXD0__LPSPI1_SCK             0x0000051E
                	MX93_PAD_SAI1_TXFS__LPSPI1_PCS0            0x0000051E

		>;
	};
};

And add imx93.dtsi 

			lpspi1: spi@44360000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
				reg = <0x44360000 0x10000>;
				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
					 <&clk IMX93_CLK_BUS_AON>;
				clock-names = "per", "ipg";
				dmas = <&edma1 11 0 0>, <&edma1 12 0 1>;
				dma-names = "tx","rx";
				status = "disabled";
			};
​

[frebourg]

Yes,  it's ok with SPI3

[jimmychan]

How you connect your component to SPI3 and SPI1?

[frebourg]

SPI1 is used on your custom board
SPI3 was used on EVK connected to your SPI component

CS0  on SAI1_TXFS (G21)
MOSI SAI1_TXC (G20)
SCK SAI1_TXD0 (H21)
MISO SAI1_RXD0 (H20)
Hardware is on OK,  SPI component is ok using GPIOs  (slow but OK)

Is there issue on iMX93 Rev A0 on this part ?

[jimmychan]

Could you try to set the value of pad ctrl register to 0x39e?

i.e. Change all the below 0x51E to 0x39E

               		MX93_PAD_SAI1_RXD0__LPSPI1_SOUT            0x0000051E
                	MX93_PAD_SAI1_TXC__LPSPI1_SIN              0x0000051E
                	MX93_PAD_SAI1_TXD0__LPSPI1_SCK             0x0000051E
                	MX93_PAD_SAI1_TXFS__LPSPI1_PCS0            0x0000051E

[jimmychan · Accepted solution]

Do you add your driver in the kernel source code?

[frebourg]

Don't use dedicated CS on device tree, but use IO  

With dedicated CS function,  CS is released between each byte

With IO use as CS,  CS is not released between each byte,  but at end of the frame.