Hi everyone,
I need some information about the reset condition of a certain pin.
The i.MX8M Nano datasheet lists reset condition in table 65.
For GPIO1_IO07 it lists “Input with PU” after reset.
If I delete our NAND completely and do a reset, so that the i.MX8M Nano cannot boot, the pin has a low level after the reset.
This low level persists.
I measured a ca. 13kOhm internal pull-down.
We expect a high value for this pin after reset on our electronic until U-Boot defines some new configuration for that pin.
How does this fit to the info from the datasheet? Am I misinterpreting the information there?
If there is an internal PD after reset on this pin, we would have to use another pin on our board.

Kind regards
Johannes