Hi Kerry,
thanks for your response. Additionally to my previous findings I figured out that not (only) a high signal on the observed pins is causing the connection issue. It also appears when a pin is simply connected to the rest of the system. Unfortunately, the behavior can't be determined by specific pins. It is completely random and may or may not occur when a certain pin is connected. However, when the controller board is connected to the system with all pins (LPSPI1 - LPSPI4, LPI2C1 and a few GPIOs) the debugger can never connect.
I could see that in such cases the SWDIO and SWDCLK lines change their initial level (sometimes high, sometimes low). I fixed this by applying pull-ups as stated by the table from your previous post. The JTAG_MOD pin was pulled-down by 100k which I also changed to 4.7k as stated in the table. Unfortunately, all measures were unsuccessful.
Regards,
Michael