Demo code of lpddr4_mr_read for reading MR registers in DRAM

[#1]

BSP: L5.15.5_1.0.0

Platform: i.MX8MPlus EVK

Background

The function lpddr4_mr_read in BSP always return zero and this casue the customer can't use it to read MR registers in DRAM.

This is a simple demo for reading MR registers.

Patch Code

diff --git a/arch/arm/include/asm/arch-imx8m/ddr.h b/arch/arm/include/asm/arch-imx8m/ddr.h
index 0f1e832c03..fd68996a23 100644
--- a/arch/arm/include/asm/arch-imx8m/ddr.h
+++ b/arch/arm/include/asm/arch-imx8m/ddr.h
@@ -721,6 +721,8 @@ int wait_ddrphy_training_complete(void);
 void ddrphy_init_set_dfi_clk(unsigned int drate);
 void ddrphy_init_read_msg_block(enum fw_type type);
 
+unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr);
+
 void update_umctl2_rank_space_setting(unsigned int pstat_num);
 void get_trained_CDD(unsigned int fsp);
 
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 33bbbc09ac..85e40ffbbe 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -150,6 +150,40 @@ int board_fit_config_name_match(const char *name)
 	return 0;
 }
 #endif
+void lpddr4_get_info()
+{
+	int i = 0, attempts = 5;
+	
+	unsigned int ddr_info = 0;
+	unsigned int regs[] = { 5, 6, 7, 8 };
+	
+	for(i = 0; i < ARRAY_SIZE(regs); i++){
+		unsigned int data = 0;
+		data = lpddr4_mr_read(0xF,regs[i]);
+		ddr_info <<= 8;
+		ddr_info += (data & 0xFF);
+		switch (i)
+		{
+			case 0:
+				printf("DRAM INFO : Manufacturer ID = 0x%x",ddr_info);
+				if(ddr_info & 0Xff)
+					printf(", Micron\n");
+				break;
+			case 1:
+				printf("DRAM INFO : Revision ID1 = 0x%x\n",ddr_info);
+				break;
+			case 2:
+				printf("DRAM INFO : Revision ID2 = 0x%x\n",ddr_info);
+				break;
+			case 3:
+				printf("DRAM INFO : I/O Width and Density = 0x%x\n",ddr_info);
+				break;
+			default:
+				break;
+		}
+	}
+	
+}
 
 void board_init_f(ulong dummy)
 {
@@ -187,6 +221,8 @@ void board_init_f(ulong dummy)
 
 	/* DDR initialization */
 	spl_dram_init();
+	
+	lpddr4_get_info();
 
 	board_init_r(NULL, 0);
 }
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 326b92d784..f45eeaf552 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -194,8 +194,15 @@ unsigned int lpddr4_mr_read(unsigned int mr_rank, unsigned int mr_addr)
 		tmp = reg32_read(DRC_PERF_MON_MRR0_DAT(0));
 	} while ((tmp & 0x8) == 0);
 	tmp = reg32_read(DRC_PERF_MON_MRR1_DAT(0));
-	tmp = tmp & 0xff;
 	reg32_write(DRC_PERF_MON_MRR0_DAT(0), 0x4);
+	
+	while (tmp) { //try to find a significant byte in the word
+		if (tmp & 0xff) {
+			tmp &= 0xff;
+			break;
+		}
+		tmp >>= 8;
+	}
 
 	return tmp;
 }

Test Result