Vybrid RM note recommendation.

[ioseph_martinez]

Hello Guys,

Not sure if this is already recorded for some of the next revisions of the RM for Vybrid (looked for them on the review documents) but it would be good to have a note on the RM that specifies Slice 2 is exclusively used when LPDDR2 is used, either a note or in each register which configures Slice 2 register. (this only applies to LPDDR2)

Thanks,

Ioseph

[naoumgitnik]

Added into shared-review RM copy - both swapped registers and slice 2.

/NG

[ioseph_martinez]

Thanks Naoum, sure, let me know.

By the way, customer also found that the bitfields from phy32 and phy 33 are swapped.

(they should be exactly as phy16 and phy17 for slice 1 are defined since phy32 and phy33 are only change is they are for slice 2)

[ioseph_martinez]

let me be more specific.

PHY32, is DQ timing register for slice 2.

But in the table "DDRMC_PHY32 field descriptions" is wrong, it talks about the DQS. so the actual table for PHY32 is the one called "DDRMC_PHY33 field descriptions"

Also, the register with the bitfields (the picture with the fields and numbers from 31 and 0) is swapped.

The action neede is:

Swap:

- Register picture from 32 to 33

- Field descriptions table from 32 to 33

Thanks.

[naoumgitnik · Accepted solution]

Thanks Ioseph,

I added your illustration:

It looks like each description down to the Address is correct but everything below the addresses should be swapped for the 2 registers.

/Naoum.

[naoumgitnik]

Thanks Ioseph,

I will try to make this next week, will possibly have follow-up questions... :smileywink:

/Naoum.