HI there,
I don't understand the cross reference between MRC Slave protected PFLASH_0, PFLASH_1,...PFLASH_WR, ...,PRAM0,PRAM1 (see below)
and the s32k3xx_Memory Maps where FLASH splitted in program flash data flash and ram is splitted in SRAM0,1,2 (see below). I need to know that in order to configure xrdc configurations
Can you help me ?
Hi @FabioG,
You can see the ports in the block diagram.
Figure 8. Block diagram – S32K324, S32K344 and S32K314
The PFLASH_WR port is for writting/programming the flash (not depicted), while other ports are just for reading.
Refer to RM sections:
22.1.1 Flash memory architecture
23.1 Chip-specific PRAMC information
Regards,
Daniel
Hi @FabioG,
You can see the ports in the block diagram.
Figure 8. Block diagram – S32K324, S32K344 and S32K314
The PFLASH_WR port is for writting/programming the flash (not depicted), while other ports are just for reading.
Refer to RM sections:
22.1.1 Flash memory architecture
23.1 Chip-specific PRAMC information
Regards,
Daniel
