WDOG ISR

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WDOG ISR

1,151 次查看
Shruthi_C
Contributor III

HI,

I have initialized WDOG with 500ms and Before WDOG  going to RESET,  we have only 128 clock cycles in WDOG ISR,  Can we increase this 128 clock cycles, because I want some things to write on param table before RESET.

 

Please support on this

Thank You

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1,126 次查看
VaneB
NXP TechSupport
NXP TechSupport

Hi @Shruthi_C 

The reset can be delayed by the WDOG 128 BUS_CLK cycles, as you mentioned, but also can have more delay by the RCM up to 512 LPO clock cycles.

Please refer to Example S32K144 WDOG RCM interrupt.

 

B.R.

VaneB

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1,110 次查看
Shruthi_C
Contributor III

HI, 

Thank You so much VaneB

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