Hello,
FCCU RST is disabled by the BIST as description express:
petervlna_0-1702886102423.png
Second the corresponding PCTLs can be controlled by ME module. basically the note ask you to disable clocks to peripherals before test is started.
This is most probably implemented by BASE module of AUTOSAR drivers. I do not expect that this is the part of SDP driver as it is general Mode entry functionality.
For details refer to reference manual : 47.1.4 Core clock gating
petervlna_3-1702888459724.png
petervlna_1-1702887969159.png
For example:
petervlna_2-1702887980358.png
Best regards,
Peter