S32K314 SPI flash implementation

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S32K314 SPI flash implementation

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abhijith_r
Contributor III

Hi,

I am trying to implement SPI flash with S32K314 and using LpSpi. In that there is one function "Lpspi_Ip_SyncTransmit" which I assumes to write and read data. In this function a parameter length is there which is showing the length of data to be sent. In its definition the length is assigned to both tx and rx buffer. What to do if I am writing 1 byte of data and expecting more than 1 byte to receive.

In the spi flash data sheet an instruction 1 byte and expecting 3 bytes of data. We checked with logic analyzer, in that after transfering 1 byte clock is low. 

Does anyone have a sample project of reading from SPI flash? Please share

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @abhijith_r,

What is the transfer format expected by the flash chip?

The LPSPI can send 4 bytes in one transfer if the flash can ignore the 3 bytes at MOSI.

Or the HalfDuplex APIs can be used instead.

danielmartynek_0-1678981320126.png

Depending on the Transfer type, the LPSPI module can either send data on the MOSI line or just receive data on the MISO line.

danielmartynek_1-1678981408905.png

 

Regards,

Daniel

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abhijith_r
Contributor III

Hi @danielmartynek ,

I tried with this halfduplex format. But still it is having some error.
In mex file do I need to enable "SpiDeviceHalfDuplexSupport" option. In that there is another option SpiHalfDuplexPinSelect, in that if I select SOUT pin will it be act as both input and output.
Do you have any sample project of implementing LpSpi half duplex.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @abhijith_r,

You can use the full-duplex mode too, if you fill the rest of the buffer with the IDLE data like (0xFF).

Regarding the half duplex APIs, they can be used even when the module is not configured for a bidirectional single line SPI.

danielmartynek_0-1679321797140.png

 

My test code is attached.

It sends 1 frame at MOSI and receives 3 frames at MISO using the half-duplex APIs.

 

BR, Daniel

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