S32K3 Vector Table Alignment

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K3 Vector Table Alignment

Jump to solution
668 Views
kscz
Contributor III

The ARMv7 architecture reference manual says that the vector table needs to be aligned as follows:
Screenshot From 2026-02-22 09-56-25.png

The S32K3xx chips have an "image vector table" which is 256 bytes:

Screenshot From 2026-02-21 17-21-52.png

if the ARM vector table immediate follows the "image vector table", this alignment is not naturally maintained. Do I need to put in padding bytes such that the alignment of the ARM vector table follows the guidance of the architecture reference manual?

0 Kudos
Reply
1 Solution
638 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes, for S32K3 devices, the vector table must be aligned according to the ARM Cortex‑M7 VTOR rules - that is, aligned to the size of the vector table, usually a power‑of‑two boundary (e.g., 0x1000). If the linker places the table at an address that does not meet this requirement, VTOR writes may appear to work, but exception entry can fault due to misalignment. In many S32K3 startup files, the table is copied to RAM (to be able change IRQ handler address in runtime) and VTOR is updated,  so the RAM placement also must respect this required alignment. Ensuring the linker script aligns the vector table section correctly typically resolves the reset/exception alignment problems.
 
BR, Petr

View solution in original post

0 Kudos
Reply
1 Reply
639 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

yes, for S32K3 devices, the vector table must be aligned according to the ARM Cortex‑M7 VTOR rules - that is, aligned to the size of the vector table, usually a power‑of‑two boundary (e.g., 0x1000). If the linker places the table at an address that does not meet this requirement, VTOR writes may appear to work, but exception entry can fault due to misalignment. In many S32K3 startup files, the table is copied to RAM (to be able change IRQ handler address in runtime) and VTOR is updated,  so the RAM placement also must respect this required alignment. Ensuring the linker script aligns the vector table section correctly typically resolves the reset/exception alignment problems.
 
BR, Petr
0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2321049%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ES32K3%20Vector%20Table%20Alignment%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2321049%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EThe%20ARMv7%20architecture%20reference%20manual%20says%20that%20the%20vector%20table%20needs%20to%20be%20aligned%20as%20follows%3A%3CBR%20%2F%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22Screenshot%20From%202026-02-22%2009-56-25.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22Screenshot%20From%202026-02-22%2009-56-25.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F377496iF368E375ED88EB33%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22Screenshot%20From%202026-02-22%2009-56-25.png%22%20alt%3D%22Screenshot%20From%202026-02-22%2009-56-25.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%E2%80%83%3C%2FP%3E%3CP%3EThe%20S32K3xx%20chips%20have%20an%20%22image%20vector%20table%22%20which%20is%20256%20bytes%3A%3C%2FP%3E%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22Screenshot%20From%202026-02-21%2017-21-52.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22Screenshot%20From%202026-02-21%2017-21-52.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F377497i11BB7973BE7613BE%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22Screenshot%20From%202026-02-21%2017-21-52.png%22%20alt%3D%22Screenshot%20From%202026-02-21%2017-21-52.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CBR%20%2F%3E%3CBR%20%2F%3Eif%20the%20ARM%20vector%20table%20immediate%20follows%20the%20%22image%20vector%20table%22%2C%20this%20alignment%20is%20not%20naturally%20maintained.%20Do%20I%20need%20to%20put%20in%20padding%20bytes%20such%20that%20the%20alignment%20of%20the%20ARM%20vector%20table%20follows%20the%20guidance%20of%20the%20architecture%20reference%20manual%3F%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2321162%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20S32K3%20Vector%20Table%20Alignment%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2321162%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%2C%3C%2FP%3E%0A%3CDIV%3Eyes%2C%20for%20S32K3%20devices%2C%20the%20vector%20table%20must%20be%20aligned%20according%20to%20the%20ARM%20Cortex%E2%80%91M7%20VTOR%20rules%20-%20that%20is%2C%20aligned%20to%20the%20size%20of%20the%20vector%20table%2C%20usually%20a%20power%E2%80%91of%E2%80%91two%20boundary%20(e.g.%2C%200x1000).%20If%20the%20linker%20places%20the%20table%20at%20an%20address%20that%20does%20not%20meet%20this%20requirement%2C%20VTOR%20writes%20may%20appear%20to%20work%2C%20but%20exception%20entry%20can%20fault%20due%20to%20misalignment.%20In%20many%20S32K3%20startup%20files%2C%20the%20table%20is%20copied%20to%20RAM%20(%3CSPAN%3Eto%20be%20able%20change%20IRQ%20handler%20address%20in%20runtime%3C%2FSPAN%3E)%20and%20VTOR%20is%20updated%2C%20%26nbsp%3Bso%20the%20RAM%20placement%20also%20must%20respect%20this%20required%20alignment.%20Ensuring%20the%20linker%20script%20aligns%20the%20vector%20table%20section%20correctly%20typically%20resolves%20the%20reset%2Fexception%20alignment%20problems.%3C%2FDIV%3E%0A%3CDIV%3E%26nbsp%3B%3C%2FDIV%3E%0A%3CDIV%3EBR%2C%20Petr%3C%2FDIV%3E%3C%2FLINGO-BODY%3E