How does S32K146 realize FLEXIO to simulate I2C SLAVE mode?

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How does S32K146 realize FLEXIO to simulate I2C SLAVE mode?

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584914019
Contributor III

How does S32K146 realize FLEXIO to simulate I2C SLAVE mode?

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

I have received confirmation to share details about I2C FlexIO slave created by our application engineer publicly, see below:

This post is intended to show how to emulate I2C in slave mode with FlexIO. The RM states it is not possible because of the module capabilities but it is under certain conditions. It may not work for all the applications but for some of them, it could.

 

As you know, in the I2C protocol when working as an I2C slave node, it has to send the ACK bit and need to read the R/W bit to determine the direction of the DATA BYTE. The problem here with FlexIO is that it has to switch from input mode (because you are reading the address) to output mode to send the ACK signal and then, go back to input mode to read the R/W bit to know if you need to stay in input mode or switch to output mode for the DATA BYTE.

 

Image result for i2c frame structure

The image was taken from I2C - learn.sparkfun.com 

 

To be able to simulate I2C in slave mode with FlexIO, you have to consider (based on your application requirements) the conditions below:

  1. The bit rate must be slow enough to be able to do the switching of the I/O.
  2. CPU has enough bandwidth.

 

The processing flow would be:

  1. Receive 7-bit address and R/W bit in the SHIFTER configured as input
  2. CPU checks the address to determine if it should respond or not
  3. If so, place 0 on the SHIFTER (or another SHIFTER) configured as output mode to provide ACK bit
  4. Depending on the R/W bit, read another 8-bit data from the input SHIFTER, or place 8-bit data to output SHIFTER
  5. Send ACK bit by output SHIFTER

 

It would need the following resources:

  • One input SHIFTER with TIMER to receive 8-bit address + R/W bit, or 8-bit write-data (from master)
  • One output SHIFTER with TIMER to transmit 8-bit read-data (to master)
  • One output SHIFTER with TIMER to transmit 1-bit ACK

 

Note: Since all the SHIFTERs are connected to the SDA pin, the input SHIFTER should be disabled (or ignore the input data) when transmitting the data/ACK bit.

I hope it helps.

Best regards,

Diana

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dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

The RM explains only I2C master implementation because it is difficult to emulate I2C bus slave using FlexIO.

The similar question has been discussed in this thread:

https://community.nxp.com/thread/510520 

Best regards,

Diana

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584914019
Contributor III

You didn’t explain my question reasonably. We are going to use MCU as I2C slave to parse the client’s agreement. The client must ask us to use our MCU (S32K146) as the slave. You should tell me where it is difficult to achieve, So that I can explain to my clients.

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1,923 Views
dianabatrlova
NXP TechSupport
NXP TechSupport

Hello,

I have received confirmation to share details about I2C FlexIO slave created by our application engineer publicly, see below:

This post is intended to show how to emulate I2C in slave mode with FlexIO. The RM states it is not possible because of the module capabilities but it is under certain conditions. It may not work for all the applications but for some of them, it could.

 

As you know, in the I2C protocol when working as an I2C slave node, it has to send the ACK bit and need to read the R/W bit to determine the direction of the DATA BYTE. The problem here with FlexIO is that it has to switch from input mode (because you are reading the address) to output mode to send the ACK signal and then, go back to input mode to read the R/W bit to know if you need to stay in input mode or switch to output mode for the DATA BYTE.

 

Image result for i2c frame structure

The image was taken from I2C - learn.sparkfun.com 

 

To be able to simulate I2C in slave mode with FlexIO, you have to consider (based on your application requirements) the conditions below:

  1. The bit rate must be slow enough to be able to do the switching of the I/O.
  2. CPU has enough bandwidth.

 

The processing flow would be:

  1. Receive 7-bit address and R/W bit in the SHIFTER configured as input
  2. CPU checks the address to determine if it should respond or not
  3. If so, place 0 on the SHIFTER (or another SHIFTER) configured as output mode to provide ACK bit
  4. Depending on the R/W bit, read another 8-bit data from the input SHIFTER, or place 8-bit data to output SHIFTER
  5. Send ACK bit by output SHIFTER

 

It would need the following resources:

  • One input SHIFTER with TIMER to receive 8-bit address + R/W bit, or 8-bit write-data (from master)
  • One output SHIFTER with TIMER to transmit 8-bit read-data (to master)
  • One output SHIFTER with TIMER to transmit 1-bit ACK

 

Note: Since all the SHIFTERs are connected to the SDA pin, the input SHIFTER should be disabled (or ignore the input data) when transmitting the data/ACK bit.

I hope it helps.

Best regards,

Diana

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1,922 Views
584914019
Contributor III

Dear:Diana Batrlova

         

   Thank you very much for your reply

Best regards,

Diana

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