Hi @akhilranga,
For SW reset, please look at chapter 25.2.2.7 from the S32K Reference Manual, it explains the reset control register.
You can also use this example as reference, where a SW reset is implemented to test the ram retention: Example S32K144 RAM Retention S32DS.R1 - NXP Community.
There is also this function in the system_S32K144.c file:

For the watchdog, there are many community posts sharing some reference code, such as:
You can also refer to the examples inside the EAR SDK.
Best regards,
Julián