WatchDog S32k144

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lohrsistemas
Contributor IV

I try to enable WDT follow bellow:     

 

__disable_interrupt(); // disable global interrupt
      WDOG->CNT = 0xD928C520; //unlock watchdog
      while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) != 0U); //wait until registers are unlocked
      WDOG->TOVAL = 256; //set timeout value
      WDOG->CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(0) |  WDOG_CS_WIN(0) | WDOG_CS_UPDATE(0);
      while(((WDOG->CS & WDOG_CS_RCS_MASK) >> WDOG_CS_RCS_SHIFT) != 0U); //wait until new configuration takes effect
      __enable_interrupt(); // enable global interrupt

 

But it never causes a MCU reset.

Any idea what's going on?

 

Thanks

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi

Using S32K144EVB - Q100 (N47T) board, I have to wait until ULK == 1. But when I tried the same code on FRDMPK144 - Q100 (N77P), it was stuck in the while loop as you wrote. Nevertheless, your original code works on that board. So, I assume you use FRDMPK144 - Q100 and you can run it as well. Please try the attached code.

Regards

Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi


The issue seems to be here

You have
while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) != 0U); // wait until registers are unlocked

ULK      0b - WDOG is locked.

             1b - WDOG is unlocked.

while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0U);

Regards
Daniel

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lohrsistemas
Contributor IV

Hi Daniel, thanks for your feedback.

If I put:

while(((WDOG->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) == 0U);

The firmware never goes out of this while.

Any ideia whats happening?

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi

Using S32K144EVB - Q100 (N47T) board, I have to wait until ULK == 1. But when I tried the same code on FRDMPK144 - Q100 (N77P), it was stuck in the while loop as you wrote. Nevertheless, your original code works on that board. So, I assume you use FRDMPK144 - Q100 and you can run it as well. Please try the attached code.

Regards

Daniel

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lohrsistemas
Contributor IV

Hi Daniel, sorry for the delay,

My board is FRDMPK144 - Q100. I tried to use the code you sent me, but I still can not cause the watchdog overflow/reset MCU.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi

The FRDMPK144 - Q100 board has N77P mask-set chip (prototype).

In the RM for this mask-set the ULK bit is reserved and always has the value 0.

ulk.png

This is the reason why it was stuck in the while loop. You can see ULK bit is not used in the RM Example configuration:

code.png

Strangely enough, I can run the very code on my FRDMPK144 - Q100 and you don’t.

This issue (among many others) is solved with the new revision of the chip (N47T). Where the ULK bit is implemented. And it works. I would wait for the new revision.

Regards

Daniel

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lohrsistemas
Contributor IV

Daniel, I discovered my problem.
At the beginning of my program I was disabling the watchdog.

  __disable_interrupt(); // disable global interrupt
  WDOG->CNT=0xD928C520;     /* Unlock watchdog */
  WDOG->TOVAL=0x0000FFFF;    /* Maximum timeout value */
  WDOG->CS = 0x00002100;    /* Disable watchdog */
  __enable_interrupt(); // enable global interrupt

But then after the settings of pwms, analog inputs, timers, I enabled.
I think that by being disabled when I enabled it it did not work.

Excluding the disable function, it started to work.

Thanks for your help.

Regards.

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