S32G3 goldvip M7 Uart example has not output

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S32G3 goldvip M7 Uart example has not output

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XD
Contributor II

Hello,

I am working on bringing up the M7 UART port on a Goldbox. I created the UART example "Uart_Example_S32G399_M7" from the RTD AUTOSAR 4.4 in S32DS 3.5. I tried using both the original linker_ram.ld file and a modified one from the software enablement guide, but I am not seeing any output on the console.

Here are the details:

  • Console Settings (PuTTY):

    • Baud rate: 9600
    • Data bits: 8
    • Parity: None
  • Changes Made:

    • Applied the modified .ld SRAM configuration as per the software enablement guide.
    • Made corresponding changes in the IVT.

Interestingly, using the modified .ld SRAM configuration, I was able to get the LED example working, but I am unsure why the UART example does not produce any output.

Could someone help me identify what might be going wrong?

Here are the IVT setting, original and modified .ld SRAM configurations for reference:

    int_sram                : ORIGIN = 0x34000000, LENGTH = 0x00500000 /* 5MB */
    int_sram_no_cacheable   : ORIGIN = 0x34500000, LENGTH = 0x00100000 /* 1MB, needs to include int_results  */
    ram_rsvd2               : ORIGIN = 0x34600000, LENGTH = 0          /* End of SRAM */

 

    int_sram                : ORIGIN = 0x34004000, LENGTH = 0x00400000 /* 4MB */
    int_sram_stack_c0       : ORIGIN = 0x34404000, LENGTH = 0x00002000 /* 8KB */
    int_sram_stack_c1       : ORIGIN = 0x34406000, LENGTH = 0x00002000 /* 8KB */
    int_sram_stack_c2       : ORIGIN = 0x34408000, LENGTH = 0x00002000 /* 8KB */
    int_sram_stack_c3       : ORIGIN = 0x3440A000, LENGTH = 0x00002000 /* 8KB */
    int_sram_no_cacheable   : ORIGIN = 0x34500000, LENGTH = 0x00100000 /* 1MB, needs to include int_results  */
    ram_rsvd2               : ORIGIN = 0x34600000, LENGTH = 0x00DFFFFF /* End of SRAM */

  

puddlepop_0-1719081144797.png

Thanks,

XD

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chenyin_h
NXP Employee
NXP Employee

Hello, @XD 

I apologize for the delay.

Just checked this version example from my side with the default ld files, seems no issue found for the test.

The following tips for your reference.

  1. Check the peripheral perspective, add the following drivers

chenyin_h_0-1719548722232.png

 

  1. From the IntCtrl_Ip view, add the interrupt 83 for the example, since this example is working with interrupts

chenyin_h_1-1719548722235.png

Then generate code and recompile for the project.

Hope it helps

 

Best Regards

Chenyin

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chenyin_h
NXP Employee
NXP Employee

Hello, @XD 

I apologize for the delay.

Just checked this version example from my side with the default ld files, seems no issue found for the test.

The following tips for your reference.

  1. Check the peripheral perspective, add the following drivers

chenyin_h_0-1719548722232.png

 

  1. From the IntCtrl_Ip view, add the interrupt 83 for the example, since this example is working with interrupts

chenyin_h_1-1719548722235.png

Then generate code and recompile for the project.

Hope it helps

 

Best Regards

Chenyin

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