About enabling SCU in uboot

[shiyiheng]

Due to some verification tests, I need to run multi-core in uboot. Now I can run multi-core in uboot, but there are some consistency issues due to the configuration of SCU (Snoop Control Unit). Should I configure SCU in uboot, or is there any guidance document for reference?

[Daniel-Aguirre]

Hi,

It seems that this same inquiry has also being opened under the NXP online services. We have already provided an update under the internal case.

Can you confirm that you did open this same request under the NXP online services?

Please, let us know.

[shiyiheng]

Thank you for your answer
If there are similar questions in other places and the problem has been solved, could you please provide me with the connection

[Daniel-Aguirre]

Hi,

It seems that we might have confused the request.

Can you help us share which S32G product you are using? Also, which BSP version are you working with?

In general, we are seeing that there is no documentation specific to SCU enablement under uboot. We do apologize.

Please, let us know.

[shiyiheng]

In addition, I read the ubootd code and found that core0 will use the flush_dcache_range function when sending outgoing messages through pfe, theoretically opening ncore should no longer require flush, because uboot SCU does not take effect.

[shiyiheng]

When I operate,core0 and core1 of cluster0 both open cache and mmu,core0 writes the address 0x34180000-0x34180400 to 0x66666666, and then core1 writes 0x34180200-0x34180400 to 0x9999999 Finally, core0 reads back 0x34180200-0x34180400, and the result is as follows

This is the state of core0 of cluster0 and the same address operation between core0 and core1, core0 0x34180200 is E, core1 0x34180200 is M, obviously the state is not matched

Also core0 0x341803c0 is M, core1dcahce L1 has no information, but this address content is written by core1, and then core0 to read