I have some questions about the C code named "adc_pal_s32k144". I modify the C code for my purposes.
I want to read the voltage values of a digital signal. I don't understand very well how to specify the sample time select of the ADC. In addition I don't want the ADC average, in fact I have modified the section 2 of hardware trigger because I prefer to store the ADC value on each instant of time. As shown in Figure, I named the value_adc the physical value that comes from adc_pal1_Results02 ( means that I haven't a buffer of 5 elements as the primary example, but the buffer has as lenght 1)
When I put the connections, I'm not able to read the correct value of digital signal. The idea is to acquire the voltage values of CAN-Bus. My setup is formed by two NXPs (one transmit and one receive) and another ADC where I flash the code "adc_pal_s32k144". With the code that I have modified, I read always 2.5V that means the bus is idle. But this is not true because the receiver receives correctly the CAN message with the 2ED ID (Identifier of CAN message).
Finally I would understand which is the time of the ADC's conversion. How often can I read the converted values? In my ideal situation I want to read at every 2microseconds. How it is possible? Do I need of sample time select?
Thank you for your availability
I had some errors witht the formula of conversion Time of ADC. Thank you for you help.
Sorry for the disturbance, but Could I ask you something about SysTick? I want to measure the time that the processor needs to execute my code. I want to be sure that there is a correct relationship with the performance of ADC.
You can use DWT instead of SysTick
Measure the running time of one function on S32K:
A single ADC conversion time is given by this equation below.
Which is the minimal delay between the HW/SW ADC input triggers.
To measure the ADC input signal every 2us, you would need to set the conversion time below 2us (min SMPLTS = 1, max ADCK = 50MHz, max BUS_CLK = 56MHz) and configure the LPTMR to trigger the ADC every 2us.
Also, you would need to read the ADC result in time.
thank you for your help.
Sorry for my trivial question, but I don't understand how to modify LPTMR to trigger the ADC every 2 us. In addition, I study the same formula for the ADC total conversion time. I set as SMPLTS 39 because the ratio between 2us and 40 MHz (fADC) is equal 80. From the equation I extract the value of SMPLTS. It is sufficient or I should do more for the conversion at every 2 us?
Finally I need to read the ADC result in time. In fact, I modify the script. My idea is to store the voltage values of each msgID. For this reason I set a threshold value (this thresold is equal to 2 because on CAN-Low, when there is a dominant bit, that in CAN is equal to 0, there is as voltage value 1.5V) that indicates the beginning of message. The structure of my code is:
But now, I have some problem with the UART. I'm not be able to read the measurements because there is an error on the variable current_value. If you have time, could you help me?
In your opinion, my idea could be correct? I need to obtain a synchronism between digital values and physical values for each msgID because from the physical values I'll exctract some features.
Thank you for your help
Simply change the Compare value in the PE Component inspector
I can only tell that just the sample time alone will be 1us at 40MHz ADCK and 39 SMPLTS.
The whole conversion time must be less then 2us.
You can also make the calculation in the callback function but please note that the SDK drivers have significant CPU overhead.
I don't know what time it takes from the COCO flag assertion to the end of the calculation code including the printf().
Could you please create a new thread for the UART issue and shows some screenshots of the error?
thank you for your help. The question about the UART is resolved and now I read the values on Tera-Term.
Should I set 2 as Compare Value? In this way, could I be sure that the sampling of the ADC is on every 2us?
I want to explain better my setup. In the previous version of the code (adc_pal_s32k144) the channel of the ADC was 12 because the idea was to read from the potentiometer. In my version I use the channel 3 of ADC0 in order to read from the CAN-Low. But in the previous version there were three groups of conversion (two that use a software trigger and the last one a hardware trigger). In my version I use just the hardware trigger and I choose as the numChans 1 and not 5 (in fact in my code I don't use the sum of voltage values).
I tell you this because as you could see in Figure, from the ADC I read one value for 110 times (110 is the number that I set for NUM_CONV_GROUP_ITERATIONS). This is incorrect because as I told you in the last comment, I set a threshold that indicates the beginning of CAN msg. In particular, when there is a Start of Frame on CAN-Low I should read as voltage value 1.5V. So my idea is to read different voltage measurements (that are in the range from 1.5V to 2.5V) of the CAN message. This error is a consequence of the sampling or is due to a bad idea?
Thank you for your help
The ADC module can be triggered every 2us provided the ADC conversion takes less than 2us.
And you could route the LPTMR0 trigger via TRGMUX to a TRGMUX_OUTn pin and scope the signal to verify it.
Similarly, you can route the ADC_COCO trigger to TRGMUX_OUTn pin.
Then, on the pins, you could see when the ADC was triggered and when a new result was available in the result register.
However, you want to get a new ADC result every 2us and send it out via UART.
I don't think there is enough time to do that.
You may try simply storing the results to SRAM and then read the results using debugger.
Also, if you want to get ADC results <2.5V only, you can use the ADC automatic compare function, Section 44.5.5, RM rev.12.1.
The SDK ADC PAL driver does not support this function but the S32K1xx ADC SDK driver does.
You may refer to the adc_hwtrigger_s32k144 SDK example.
Anyway, as I mentioned in my previous post, the SDK drivers cause significant CPU overhead.
In this case, it would be probably better to use non-SDK code.
Something like this example: S32K144_Project_PDB that can be found in the S32 Design studio as well.
It uses PDB to trigger an ADC conversion periodically and the result is available in the ADC interrupt function.
On top of that, you could use DMA to transfer a certain number of ADC results to SRAM without using ADC interrupts and the CPU.
thank you for your suggestion. Now I try to modify the example s32k144_Project_PDB for my purpose and I hope that I'm be able to read the voltage values of CAN msg. If I have some problem, could I contact you?
Thank you for your help
sorry for my trivial question. I don't understand very well the conversion frequency of the ADC. I know that Conversion Time = n° of samples/ fADC. If I select PCC_PCCn_PCS(1) I obtain as fADC SOSCDIV2 that is equal to 8MHz (despite PCC_PCCn_PCS(6) I select SPLLDIV2 that is equal to 40MHz).
For the formula in RM: ADC Total Conversion Time = (SMPLTS + 1) + (1) + (28 -> 12 Bit as Resolution) + (10)
So I want to obtain 2us as ADC conversion Time, I'll have:
2us = ((SMPLTS)+ 40)/8MHz -> 8MHz is PCC_PCCn_PCS(1)
Is this correct? I have some problem with time analysis because my purpose is to sample at each 2us. I don't know if I wrong something but I don't have a good results.
Thank you for your help
You have several calculations in the post that are not correct.
The conversion time is given by this equation:
Conversion time = ((SMPLTS + 1) / fADCK) + (1 / fADCK) + (20 or 24 or 28 / fADCK) + (5 /fADCK) + (5 / fBUS_CLK).
Where fADCK is the frequency of the selected clock divided by ADIV.