Hi Mars,
I cannot see any problem.
The VDDC is typically used for CAN PHY only.
The VDDX pin behaves as output voltage pin when regulator is configured as internal. When regulator is configured as external, the VDDX pin behaves as input voltage pin.
The VDDX is power supply rail for most of the GPIO pins (port AD is powered from VDDA).
So, the 5V for voltage translator should be connected to the VDDX pin.
Let’s assume that VDDX is configured as internal and MCU consumption itself is 25mA.
The RM specifies that internal regulator may provide up to 70mA (for VSUP>6V, TJ < +175°C).
So, there remains up to 45mA for VDDX and pin loads.
Please take these numbers with reserve. The available output current should be evaluated per target application and thermal analysis.
I hope it helps you.
Have a great day,
Radek
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