T1042 Output pin IBIS Model

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T1042 Output pin IBIS Model

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qammarabbas
Contributor IV

Hi,

I am simulating T1042's Serdes interface in Hyperlynx. The IBIS model of T1042 does not allow me to set the transmitter pins (AD17 and AE17) as output. Moreover, these pins are mentioned as output in the datasheet as well. Kindly let me know what can i do to configure these differential pins as output in Hyperlynx?

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ufedor
NXP Employee
NXP Employee

It is required to use IBIS-AMI model in this case.

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ufedor
NXP Employee
NXP Employee

It is required to use IBIS-AMI model in this case.

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qammarabbas
Contributor IV

Thanks ufedor‌. I have created a case for it. Please let me know if AMI model is also required for the receiver?

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ufedor
NXP Employee
NXP Employee

The IBIS-AMI model contains TX and RX models.

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qammarabbas
Contributor IV

What i could understand from this statement is that the IBIS-AMI model of T1042 will be having IBIS-AMI model of the receiver (FPGA in my case) as well. Is it right?

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ufedor
NXP Employee
NXP Employee

> the IBIS-AMI model of T1042 will be having IBIS-AMI model of the receiver (FPGA in my case) as well.

Of course - not.

The T1042 IBIS-AMI package contains TX and RX models of the T1042.