I am simulating T1042's Serdes interface in Hyperlynx. The IBIS model of T1042 does not allow me to set the transmitter pins (AD17 and AE17) as output. Moreover, these pins are mentioned as output in the datasheet as well. Kindly let me know what can i do to configure these differential pins as output in Hyperlynx?
What i could understand from this statement is that the IBIS-AMI model of T1042 will be having IBIS-AMI model of the receiver (FPGA in my case) as well. Is it right?